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@@ -47,6 +47,7 @@
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#define EVERGREEN_PFP_UCODE_SIZE 1120
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#define EVERGREEN_PFP_UCODE_SIZE 1120
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#define EVERGREEN_PM4_UCODE_SIZE 1376
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#define EVERGREEN_PM4_UCODE_SIZE 1376
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#define EVERGREEN_RLC_UCODE_SIZE 768
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#define EVERGREEN_RLC_UCODE_SIZE 768
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+#define CAYMAN_RLC_UCODE_SIZE 1024
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/* Firmware Names */
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/* Firmware Names */
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MODULE_FIRMWARE("radeon/R600_pfp.bin");
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MODULE_FIRMWARE("radeon/R600_pfp.bin");
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@@ -2809,13 +2810,20 @@ static int r600_rlc_init(struct radeon_device *rdev)
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WREG32(RLC_HB_CNTL, 0);
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WREG32(RLC_HB_CNTL, 0);
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WREG32(RLC_HB_RPTR, 0);
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WREG32(RLC_HB_RPTR, 0);
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WREG32(RLC_HB_WPTR, 0);
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WREG32(RLC_HB_WPTR, 0);
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- WREG32(RLC_HB_WPTR_LSB_ADDR, 0);
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- WREG32(RLC_HB_WPTR_MSB_ADDR, 0);
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+ if (rdev->family <= CHIP_CAICOS) {
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+ WREG32(RLC_HB_WPTR_LSB_ADDR, 0);
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+ WREG32(RLC_HB_WPTR_MSB_ADDR, 0);
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+ }
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WREG32(RLC_MC_CNTL, 0);
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WREG32(RLC_MC_CNTL, 0);
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WREG32(RLC_UCODE_CNTL, 0);
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WREG32(RLC_UCODE_CNTL, 0);
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fw_data = (const __be32 *)rdev->rlc_fw->data;
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fw_data = (const __be32 *)rdev->rlc_fw->data;
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- if (rdev->family >= CHIP_CEDAR) {
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+ if (rdev->family >= CHIP_CAYMAN) {
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+ for (i = 0; i < CAYMAN_RLC_UCODE_SIZE; i++) {
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+ WREG32(RLC_UCODE_ADDR, i);
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+ WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
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+ }
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+ } else if (rdev->family >= CHIP_CEDAR) {
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for (i = 0; i < EVERGREEN_RLC_UCODE_SIZE; i++) {
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for (i = 0; i < EVERGREEN_RLC_UCODE_SIZE; i++) {
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WREG32(RLC_UCODE_ADDR, i);
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WREG32(RLC_UCODE_ADDR, i);
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WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
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WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
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