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@@ -15,7 +15,6 @@ Major Change History:
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--*/
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--*/
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-#ifdef RTL8192SU
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#include "r8192U.h"
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#include "r8192U.h"
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#include "r8192U_dm.h"
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#include "r8192U_dm.h"
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//#include "r8190_rtl8256.h"
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//#include "r8190_rtl8256.h"
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@@ -23,15 +22,6 @@ Major Change History:
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#include "r8192S_hw.h"
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#include "r8192S_hw.h"
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#include "r8192S_phy.h"
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#include "r8192S_phy.h"
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#include "r8192S_phyreg.h"
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#include "r8192S_phyreg.h"
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-#else
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-#include "r8192U.h"
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-#include "r8192U_dm.h"
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-#include "r8192U_hw.h"
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-#include "r819xU_phy.h"
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-#include "r819xU_phyreg.h"
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-#include "r8190_rtl8256.h"
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-#include "r819xU_cmdpkt.h"
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-#endif
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/*---------------------------Define Local Constant---------------------------*/
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/*---------------------------Define Local Constant---------------------------*/
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//
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//
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@@ -50,7 +40,6 @@ typedef enum _HT_IOT_PEER
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}HT_IOT_PEER_E, *PHTIOT_PEER_E;
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}HT_IOT_PEER_E, *PHTIOT_PEER_E;
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#endif
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#endif
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#if 1
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#if 1
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-#ifdef RTL8192SU
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static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
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static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
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// UNKNOWN REALTEK_90 /*REALTEK_92SE*/ BROADCOM RALINK ATHEROS CISCO MARVELL 92U_AP SELF_AP
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// UNKNOWN REALTEK_90 /*REALTEK_92SE*/ BROADCOM RALINK ATHEROS CISCO MARVELL 92U_AP SELF_AP
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{ 0xa44f, 0x5ea44f, 0x5ea44f, 0xa44f, 0xa44f, 0xa44f, 0xa630, 0xa42b, 0x5e4322, 0x5e4322};
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{ 0xa44f, 0x5ea44f, 0x5ea44f, 0xa44f, 0xa44f, 0xa44f, 0xa630, 0xa42b, 0x5e4322, 0x5e4322};
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@@ -58,14 +47,6 @@ typedef enum _HT_IOT_PEER
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// UNKNOWN REALTEK /*REALTEK_92SE*/ BROADCOM RALINK ATHEROS CISCO MARVELL 92U_AP SELF_AP
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// UNKNOWN REALTEK /*REALTEK_92SE*/ BROADCOM RALINK ATHEROS CISCO MARVELL 92U_AP SELF_AP
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{ 0x5ea44f, 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea422, 0x5e4322, 0x3ea44f, 0x5ea42b, 0x5e4322, 0x5e4322};
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{ 0x5ea44f, 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea422, 0x5e4322, 0x3ea44f, 0x5ea42b, 0x5e4322, 0x5e4322};
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-#else
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-
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-static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
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- { 0x5e4322, 0x5e4322, 0x5ea44f, 0x5e4322, 0x604322, 0xa44f, 0x5ea44f};
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-static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
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- { 0x5e4322, 0xa44f, 0x5ea44f, 0x5e4322, 0x604322, 0x5ea44f, 0x5ea44f};
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-
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-#endif
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#endif
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#endif
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#define RTK_UL_EDCA 0xa44f
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#define RTK_UL_EDCA 0xa44f
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@@ -202,7 +183,6 @@ static void dm_ctstoself(struct net_device *dev);
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//================================================================================
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//================================================================================
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// HW Dynamic mechanism interface.
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// HW Dynamic mechanism interface.
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//================================================================================
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//================================================================================
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-#ifdef RTL8192SU
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static void dm_CheckAggrPolicy(struct net_device *dev)
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static void dm_CheckAggrPolicy(struct net_device *dev)
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{
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{
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struct r8192_priv *priv = ieee80211_priv(dev);
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struct r8192_priv *priv = ieee80211_priv(dev);
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@@ -273,7 +253,6 @@ static void dm_CheckAggrPolicy(struct net_device *dev)
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lastTxOkCnt = priv->stats.txbytesunicast;
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lastTxOkCnt = priv->stats.txbytesunicast;
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lastRxOkCnt = priv->stats.rxbytesunicast;
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lastRxOkCnt = priv->stats.rxbytesunicast;
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}
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}
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-#endif
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//
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//
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// Description:
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// Description:
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// Prepare SW resource for HW dynamic mechanism.
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// Prepare SW resource for HW dynamic mechanism.
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@@ -293,11 +272,7 @@ init_hal_dm(struct net_device *dev)
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//Initial TX Power Control for near/far range , add by amy 2008/05/15, porting from windows code.
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//Initial TX Power Control for near/far range , add by amy 2008/05/15, porting from windows code.
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dm_init_dynamic_txpower(dev);
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dm_init_dynamic_txpower(dev);
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init_rate_adaptive(dev);
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init_rate_adaptive(dev);
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-#ifdef RTL8192SU
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dm_initialize_txpower_tracking(dev);
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dm_initialize_txpower_tracking(dev);
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-#else
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- //dm_initialize_txpower_tracking(dev);
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-#endif
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dm_dig_init(dev);
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dm_dig_init(dev);
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dm_init_edca_turbo(dev);
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dm_init_edca_turbo(dev);
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dm_init_bandwidth_autoswitch(dev);
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dm_init_bandwidth_autoswitch(dev);
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@@ -317,7 +292,6 @@ extern void deinit_hal_dm(struct net_device *dev)
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-#ifdef RTL8192SU
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//#if 0
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//#if 0
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extern void hal_dm_watchdog(struct net_device *dev)
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extern void hal_dm_watchdog(struct net_device *dev)
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{
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{
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@@ -372,31 +346,6 @@ extern void hal_dm_watchdog(struct net_device *dev)
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dm_ctstoself(dev);
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dm_ctstoself(dev);
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} //HalDmWatchDog
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} //HalDmWatchDog
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-#else
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-extern void hal_dm_watchdog(struct net_device *dev)
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-{
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- //struct r8192_priv *priv = ieee80211_priv(dev);
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-
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- //static u8 previous_bssid[6] ={0};
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-
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- /*Add by amy 2008/05/15 ,porting from windows code.*/
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- dm_check_rate_adaptive(dev);
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- dm_dynamic_txpower(dev);
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- dm_check_txrateandretrycount(dev);
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- dm_check_txpower_tracking(dev);
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- dm_ctrl_initgain_byrssi(dev);
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- dm_check_edca_turbo(dev);
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- dm_bandwidth_autoswitch(dev);
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- dm_check_rfctrl_gpio(dev);
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- dm_check_rx_path_selection(dev);
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- dm_check_fsync(dev);
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-
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- // Add by amy 2008-05-15 porting from windows code.
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- dm_check_pbc_gpio(dev);
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- dm_send_rssi_tofw(dev);
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- dm_ctstoself(dev);
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-} //HalDmWatchDog
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-#endif
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/*
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/*
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* Decide Rate Adaptive Set according to distance (signal strength)
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* Decide Rate Adaptive Set according to distance (signal strength)
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@@ -1595,37 +1544,15 @@ static void dm_InitializeTXPowerTracking_TSSI(struct net_device *dev)
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}
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}
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-#ifndef RTL8192SU
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-static void dm_InitializeTXPowerTracking_ThermalMeter(struct net_device *dev)
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-{
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- struct r8192_priv *priv = ieee80211_priv(dev);
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-
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- // Tx Power tracking by Theremal Meter require Firmware R/W 3-wire. This mechanism
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- // can be enabled only when Firmware R/W 3-wire is enabled. Otherwise, frequent r/w
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- // 3-wire by driver cause RF goes into wrong state.
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- if(priv->ieee80211->FwRWRF)
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- priv->btxpower_tracking = TRUE;
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- else
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- priv->btxpower_tracking = FALSE;
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- priv->txpower_count = 0;
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- priv->btxpower_trackingInit = FALSE;
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-}
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-#endif
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void dm_initialize_txpower_tracking(struct net_device *dev)
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void dm_initialize_txpower_tracking(struct net_device *dev)
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{
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{
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#if (defined RTL8190P)
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#if (defined RTL8190P)
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dm_InitializeTXPowerTracking_TSSI(dev);
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dm_InitializeTXPowerTracking_TSSI(dev);
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-#elif (defined RTL8192SU)
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+#else
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// 2009/01/12 MH Enable for 92S series channel 1-14 CCK tx pwer setting for MP.
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// 2009/01/12 MH Enable for 92S series channel 1-14 CCK tx pwer setting for MP.
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//
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//
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dm_InitializeTXPowerTracking_TSSI(dev);
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dm_InitializeTXPowerTracking_TSSI(dev);
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-#else
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- struct r8192_priv *priv = ieee80211_priv(dev);
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- if(priv->bDcut == TRUE)
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- dm_InitializeTXPowerTracking_TSSI(dev);
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- else
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- dm_InitializeTXPowerTracking_ThermalMeter(dev);
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#endif
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#endif
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}// dm_InitializeTXPowerTracking
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}// dm_InitializeTXPowerTracking
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@@ -1683,17 +1610,10 @@ static void dm_CheckTXPowerTracking_ThermalMeter(struct net_device *dev)
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//Attention!! You have to wirte all 12bits data to RF, or it may cause RF to crash
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//Attention!! You have to wirte all 12bits data to RF, or it may cause RF to crash
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//actually write reg0x02 bit1=0, then bit1=1.
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//actually write reg0x02 bit1=0, then bit1=1.
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//DbgPrint("Trigger ThermalMeter, write RF reg0x2 = 0x4d to 0x4f\n");
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//DbgPrint("Trigger ThermalMeter, write RF reg0x2 = 0x4d to 0x4f\n");
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-#ifdef RTL8192SU
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rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4d);
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rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4d);
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rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4f);
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rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4f);
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rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4d);
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rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4d);
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rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4f);
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rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4f);
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-#else
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- rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
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- rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
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- rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
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- rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
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-#endif
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TM_Trigger = 1;
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TM_Trigger = 1;
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return;
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return;
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}
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}
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@@ -2021,14 +1941,12 @@ extern void dm_change_dynamic_initgain_thresh(struct net_device *dev,
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u32 dm_type,
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u32 dm_type,
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u32 dm_value)
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u32 dm_value)
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{
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{
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-#ifdef RTL8192SU
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struct r8192_priv *priv = ieee80211_priv(dev);
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struct r8192_priv *priv = ieee80211_priv(dev);
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if(dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH)
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if(dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH)
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priv->MidHighPwrTHR_L2 = (u8)dm_value;
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priv->MidHighPwrTHR_L2 = (u8)dm_value;
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else if(dm_type == DIG_TYPE_THRESH_HIGHPWR_LOW)
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else if(dm_type == DIG_TYPE_THRESH_HIGHPWR_LOW)
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priv->MidHighPwrTHR_L1 = (u8)dm_value;
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priv->MidHighPwrTHR_L1 = (u8)dm_value;
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return;
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return;
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-#endif
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if (dm_type == DIG_TYPE_THRESH_HIGH)
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if (dm_type == DIG_TYPE_THRESH_HIGH)
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{
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{
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dm_digtable.rssi_high_thresh = dm_value;
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dm_digtable.rssi_high_thresh = dm_value;
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@@ -2400,15 +2318,7 @@ static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(
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{
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{
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/* 2008/01/11 MH 40MHZ 90/92 register are not the same. */
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/* 2008/01/11 MH 40MHZ 90/92 register are not the same. */
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// 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
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// 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
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-#ifdef RTL8192SU
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rtl8192_setBBreg(dev, (rOFDM0_XATxAFE+3), bMaskByte0, 0x00);
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rtl8192_setBBreg(dev, (rOFDM0_XATxAFE+3), bMaskByte0, 0x00);
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-#else
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- #ifdef RTL8190P
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- write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
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- #else
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- write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
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- #endif
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-#endif
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/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
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/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
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write_nic_byte(pAdapter, rOFDM0_RxDetector1, 0x40);
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write_nic_byte(pAdapter, rOFDM0_RxDetector1, 0x40);
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*/
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*/
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@@ -2552,15 +2462,7 @@ static void dm_ctrl_initgain_byrssi_highpwr(
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// 3.1 Higher PD_TH for OFDM for high power state.
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// 3.1 Higher PD_TH for OFDM for high power state.
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if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
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if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
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{
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{
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-#ifdef RTL8192SU
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rtl8192_setBBreg(dev, (rOFDM0_XATxAFE+3), bMaskByte0, 0x10);
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rtl8192_setBBreg(dev, (rOFDM0_XATxAFE+3), bMaskByte0, 0x10);
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-#else
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- #ifdef RTL8190P
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- write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
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- #else
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- write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
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- #endif
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-#endif
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/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
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/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
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write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
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write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
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*/
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*/
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@@ -2727,15 +2629,7 @@ static void dm_pd_th(
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{
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{
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/* 2008/01/11 MH 40MHZ 90/92 register are not the same. */
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/* 2008/01/11 MH 40MHZ 90/92 register are not the same. */
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// 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
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// 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
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-#ifdef RTL8192SU
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rtl8192_setBBreg(dev, (rOFDM0_XATxAFE+3), bMaskByte0, 0x00);
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rtl8192_setBBreg(dev, (rOFDM0_XATxAFE+3), bMaskByte0, 0x00);
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-#else
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- #ifdef RTL8190P
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- write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
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- #else
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- write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
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- #endif
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-#endif
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/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
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/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
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write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
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write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
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*/
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*/
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@@ -2899,7 +2793,6 @@ static void dm_check_edca_turbo(
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{
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{
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curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
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curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
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curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
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curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
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-#ifdef RTL8192SU
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// Modify EDCA parameters selection bias
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// Modify EDCA parameters selection bias
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// For some APs, use downlink EDCA parameters for uplink+downlink
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// For some APs, use downlink EDCA parameters for uplink+downlink
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if(priv->ieee80211->pHTInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)
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if(priv->ieee80211->pHTInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)
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@@ -2942,31 +2835,6 @@ static void dm_check_edca_turbo(
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}
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}
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priv->bcurrent_turbo_EDCA = true;
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priv->bcurrent_turbo_EDCA = true;
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}
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}
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-#else
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- // For RT-AP, we needs to turn it on when Rx>Tx
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- if(curRxOkCnt > 4*curTxOkCnt)
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- {
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- //printk("%s():curRxOkCnt > 4*curTxOkCnt\n");
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- if(!priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
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- {
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- write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL[pHTInfo->IOTPeer]);
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- priv->bis_cur_rdlstate = true;
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- }
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- }
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- else
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- {
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-
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- //printk("%s():curRxOkCnt < 4*curTxOkCnt\n");
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- if(priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
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- {
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- write_nic_dword(dev, EDCAPARA_BE, edca_setting_UL[pHTInfo->IOTPeer]);
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- priv->bis_cur_rdlstate = false;
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- }
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-
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- }
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-
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- priv->bcurrent_turbo_EDCA = true;
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-#endif
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}
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}
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else
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else
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{
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{
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@@ -3212,9 +3080,7 @@ static void dm_check_rfctrl_gpio(struct net_device * dev)
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#ifdef RTL8192U
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#ifdef RTL8192U
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return;
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return;
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#endif
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#endif
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-#ifdef RTL8192SU
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return;
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return;
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-#endif
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#ifdef RTL8192E
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#ifdef RTL8192E
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queue_delayed_work(priv->priv_wq,&priv->gpio_change_rf_wq,0);
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queue_delayed_work(priv->priv_wq,&priv->gpio_change_rf_wq,0);
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#endif
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#endif
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@@ -3257,7 +3123,6 @@ static void dm_check_pbc_gpio(struct net_device *dev)
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priv->bpbc_pressed = true;
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priv->bpbc_pressed = true;
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}
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}
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#endif
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#endif
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-#ifdef RTL8192SU
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struct r8192_priv *priv = ieee80211_priv(dev);
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struct r8192_priv *priv = ieee80211_priv(dev);
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u8 tmp1byte;
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u8 tmp1byte;
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@@ -3283,7 +3148,6 @@ static void dm_check_pbc_gpio(struct net_device *dev)
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priv->bpbc_pressed = true;
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priv->bpbc_pressed = true;
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}
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}
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-#endif
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}
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}
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@@ -3862,15 +3726,7 @@ extern void dm_fsync_timer_callback(unsigned long data)
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write_nic_byte(dev, 0xC3e, 0x96);
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write_nic_byte(dev, 0xC3e, 0x96);
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}
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}
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priv->ContiuneDiffCount = 0;
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priv->ContiuneDiffCount = 0;
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-#ifdef RTL8192SU
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rtl8192_setBBreg(dev, rOFDM0_RxDetector2, bMaskDWord, 0x164052cd);
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rtl8192_setBBreg(dev, rOFDM0_RxDetector2, bMaskDWord, 0x164052cd);
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-#else
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- #ifdef RTL8190P
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- write_nic_dword(dev, rOFDM0_RxDetector2, 0x164052cd);
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- #else
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- write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
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- #endif
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-#endif
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}
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}
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RT_TRACE(COMP_HALDM, "ContiuneDiffCount %d\n", priv->ContiuneDiffCount);
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RT_TRACE(COMP_HALDM, "ContiuneDiffCount %d\n", priv->ContiuneDiffCount);
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RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff , priv->bswitch_fsync);
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RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff , priv->bswitch_fsync);
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@@ -4283,16 +4139,6 @@ static void dm_dynamic_txpower(struct net_device *dev)
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(priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low ) )
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(priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low ) )
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{
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{
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RT_TRACE(COMP_TXAGC,"SetTxPowerLevel8190() channel = %d \n" , priv->ieee80211->current_network.channel);
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RT_TRACE(COMP_TXAGC,"SetTxPowerLevel8190() channel = %d \n" , priv->ieee80211->current_network.channel);
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-#ifndef RTL8192SU
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-#if defined(RTL8190P) || defined(RTL8192E)
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- SetTxPowerLevel8190(Adapter,pHalData->CurrentChannel);
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-#endif
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-
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-#ifdef RTL8192U
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- rtl8192_phy_setTxPower(dev,priv->ieee80211->current_network.channel);
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- //pHalData->bStartTxCtrlByTPCNFR = FALSE; //Clear th flag of Set TX Power from Sitesurvey
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-#endif
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-#endif
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}
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}
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priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
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priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
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priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
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priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
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@@ -4306,11 +4152,7 @@ static void dm_check_txrateandretrycount(struct net_device * dev)
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struct ieee80211_device* ieee = priv->ieee80211;
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struct ieee80211_device* ieee = priv->ieee80211;
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//for 11n tx rate
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//for 11n tx rate
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// priv->stats.CurrentShowTxate = read_nic_byte(dev, Current_Tx_Rate_Reg);
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// priv->stats.CurrentShowTxate = read_nic_byte(dev, Current_Tx_Rate_Reg);
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-#ifdef RTL8192SU
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ieee->softmac_stats.CurrentShowTxate = read_nic_byte(dev, TX_RATE_REG);
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ieee->softmac_stats.CurrentShowTxate = read_nic_byte(dev, TX_RATE_REG);
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-#else
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- ieee->softmac_stats.CurrentShowTxate = read_nic_byte(dev, Current_Tx_Rate_Reg);
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-#endif
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//printk("=============>tx_rate_reg:%x\n", ieee->softmac_stats.CurrentShowTxate);
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//printk("=============>tx_rate_reg:%x\n", ieee->softmac_stats.CurrentShowTxate);
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//for initial tx rate
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//for initial tx rate
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// priv->stats.last_packet_rate = read_nic_byte(dev, Initial_Tx_Rate_Reg);
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// priv->stats.last_packet_rate = read_nic_byte(dev, Initial_Tx_Rate_Reg);
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@@ -4322,24 +4164,6 @@ static void dm_check_txrateandretrycount(struct net_device * dev)
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static void dm_send_rssi_tofw(struct net_device *dev)
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static void dm_send_rssi_tofw(struct net_device *dev)
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{
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{
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-#ifndef RTL8192SU
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- DCMD_TXCMD_T tx_cmd;
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- struct r8192_priv *priv = ieee80211_priv(dev);
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-
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- // If we test chariot, we should stop the TX command ?
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- // Because 92E will always silent reset when we send tx command. We use register
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- // 0x1e0(byte) to botify driver.
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- write_nic_byte(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);
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- return;
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-#if 1
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- tx_cmd.Op = TXCMD_SET_RX_RSSI;
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- tx_cmd.Length = 4;
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- tx_cmd.Value = priv->undecorated_smoothed_pwdb;
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-
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- cmpk_message_handle_tx(dev, (u8*)&tx_cmd,
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- DESC_PACKET_TYPE_INIT, sizeof(DCMD_TXCMD_T));
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-#endif
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-#endif
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}
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}
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#ifdef TO_DO_LIST
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#ifdef TO_DO_LIST
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