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@@ -261,8 +261,11 @@ int ni_mc_load_microcode(struct radeon_device *rdev)
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WREG32(MC_SEQ_SUP_CNTL, 0x00000001);
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/* wait for training to complete */
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- while (!(RREG32(MC_IO_PAD_CNTL_D0) & MEM_FALL_OUT_CMD))
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- udelay(10);
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+ for (i = 0; i < rdev->usec_timeout; i++) {
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+ if (RREG32(MC_IO_PAD_CNTL_D0) & MEM_FALL_OUT_CMD)
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+ break;
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+ udelay(1);
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+ }
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if (running)
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WREG32(MC_SHARED_BLACKOUT_CNTL, blackout);
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