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@@ -84,16 +84,6 @@ static void mpc52xx_uart_of_enumerate(void);
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static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
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static irqreturn_t mpc5xxx_uart_process_int(struct uart_port *port);
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-
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-/* Simple macro to test if a port is console or not. This one is taken
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- * for serial_core.c and maybe should be moved to serial_core.h ? */
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-#ifdef CONFIG_SERIAL_CORE_CONSOLE
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-#define uart_console(port) \
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- ((port)->cons && (port)->cons->index == (port)->line)
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-#else
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-#define uart_console(port) (0)
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-#endif
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-
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/* ======================================================================== */
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/* PSC fifo operations for isolating differences between 52xx and 512x */
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/* ======================================================================== */
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@@ -122,6 +112,15 @@ struct psc_ops {
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void (*fifoc_uninit)(void);
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void (*get_irq)(struct uart_port *, struct device_node *);
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irqreturn_t (*handle_irq)(struct uart_port *port);
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+ u16 (*get_status)(struct uart_port *port);
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+ u8 (*get_ipcr)(struct uart_port *port);
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+ void (*command)(struct uart_port *port, u8 cmd);
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+ void (*set_mode)(struct uart_port *port, u8 mr1, u8 mr2);
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+ void (*set_rts)(struct uart_port *port, int state);
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+ void (*enable_ms)(struct uart_port *port);
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+ void (*set_sicr)(struct uart_port *port, u32 val);
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+ void (*set_imr)(struct uart_port *port, u16 val);
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+ u8 (*get_mr1)(struct uart_port *port);
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};
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/* setting the prescaler and divisor reg is common for all chips */
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@@ -134,6 +133,65 @@ static inline void mpc52xx_set_divisor(struct mpc52xx_psc __iomem *psc,
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out_8(&psc->ctlr, divisor & 0xff);
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}
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+static u16 mpc52xx_psc_get_status(struct uart_port *port)
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+{
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+ return in_be16(&PSC(port)->mpc52xx_psc_status);
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+}
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+
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+static u8 mpc52xx_psc_get_ipcr(struct uart_port *port)
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+{
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+ return in_8(&PSC(port)->mpc52xx_psc_ipcr);
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+}
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+
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+static void mpc52xx_psc_command(struct uart_port *port, u8 cmd)
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+{
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+ out_8(&PSC(port)->command, cmd);
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+}
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+
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+static void mpc52xx_psc_set_mode(struct uart_port *port, u8 mr1, u8 mr2)
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+{
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+ out_8(&PSC(port)->command, MPC52xx_PSC_SEL_MODE_REG_1);
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+ out_8(&PSC(port)->mode, mr1);
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+ out_8(&PSC(port)->mode, mr2);
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+}
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+
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+static void mpc52xx_psc_set_rts(struct uart_port *port, int state)
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+{
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+ if (state)
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+ out_8(&PSC(port)->op1, MPC52xx_PSC_OP_RTS);
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+ else
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+ out_8(&PSC(port)->op0, MPC52xx_PSC_OP_RTS);
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+}
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+
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+static void mpc52xx_psc_enable_ms(struct uart_port *port)
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+{
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+ struct mpc52xx_psc __iomem *psc = PSC(port);
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+
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+ /* clear D_*-bits by reading them */
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+ in_8(&psc->mpc52xx_psc_ipcr);
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+ /* enable CTS and DCD as IPC interrupts */
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+ out_8(&psc->mpc52xx_psc_acr, MPC52xx_PSC_IEC_CTS | MPC52xx_PSC_IEC_DCD);
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+
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+ port->read_status_mask |= MPC52xx_PSC_IMR_IPC;
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+ out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
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+}
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+
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+static void mpc52xx_psc_set_sicr(struct uart_port *port, u32 val)
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+{
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+ out_be32(&PSC(port)->sicr, val);
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+}
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+
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+static void mpc52xx_psc_set_imr(struct uart_port *port, u16 val)
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+{
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+ out_be16(&PSC(port)->mpc52xx_psc_imr, val);
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+}
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+
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+static u8 mpc52xx_psc_get_mr1(struct uart_port *port)
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+{
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+ out_8(&PSC(port)->command, MPC52xx_PSC_SEL_MODE_REG_1);
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+ return in_8(&PSC(port)->mode);
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+}
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+
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#ifdef CONFIG_PPC_MPC52xx
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#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
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static void mpc52xx_psc_fifo_init(struct uart_port *port)
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@@ -304,6 +362,15 @@ static struct psc_ops mpc52xx_psc_ops = {
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.set_baudrate = mpc5200_psc_set_baudrate,
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.get_irq = mpc52xx_psc_get_irq,
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.handle_irq = mpc52xx_psc_handle_irq,
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+ .get_status = mpc52xx_psc_get_status,
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+ .get_ipcr = mpc52xx_psc_get_ipcr,
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+ .command = mpc52xx_psc_command,
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+ .set_mode = mpc52xx_psc_set_mode,
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+ .set_rts = mpc52xx_psc_set_rts,
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+ .enable_ms = mpc52xx_psc_enable_ms,
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+ .set_sicr = mpc52xx_psc_set_sicr,
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+ .set_imr = mpc52xx_psc_set_imr,
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+ .get_mr1 = mpc52xx_psc_get_mr1,
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};
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static struct psc_ops mpc5200b_psc_ops = {
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@@ -325,6 +392,15 @@ static struct psc_ops mpc5200b_psc_ops = {
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.set_baudrate = mpc5200b_psc_set_baudrate,
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.get_irq = mpc52xx_psc_get_irq,
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.handle_irq = mpc52xx_psc_handle_irq,
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+ .get_status = mpc52xx_psc_get_status,
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+ .get_ipcr = mpc52xx_psc_get_ipcr,
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+ .command = mpc52xx_psc_command,
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+ .set_mode = mpc52xx_psc_set_mode,
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+ .set_rts = mpc52xx_psc_set_rts,
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+ .enable_ms = mpc52xx_psc_enable_ms,
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+ .set_sicr = mpc52xx_psc_set_sicr,
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+ .set_imr = mpc52xx_psc_set_imr,
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+ .get_mr1 = mpc52xx_psc_get_mr1,
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};
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#endif /* CONFIG_MPC52xx */
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@@ -572,6 +648,246 @@ static void mpc512x_psc_get_irq(struct uart_port *port, struct device_node *np)
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port->irqflags = IRQF_SHARED;
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port->irq = psc_fifoc_irq;
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}
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+#endif
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+
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+#ifdef CONFIG_PPC_MPC512x
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+
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+#define PSC_5125(port) ((struct mpc5125_psc __iomem *)((port)->membase))
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+#define FIFO_5125(port) ((struct mpc512x_psc_fifo __iomem *)(PSC_5125(port)+1))
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+
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+static void mpc5125_psc_fifo_init(struct uart_port *port)
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+{
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+ /* /32 prescaler */
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+ out_8(&PSC_5125(port)->mpc52xx_psc_clock_select, 0xdd);
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+
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+ out_be32(&FIFO_5125(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
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+ out_be32(&FIFO_5125(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
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+ out_be32(&FIFO_5125(port)->txalarm, 1);
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+ out_be32(&FIFO_5125(port)->tximr, 0);
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+
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+ out_be32(&FIFO_5125(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
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+ out_be32(&FIFO_5125(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
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+ out_be32(&FIFO_5125(port)->rxalarm, 1);
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+ out_be32(&FIFO_5125(port)->rximr, 0);
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+
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+ out_be32(&FIFO_5125(port)->tximr, MPC512x_PSC_FIFO_ALARM);
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+ out_be32(&FIFO_5125(port)->rximr, MPC512x_PSC_FIFO_ALARM);
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+}
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+
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+static int mpc5125_psc_raw_rx_rdy(struct uart_port *port)
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+{
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+ return !(in_be32(&FIFO_5125(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
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+}
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+
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+static int mpc5125_psc_raw_tx_rdy(struct uart_port *port)
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+{
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+ return !(in_be32(&FIFO_5125(port)->txsr) & MPC512x_PSC_FIFO_FULL);
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+}
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+
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+static int mpc5125_psc_rx_rdy(struct uart_port *port)
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+{
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+ return in_be32(&FIFO_5125(port)->rxsr) &
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+ in_be32(&FIFO_5125(port)->rximr) & MPC512x_PSC_FIFO_ALARM;
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+}
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+
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+static int mpc5125_psc_tx_rdy(struct uart_port *port)
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+{
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+ return in_be32(&FIFO_5125(port)->txsr) &
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+ in_be32(&FIFO_5125(port)->tximr) & MPC512x_PSC_FIFO_ALARM;
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+}
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+
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+static int mpc5125_psc_tx_empty(struct uart_port *port)
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+{
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+ return in_be32(&FIFO_5125(port)->txsr) & MPC512x_PSC_FIFO_EMPTY;
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+}
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+
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+static void mpc5125_psc_stop_rx(struct uart_port *port)
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+{
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+ unsigned long rx_fifo_imr;
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+
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+ rx_fifo_imr = in_be32(&FIFO_5125(port)->rximr);
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+ rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
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+ out_be32(&FIFO_5125(port)->rximr, rx_fifo_imr);
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+}
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+
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+static void mpc5125_psc_start_tx(struct uart_port *port)
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+{
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+ unsigned long tx_fifo_imr;
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+
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+ tx_fifo_imr = in_be32(&FIFO_5125(port)->tximr);
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+ tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
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+ out_be32(&FIFO_5125(port)->tximr, tx_fifo_imr);
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+}
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+
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+static void mpc5125_psc_stop_tx(struct uart_port *port)
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+{
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+ unsigned long tx_fifo_imr;
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+
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+ tx_fifo_imr = in_be32(&FIFO_5125(port)->tximr);
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+ tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
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+ out_be32(&FIFO_5125(port)->tximr, tx_fifo_imr);
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+}
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+
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+static void mpc5125_psc_rx_clr_irq(struct uart_port *port)
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+{
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+ out_be32(&FIFO_5125(port)->rxisr, in_be32(&FIFO_5125(port)->rxisr));
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+}
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+
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+static void mpc5125_psc_tx_clr_irq(struct uart_port *port)
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+{
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+ out_be32(&FIFO_5125(port)->txisr, in_be32(&FIFO_5125(port)->txisr));
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+}
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+
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+static void mpc5125_psc_write_char(struct uart_port *port, unsigned char c)
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+{
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+ out_8(&FIFO_5125(port)->txdata_8, c);
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+}
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+
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+static unsigned char mpc5125_psc_read_char(struct uart_port *port)
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+{
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+ return in_8(&FIFO_5125(port)->rxdata_8);
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+}
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+
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+static void mpc5125_psc_cw_disable_ints(struct uart_port *port)
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+{
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+ port->read_status_mask =
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+ in_be32(&FIFO_5125(port)->tximr) << 16 |
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+ in_be32(&FIFO_5125(port)->rximr);
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+ out_be32(&FIFO_5125(port)->tximr, 0);
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+ out_be32(&FIFO_5125(port)->rximr, 0);
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+}
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+
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+static void mpc5125_psc_cw_restore_ints(struct uart_port *port)
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+{
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+ out_be32(&FIFO_5125(port)->tximr,
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+ (port->read_status_mask >> 16) & 0x7f);
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+ out_be32(&FIFO_5125(port)->rximr, port->read_status_mask & 0x7f);
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+}
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+
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+static inline void mpc5125_set_divisor(struct mpc5125_psc __iomem *psc,
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+ u8 prescaler, unsigned int divisor)
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+{
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+ /* select prescaler */
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+ out_8(&psc->mpc52xx_psc_clock_select, prescaler);
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+ out_8(&psc->ctur, divisor >> 8);
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+ out_8(&psc->ctlr, divisor & 0xff);
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+}
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+
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+static unsigned int mpc5125_psc_set_baudrate(struct uart_port *port,
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+ struct ktermios *new,
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+ struct ktermios *old)
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+{
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+ unsigned int baud;
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+ unsigned int divisor;
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+
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+ /*
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+ * Calculate with a /16 prescaler here.
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+ */
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+
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+ /* uartclk contains the ips freq */
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+ baud = uart_get_baud_rate(port, new, old,
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+ port->uartclk / (16 * 0xffff) + 1,
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+ port->uartclk / 16);
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+ divisor = (port->uartclk + 8 * baud) / (16 * baud);
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+
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+ /* enable the /16 prescaler and set the divisor */
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+ mpc5125_set_divisor(PSC_5125(port), 0xdd, divisor);
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+ return baud;
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+}
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+
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+/*
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+ * MPC5125 have compatible PSC FIFO Controller.
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+ * Special init not needed.
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+ */
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+static u16 mpc5125_psc_get_status(struct uart_port *port)
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+{
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+ return in_be16(&PSC_5125(port)->mpc52xx_psc_status);
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+}
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+
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+static u8 mpc5125_psc_get_ipcr(struct uart_port *port)
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+{
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+ return in_8(&PSC_5125(port)->mpc52xx_psc_ipcr);
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+}
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+
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+static void mpc5125_psc_command(struct uart_port *port, u8 cmd)
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+{
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+ out_8(&PSC_5125(port)->command, cmd);
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+}
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+
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+static void mpc5125_psc_set_mode(struct uart_port *port, u8 mr1, u8 mr2)
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+{
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+ out_8(&PSC_5125(port)->mr1, mr1);
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+ out_8(&PSC_5125(port)->mr2, mr2);
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+}
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+
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+static void mpc5125_psc_set_rts(struct uart_port *port, int state)
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+{
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+ if (state & TIOCM_RTS)
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+ out_8(&PSC_5125(port)->op1, MPC52xx_PSC_OP_RTS);
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+ else
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+ out_8(&PSC_5125(port)->op0, MPC52xx_PSC_OP_RTS);
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+}
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+
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+static void mpc5125_psc_enable_ms(struct uart_port *port)
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+{
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+ struct mpc5125_psc __iomem *psc = PSC_5125(port);
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+
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+ /* clear D_*-bits by reading them */
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+ in_8(&psc->mpc52xx_psc_ipcr);
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+ /* enable CTS and DCD as IPC interrupts */
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+ out_8(&psc->mpc52xx_psc_acr, MPC52xx_PSC_IEC_CTS | MPC52xx_PSC_IEC_DCD);
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+
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+ port->read_status_mask |= MPC52xx_PSC_IMR_IPC;
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+ out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
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+}
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+
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+static void mpc5125_psc_set_sicr(struct uart_port *port, u32 val)
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+{
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+ out_be32(&PSC_5125(port)->sicr, val);
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+}
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+
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+static void mpc5125_psc_set_imr(struct uart_port *port, u16 val)
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+{
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+ out_be16(&PSC_5125(port)->mpc52xx_psc_imr, val);
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+}
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+
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+static u8 mpc5125_psc_get_mr1(struct uart_port *port)
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+{
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+ return in_8(&PSC_5125(port)->mr1);
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+}
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+
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+static struct psc_ops mpc5125_psc_ops = {
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+ .fifo_init = mpc5125_psc_fifo_init,
|
|
|
+ .raw_rx_rdy = mpc5125_psc_raw_rx_rdy,
|
|
|
+ .raw_tx_rdy = mpc5125_psc_raw_tx_rdy,
|
|
|
+ .rx_rdy = mpc5125_psc_rx_rdy,
|
|
|
+ .tx_rdy = mpc5125_psc_tx_rdy,
|
|
|
+ .tx_empty = mpc5125_psc_tx_empty,
|
|
|
+ .stop_rx = mpc5125_psc_stop_rx,
|
|
|
+ .start_tx = mpc5125_psc_start_tx,
|
|
|
+ .stop_tx = mpc5125_psc_stop_tx,
|
|
|
+ .rx_clr_irq = mpc5125_psc_rx_clr_irq,
|
|
|
+ .tx_clr_irq = mpc5125_psc_tx_clr_irq,
|
|
|
+ .write_char = mpc5125_psc_write_char,
|
|
|
+ .read_char = mpc5125_psc_read_char,
|
|
|
+ .cw_disable_ints = mpc5125_psc_cw_disable_ints,
|
|
|
+ .cw_restore_ints = mpc5125_psc_cw_restore_ints,
|
|
|
+ .set_baudrate = mpc5125_psc_set_baudrate,
|
|
|
+ .clock = mpc512x_psc_clock,
|
|
|
+ .fifoc_init = mpc512x_psc_fifoc_init,
|
|
|
+ .fifoc_uninit = mpc512x_psc_fifoc_uninit,
|
|
|
+ .get_irq = mpc512x_psc_get_irq,
|
|
|
+ .handle_irq = mpc512x_psc_handle_irq,
|
|
|
+ .get_status = mpc5125_psc_get_status,
|
|
|
+ .get_ipcr = mpc5125_psc_get_ipcr,
|
|
|
+ .command = mpc5125_psc_command,
|
|
|
+ .set_mode = mpc5125_psc_set_mode,
|
|
|
+ .set_rts = mpc5125_psc_set_rts,
|
|
|
+ .enable_ms = mpc5125_psc_enable_ms,
|
|
|
+ .set_sicr = mpc5125_psc_set_sicr,
|
|
|
+ .set_imr = mpc5125_psc_set_imr,
|
|
|
+ .get_mr1 = mpc5125_psc_get_mr1,
|
|
|
+};
|
|
|
|
|
|
static struct psc_ops mpc512x_psc_ops = {
|
|
|
.fifo_init = mpc512x_psc_fifo_init,
|
|
@@ -595,8 +911,18 @@ static struct psc_ops mpc512x_psc_ops = {
|
|
|
.fifoc_uninit = mpc512x_psc_fifoc_uninit,
|
|
|
.get_irq = mpc512x_psc_get_irq,
|
|
|
.handle_irq = mpc512x_psc_handle_irq,
|
|
|
+ .get_status = mpc52xx_psc_get_status,
|
|
|
+ .get_ipcr = mpc52xx_psc_get_ipcr,
|
|
|
+ .command = mpc52xx_psc_command,
|
|
|
+ .set_mode = mpc52xx_psc_set_mode,
|
|
|
+ .set_rts = mpc52xx_psc_set_rts,
|
|
|
+ .enable_ms = mpc52xx_psc_enable_ms,
|
|
|
+ .set_sicr = mpc52xx_psc_set_sicr,
|
|
|
+ .set_imr = mpc52xx_psc_set_imr,
|
|
|
+ .get_mr1 = mpc52xx_psc_get_mr1,
|
|
|
};
|
|
|
-#endif
|
|
|
+#endif /* CONFIG_PPC_MPC512x */
|
|
|
+
|
|
|
|
|
|
static const struct psc_ops *psc_ops;
|
|
|
|
|
@@ -613,17 +939,14 @@ mpc52xx_uart_tx_empty(struct uart_port *port)
|
|
|
static void
|
|
|
mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|
|
{
|
|
|
- if (mctrl & TIOCM_RTS)
|
|
|
- out_8(&PSC(port)->op1, MPC52xx_PSC_OP_RTS);
|
|
|
- else
|
|
|
- out_8(&PSC(port)->op0, MPC52xx_PSC_OP_RTS);
|
|
|
+ psc_ops->set_rts(port, mctrl & TIOCM_RTS);
|
|
|
}
|
|
|
|
|
|
static unsigned int
|
|
|
mpc52xx_uart_get_mctrl(struct uart_port *port)
|
|
|
{
|
|
|
unsigned int ret = TIOCM_DSR;
|
|
|
- u8 status = in_8(&PSC(port)->mpc52xx_psc_ipcr);
|
|
|
+ u8 status = psc_ops->get_ipcr(port);
|
|
|
|
|
|
if (!(status & MPC52xx_PSC_CTS))
|
|
|
ret |= TIOCM_CTS;
|
|
@@ -673,15 +996,7 @@ mpc52xx_uart_stop_rx(struct uart_port *port)
|
|
|
static void
|
|
|
mpc52xx_uart_enable_ms(struct uart_port *port)
|
|
|
{
|
|
|
- struct mpc52xx_psc __iomem *psc = PSC(port);
|
|
|
-
|
|
|
- /* clear D_*-bits by reading them */
|
|
|
- in_8(&psc->mpc52xx_psc_ipcr);
|
|
|
- /* enable CTS and DCD as IPC interrupts */
|
|
|
- out_8(&psc->mpc52xx_psc_acr, MPC52xx_PSC_IEC_CTS | MPC52xx_PSC_IEC_DCD);
|
|
|
-
|
|
|
- port->read_status_mask |= MPC52xx_PSC_IMR_IPC;
|
|
|
- out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
|
|
|
+ psc_ops->enable_ms(port);
|
|
|
}
|
|
|
|
|
|
static void
|
|
@@ -691,9 +1006,9 @@ mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
|
|
|
spin_lock_irqsave(&port->lock, flags);
|
|
|
|
|
|
if (ctl == -1)
|
|
|
- out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_START_BRK);
|
|
|
else
|
|
|
- out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_STOP_BRK);
|
|
|
|
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
|
}
|
|
@@ -701,7 +1016,6 @@ mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
|
|
|
static int
|
|
|
mpc52xx_uart_startup(struct uart_port *port)
|
|
|
{
|
|
|
- struct mpc52xx_psc __iomem *psc = PSC(port);
|
|
|
int ret;
|
|
|
|
|
|
if (psc_ops->clock) {
|
|
@@ -717,15 +1031,15 @@ mpc52xx_uart_startup(struct uart_port *port)
|
|
|
return ret;
|
|
|
|
|
|
/* Reset/activate the port, clear and enable interrupts */
|
|
|
- out_8(&psc->command, MPC52xx_PSC_RST_RX);
|
|
|
- out_8(&psc->command, MPC52xx_PSC_RST_TX);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_RST_RX);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_RST_TX);
|
|
|
|
|
|
- out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
|
|
|
+ psc_ops->set_sicr(port, 0); /* UART mode DCD ignored */
|
|
|
|
|
|
psc_ops->fifo_init(port);
|
|
|
|
|
|
- out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
|
|
|
- out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_TX_ENABLE);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_RX_ENABLE);
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
@@ -733,19 +1047,20 @@ mpc52xx_uart_startup(struct uart_port *port)
|
|
|
static void
|
|
|
mpc52xx_uart_shutdown(struct uart_port *port)
|
|
|
{
|
|
|
- struct mpc52xx_psc __iomem *psc = PSC(port);
|
|
|
-
|
|
|
/* Shut down the port. Leave TX active if on a console port */
|
|
|
- out_8(&psc->command, MPC52xx_PSC_RST_RX);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_RST_RX);
|
|
|
if (!uart_console(port))
|
|
|
- out_8(&psc->command, MPC52xx_PSC_RST_TX);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_RST_TX);
|
|
|
|
|
|
port->read_status_mask = 0;
|
|
|
- out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
|
|
|
+ psc_ops->set_imr(port, port->read_status_mask);
|
|
|
|
|
|
if (psc_ops->clock)
|
|
|
psc_ops->clock(port, 0);
|
|
|
|
|
|
+ /* Disable interrupt */
|
|
|
+ psc_ops->cw_disable_ints(port);
|
|
|
+
|
|
|
/* Release interrupt */
|
|
|
free_irq(port->irq, port);
|
|
|
}
|
|
@@ -754,7 +1069,6 @@ static void
|
|
|
mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
|
|
|
struct ktermios *old)
|
|
|
{
|
|
|
- struct mpc52xx_psc __iomem *psc = PSC(port);
|
|
|
unsigned long flags;
|
|
|
unsigned char mr1, mr2;
|
|
|
unsigned int j;
|
|
@@ -818,13 +1132,11 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
|
|
|
"Some chars may have been lost.\n");
|
|
|
|
|
|
/* Reset the TX & RX */
|
|
|
- out_8(&psc->command, MPC52xx_PSC_RST_RX);
|
|
|
- out_8(&psc->command, MPC52xx_PSC_RST_TX);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_RST_RX);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_RST_TX);
|
|
|
|
|
|
/* Send new mode settings */
|
|
|
- out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
|
|
|
- out_8(&psc->mode, mr1);
|
|
|
- out_8(&psc->mode, mr2);
|
|
|
+ psc_ops->set_mode(port, mr1, mr2);
|
|
|
baud = psc_ops->set_baudrate(port, new, old);
|
|
|
|
|
|
/* Update the per-port timeout */
|
|
@@ -834,8 +1146,8 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
|
|
|
mpc52xx_uart_enable_ms(port);
|
|
|
|
|
|
/* Reenable TX & RX */
|
|
|
- out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
|
|
|
- out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_TX_ENABLE);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_RX_ENABLE);
|
|
|
|
|
|
/* We're all set, release the lock */
|
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
@@ -963,7 +1275,7 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
|
|
|
flag = TTY_NORMAL;
|
|
|
port->icount.rx++;
|
|
|
|
|
|
- status = in_be16(&PSC(port)->mpc52xx_psc_status);
|
|
|
+ status = psc_ops->get_status(port);
|
|
|
|
|
|
if (status & (MPC52xx_PSC_SR_PE |
|
|
|
MPC52xx_PSC_SR_FE |
|
|
@@ -983,7 +1295,7 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
|
|
|
}
|
|
|
|
|
|
/* Clear error condition */
|
|
|
- out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
|
|
|
+ psc_ops->command(port, MPC52xx_PSC_RST_ERR_STAT);
|
|
|
|
|
|
}
|
|
|
tty_insert_flip_char(tport, ch, flag);
|
|
@@ -1066,7 +1378,7 @@ mpc5xxx_uart_process_int(struct uart_port *port)
|
|
|
if (psc_ops->tx_rdy(port))
|
|
|
keepgoing |= mpc52xx_uart_int_tx_chars(port);
|
|
|
|
|
|
- status = in_8(&PSC(port)->mpc52xx_psc_ipcr);
|
|
|
+ status = psc_ops->get_ipcr(port);
|
|
|
if (status & MPC52xx_PSC_D_DCD)
|
|
|
uart_handle_dcd_change(port, !(status & MPC52xx_PSC_DCD));
|
|
|
|
|
@@ -1107,14 +1419,12 @@ static void __init
|
|
|
mpc52xx_console_get_options(struct uart_port *port,
|
|
|
int *baud, int *parity, int *bits, int *flow)
|
|
|
{
|
|
|
- struct mpc52xx_psc __iomem *psc = PSC(port);
|
|
|
unsigned char mr1;
|
|
|
|
|
|
pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
|
|
|
|
|
|
/* Read the mode registers */
|
|
|
- out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
|
|
|
- mr1 = in_8(&psc->mode);
|
|
|
+ mr1 = psc_ops->get_mr1(port);
|
|
|
|
|
|
/* CT{U,L}R are write-only ! */
|
|
|
*baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
|
|
@@ -1304,6 +1614,7 @@ static struct of_device_id mpc52xx_uart_of_match[] = {
|
|
|
#endif
|
|
|
#ifdef CONFIG_PPC_MPC512x
|
|
|
{ .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
|
|
|
+ { .compatible = "fsl,mpc5125-psc-uart", .data = &mpc5125_psc_ops, },
|
|
|
#endif
|
|
|
{},
|
|
|
};
|
|
@@ -1372,15 +1683,14 @@ static int mpc52xx_uart_of_probe(struct platform_device *op)
|
|
|
if (ret)
|
|
|
return ret;
|
|
|
|
|
|
- dev_set_drvdata(&op->dev, (void *)port);
|
|
|
+ platform_set_drvdata(op, (void *)port);
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
static int
|
|
|
mpc52xx_uart_of_remove(struct platform_device *op)
|
|
|
{
|
|
|
- struct uart_port *port = dev_get_drvdata(&op->dev);
|
|
|
- dev_set_drvdata(&op->dev, NULL);
|
|
|
+ struct uart_port *port = platform_get_drvdata(op);
|
|
|
|
|
|
if (port)
|
|
|
uart_remove_one_port(&mpc52xx_uart_driver, port);
|
|
@@ -1392,7 +1702,7 @@ mpc52xx_uart_of_remove(struct platform_device *op)
|
|
|
static int
|
|
|
mpc52xx_uart_of_suspend(struct platform_device *op, pm_message_t state)
|
|
|
{
|
|
|
- struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
|
|
|
+ struct uart_port *port = (struct uart_port *) platform_get_drvdata(op);
|
|
|
|
|
|
if (port)
|
|
|
uart_suspend_port(&mpc52xx_uart_driver, port);
|
|
@@ -1403,7 +1713,7 @@ mpc52xx_uart_of_suspend(struct platform_device *op, pm_message_t state)
|
|
|
static int
|
|
|
mpc52xx_uart_of_resume(struct platform_device *op)
|
|
|
{
|
|
|
- struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
|
|
|
+ struct uart_port *port = (struct uart_port *) platform_get_drvdata(op);
|
|
|
|
|
|
if (port)
|
|
|
uart_resume_port(&mpc52xx_uart_driver, port);
|