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@@ -100,9 +100,6 @@
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#define OMAP_MMC1_DEVID 0
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#define OMAP_MMC2_DEVID 1
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-#define OMAP_MMC_DATADIR_NONE 0
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-#define OMAP_MMC_DATADIR_READ 1
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-#define OMAP_MMC_DATADIR_WRITE 2
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#define MMC_TIMEOUT_MS 20
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#define OMAP_MMC_MASTER_CLOCK 96000000
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#define DRIVER_NAME "mmci-omap-hs"
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@@ -138,16 +135,14 @@ struct mmc_omap_host {
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resource_size_t mapbase;
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unsigned int id;
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unsigned int dma_len;
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- unsigned int dma_dir;
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+ unsigned int dma_sg_idx;
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unsigned char bus_mode;
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- unsigned char datadir;
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u32 *buffer;
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u32 bytesleft;
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int suspended;
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int irq;
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int carddetect;
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int use_dma, dma_ch;
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- int initstr;
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int slot_id;
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int dbclk_enabled;
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int response_busy;
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@@ -281,6 +276,15 @@ mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd,
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OMAP_HSMMC_WRITE(host->base, CMD, cmdreg);
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}
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+static int
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+mmc_omap_get_dma_dir(struct mmc_omap_host *host, struct mmc_data *data)
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+{
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+ if (data->flags & MMC_DATA_WRITE)
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+ return DMA_TO_DEVICE;
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+ else
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+ return DMA_FROM_DEVICE;
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+}
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+
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/*
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* Notify the transfer complete to MMC core
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*/
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@@ -300,9 +304,7 @@ mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
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if (host->use_dma && host->dma_ch != -1)
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dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
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- host->dma_dir);
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-
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- host->datadir = OMAP_MMC_DATADIR_NONE;
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+ mmc_omap_get_dma_dir(host, data));
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if (!data->error)
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data->bytes_xfered += data->blocks * (data->blksz);
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@@ -352,13 +354,12 @@ static void mmc_dma_cleanup(struct mmc_omap_host *host, int errno)
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if (host->use_dma && host->dma_ch != -1) {
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dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len,
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- host->dma_dir);
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+ mmc_omap_get_dma_dir(host, host->data));
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omap_free_dma(host->dma_ch);
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host->dma_ch = -1;
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up(&host->sem);
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}
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host->data = NULL;
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- host->datadir = OMAP_MMC_DATADIR_NONE;
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}
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/*
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@@ -592,6 +593,55 @@ static irqreturn_t omap_mmc_cd_handler(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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+static int mmc_omap_get_dma_sync_dev(struct mmc_omap_host *host,
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+ struct mmc_data *data)
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+{
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+ int sync_dev;
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+
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+ if (data->flags & MMC_DATA_WRITE) {
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+ if (host->id == OMAP_MMC1_DEVID)
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+ sync_dev = OMAP24XX_DMA_MMC1_TX;
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+ else
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+ sync_dev = OMAP24XX_DMA_MMC2_TX;
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+ } else {
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+ if (host->id == OMAP_MMC1_DEVID)
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+ sync_dev = OMAP24XX_DMA_MMC1_RX;
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+ else
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+ sync_dev = OMAP24XX_DMA_MMC2_RX;
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+ }
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+ return sync_dev;
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+}
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+
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+static void mmc_omap_config_dma_params(struct mmc_omap_host *host,
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+ struct mmc_data *data,
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+ struct scatterlist *sgl)
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+{
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+ int blksz, nblk, dma_ch;
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+
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+ dma_ch = host->dma_ch;
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+ if (data->flags & MMC_DATA_WRITE) {
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+ omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
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+ (host->mapbase + OMAP_HSMMC_DATA), 0, 0);
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+ omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
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+ sg_dma_address(sgl), 0, 0);
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+ } else {
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+ omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
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+ (host->mapbase + OMAP_HSMMC_DATA), 0, 0);
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+ omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
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+ sg_dma_address(sgl), 0, 0);
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+ }
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+
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+ blksz = host->data->blksz;
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+ nblk = sg_dma_len(sgl) / blksz;
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+
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+ omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32,
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+ blksz / 4, nblk, OMAP_DMA_SYNC_FRAME,
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+ mmc_omap_get_dma_sync_dev(host, data),
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+ !(data->flags & MMC_DATA_WRITE));
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+
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+ omap_start_dma(dma_ch);
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+}
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+
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/*
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* DMA call back function
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*/
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@@ -605,6 +655,14 @@ static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
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if (host->dma_ch < 0)
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return;
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+ host->dma_sg_idx++;
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+ if (host->dma_sg_idx < host->dma_len) {
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+ /* Fire up the next transfer. */
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+ mmc_omap_config_dma_params(host, host->data,
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+ host->data->sg + host->dma_sg_idx);
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+ return;
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+ }
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+
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omap_free_dma(host->dma_ch);
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host->dma_ch = -1;
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/*
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@@ -614,39 +672,29 @@ static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
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up(&host->sem);
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}
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-/*
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- * Configure dma src and destination parameters
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- */
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-static int mmc_omap_config_dma_param(int sync_dir, struct mmc_omap_host *host,
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- struct mmc_data *data)
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-{
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- if (sync_dir == 0) {
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- omap_set_dma_dest_params(host->dma_ch, 0,
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- OMAP_DMA_AMODE_CONSTANT,
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- (host->mapbase + OMAP_HSMMC_DATA), 0, 0);
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- omap_set_dma_src_params(host->dma_ch, 0,
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- OMAP_DMA_AMODE_POST_INC,
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- sg_dma_address(&data->sg[0]), 0, 0);
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- } else {
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- omap_set_dma_src_params(host->dma_ch, 0,
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- OMAP_DMA_AMODE_CONSTANT,
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- (host->mapbase + OMAP_HSMMC_DATA), 0, 0);
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- omap_set_dma_dest_params(host->dma_ch, 0,
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- OMAP_DMA_AMODE_POST_INC,
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- sg_dma_address(&data->sg[0]), 0, 0);
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- }
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- return 0;
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-}
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/*
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* Routine to configure and start DMA for the MMC card
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*/
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static int
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mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req)
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{
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- int sync_dev, sync_dir = 0;
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- int dma_ch = 0, ret = 0, err = 1;
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+ int dma_ch = 0, ret = 0, err = 1, i;
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struct mmc_data *data = req->data;
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+ /* Sanity check: all the SG entries must be aligned by block size. */
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+ for (i = 0; i < host->dma_len; i++) {
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+ struct scatterlist *sgl;
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+
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+ sgl = data->sg + i;
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+ if (sgl->length % data->blksz)
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+ return -EINVAL;
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+ }
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+ if ((data->blksz % 4) != 0)
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+ /* REVISIT: The MMC buffer increments only when MSB is written.
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+ * Return error for blksz which is non multiple of four.
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+ */
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+ return -EINVAL;
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+
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/*
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* If for some reason the DMA transfer is still active,
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* we wait for timeout period and free the dma
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@@ -665,49 +713,22 @@ mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req)
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return err;
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}
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- if (!(data->flags & MMC_DATA_WRITE)) {
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- host->dma_dir = DMA_FROM_DEVICE;
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- if (host->id == OMAP_MMC1_DEVID)
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- sync_dev = OMAP24XX_DMA_MMC1_RX;
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- else
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- sync_dev = OMAP24XX_DMA_MMC2_RX;
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- } else {
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- host->dma_dir = DMA_TO_DEVICE;
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- if (host->id == OMAP_MMC1_DEVID)
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- sync_dev = OMAP24XX_DMA_MMC1_TX;
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- else
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- sync_dev = OMAP24XX_DMA_MMC2_TX;
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- }
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-
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- ret = omap_request_dma(sync_dev, "MMC/SD", mmc_omap_dma_cb,
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- host, &dma_ch);
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+ ret = omap_request_dma(mmc_omap_get_dma_sync_dev(host, data), "MMC/SD",
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+ mmc_omap_dma_cb,host, &dma_ch);
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if (ret != 0) {
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- dev_dbg(mmc_dev(host->mmc),
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+ dev_err(mmc_dev(host->mmc),
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"%s: omap_request_dma() failed with %d\n",
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mmc_hostname(host->mmc), ret);
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return ret;
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}
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host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
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- data->sg_len, host->dma_dir);
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+ data->sg_len, mmc_omap_get_dma_dir(host, data));
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host->dma_ch = dma_ch;
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+ host->dma_sg_idx = 0;
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- if (!(data->flags & MMC_DATA_WRITE))
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- mmc_omap_config_dma_param(1, host, data);
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- else
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- mmc_omap_config_dma_param(0, host, data);
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-
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- if ((data->blksz % 4) == 0)
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- omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32,
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- (data->blksz / 4), data->blocks, OMAP_DMA_SYNC_FRAME,
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- sync_dev, sync_dir);
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- else
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- /* REVISIT: The MMC buffer increments only when MSB is written.
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- * Return error for blksz which is non multiple of four.
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- */
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- return -EINVAL;
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+ mmc_omap_config_dma_params(host, data, data->sg);
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- omap_start_dma(dma_ch);
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return 0;
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}
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@@ -757,7 +778,6 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
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host->data = req->data;
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if (req->data == NULL) {
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- host->datadir = OMAP_MMC_DATADIR_NONE;
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OMAP_HSMMC_WRITE(host->base, BLK, 0);
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return 0;
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}
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@@ -766,9 +786,6 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
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| (req->data->blocks << 16));
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set_data_timeout(host, req);
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- host->datadir = (req->data->flags & MMC_DATA_WRITE) ?
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- OMAP_MMC_DATADIR_WRITE : OMAP_MMC_DATADIR_READ;
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-
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if (host->use_dma) {
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ret = mmc_omap_start_dma_transfer(host, req);
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if (ret != 0) {
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@@ -1027,10 +1044,11 @@ static int __init omap_mmc_probe(struct platform_device *pdev)
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else
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host->dbclk_enabled = 1;
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-#ifdef CONFIG_MMC_BLOCK_BOUNCE
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- mmc->max_phys_segs = 1;
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- mmc->max_hw_segs = 1;
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-#endif
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+ /* Since we do only SG emulation, we can have as many segs
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+ * as we want. */
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+ mmc->max_phys_segs = 1024;
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+ mmc->max_hw_segs = 1024;
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+
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mmc->max_blk_size = 512; /* Block Length at max can be 1024 */
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mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */
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mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
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