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ARM: dts: imx: Add the missing cpus node

To make it consistent with the other i.mx SoCs, let's add the cpus nodes.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Fabio Estevam 12 years ago
parent
commit
070bd7e491
3 changed files with 30 additions and 0 deletions
  1. 10 0
      arch/arm/boot/dts/imx25.dtsi
  2. 10 0
      arch/arm/boot/dts/imx31.dtsi
  3. 10 0
      arch/arm/boot/dts/imx53.dtsi

+ 10 - 0
arch/arm/boot/dts/imx25.dtsi

@@ -32,6 +32,16 @@
 		usb1 = &usbhost1;
 	};
 
+	cpus {
+		#address-cells = <0>;
+		#size-cells = <0>;
+
+		cpu {
+			compatible = "arm,arm926ej-s";
+			device_type = "cpu";
+		};
+	};
+
 	asic: asic-interrupt-controller@68000000 {
 		compatible = "fsl,imx25-asic", "fsl,avic";
 		interrupt-controller;

+ 10 - 0
arch/arm/boot/dts/imx31.dtsi

@@ -20,6 +20,16 @@
 		serial4 = &uart5;
 	};
 
+	cpus {
+		#address-cells = <0>;
+		#size-cells = <0>;
+
+		cpu {
+			compatible = "arm,arm1136";
+			device_type = "cpu";
+		};
+	};
+
 	avic: avic-interrupt-controller@60000000 {
 		compatible = "fsl,imx31-avic", "fsl,avic";
 		interrupt-controller;

+ 10 - 0
arch/arm/boot/dts/imx53.dtsi

@@ -35,6 +35,16 @@
 		spi2 = &cspi;
 	};
 
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a8";
+			reg = <0x0>;
+		};
+	};
+
 	tzic: tz-interrupt-controller@0fffc000 {
 		compatible = "fsl,imx53-tzic", "fsl,tzic";
 		interrupt-controller;