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@@ -19,20 +19,12 @@
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/of.h>
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+#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <linux/of_i2c.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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-/* Register defines */
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-#define MV64XXX_I2C_REG_SLAVE_ADDR 0x00
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-#define MV64XXX_I2C_REG_DATA 0x04
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-#define MV64XXX_I2C_REG_CONTROL 0x08
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-#define MV64XXX_I2C_REG_STATUS 0x0c
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-#define MV64XXX_I2C_REG_BAUD 0x0c
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-#define MV64XXX_I2C_REG_EXT_SLAVE_ADDR 0x10
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-#define MV64XXX_I2C_REG_SOFT_RESET 0x1c
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-
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#define MV64XXX_I2C_ADDR_ADDR(val) ((val & 0x7f) << 1)
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#define MV64XXX_I2C_BAUD_DIV_N(val) (val & 0x7)
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#define MV64XXX_I2C_BAUD_DIV_M(val) ((val & 0xf) << 3)
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@@ -89,6 +81,16 @@ enum {
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MV64XXX_I2C_ACTION_SEND_STOP,
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};
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+struct mv64xxx_i2c_regs {
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+ u8 addr;
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+ u8 ext_addr;
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+ u8 data;
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+ u8 control;
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+ u8 status;
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+ u8 clock;
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+ u8 soft_reset;
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+};
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+
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struct mv64xxx_i2c_data {
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struct i2c_msg *msgs;
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int num_msgs;
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@@ -98,6 +100,7 @@ struct mv64xxx_i2c_data {
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u32 aborting;
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u32 cntl_bits;
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void __iomem *reg_base;
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+ struct mv64xxx_i2c_regs reg_offsets;
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u32 addr1;
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u32 addr2;
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u32 bytes_left;
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@@ -116,6 +119,16 @@ struct mv64xxx_i2c_data {
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struct i2c_adapter adapter;
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};
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+static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = {
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+ .addr = 0x00,
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+ .ext_addr = 0x10,
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+ .data = 0x04,
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+ .control = 0x08,
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+ .status = 0x0c,
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+ .clock = 0x0c,
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+ .soft_reset = 0x1c,
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+};
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+
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static void
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mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
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struct i2c_msg *msg)
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@@ -154,13 +167,13 @@ mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
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static void
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mv64xxx_i2c_hw_init(struct mv64xxx_i2c_data *drv_data)
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{
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- writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SOFT_RESET);
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+ writel(0, drv_data->reg_base + drv_data->reg_offsets.soft_reset);
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writel(MV64XXX_I2C_BAUD_DIV_M(drv_data->freq_m) | MV64XXX_I2C_BAUD_DIV_N(drv_data->freq_n),
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- drv_data->reg_base + MV64XXX_I2C_REG_BAUD);
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- writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SLAVE_ADDR);
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- writel(0, drv_data->reg_base + MV64XXX_I2C_REG_EXT_SLAVE_ADDR);
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+ drv_data->reg_base + drv_data->reg_offsets.clock);
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+ writel(0, drv_data->reg_base + drv_data->reg_offsets.addr);
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+ writel(0, drv_data->reg_base + drv_data->reg_offsets.ext_addr);
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writel(MV64XXX_I2C_REG_CONTROL_TWSIEN | MV64XXX_I2C_REG_CONTROL_STOP,
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- drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
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+ drv_data->reg_base + drv_data->reg_offsets.control);
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drv_data->state = MV64XXX_I2C_STATE_IDLE;
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}
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@@ -282,7 +295,7 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
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drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_START;
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writel(drv_data->cntl_bits,
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- drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
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+ drv_data->reg_base + drv_data->reg_offsets.control);
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drv_data->msgs++;
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drv_data->num_msgs--;
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@@ -300,48 +313,48 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
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case MV64XXX_I2C_ACTION_CONTINUE:
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writel(drv_data->cntl_bits,
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- drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
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+ drv_data->reg_base + drv_data->reg_offsets.control);
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break;
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case MV64XXX_I2C_ACTION_SEND_START:
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writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_START,
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- drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
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+ drv_data->reg_base + drv_data->reg_offsets.control);
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break;
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case MV64XXX_I2C_ACTION_SEND_ADDR_1:
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writel(drv_data->addr1,
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- drv_data->reg_base + MV64XXX_I2C_REG_DATA);
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+ drv_data->reg_base + drv_data->reg_offsets.data);
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writel(drv_data->cntl_bits,
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- drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
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+ drv_data->reg_base + drv_data->reg_offsets.control);
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break;
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case MV64XXX_I2C_ACTION_SEND_ADDR_2:
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writel(drv_data->addr2,
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- drv_data->reg_base + MV64XXX_I2C_REG_DATA);
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+ drv_data->reg_base + drv_data->reg_offsets.data);
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writel(drv_data->cntl_bits,
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- drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
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+ drv_data->reg_base + drv_data->reg_offsets.control);
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break;
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case MV64XXX_I2C_ACTION_SEND_DATA:
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writel(drv_data->msg->buf[drv_data->byte_posn++],
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- drv_data->reg_base + MV64XXX_I2C_REG_DATA);
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+ drv_data->reg_base + drv_data->reg_offsets.data);
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writel(drv_data->cntl_bits,
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- drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
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+ drv_data->reg_base + drv_data->reg_offsets.control);
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break;
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case MV64XXX_I2C_ACTION_RCV_DATA:
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drv_data->msg->buf[drv_data->byte_posn++] =
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- readl(drv_data->reg_base + MV64XXX_I2C_REG_DATA);
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+ readl(drv_data->reg_base + drv_data->reg_offsets.data);
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writel(drv_data->cntl_bits,
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- drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
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+ drv_data->reg_base + drv_data->reg_offsets.control);
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break;
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case MV64XXX_I2C_ACTION_RCV_DATA_STOP:
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drv_data->msg->buf[drv_data->byte_posn++] =
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- readl(drv_data->reg_base + MV64XXX_I2C_REG_DATA);
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+ readl(drv_data->reg_base + drv_data->reg_offsets.data);
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drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
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writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
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- drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
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+ drv_data->reg_base + drv_data->reg_offsets.control);
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drv_data->block = 0;
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wake_up(&drv_data->waitq);
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break;
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@@ -356,7 +369,7 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
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case MV64XXX_I2C_ACTION_SEND_STOP:
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drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
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writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
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- drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
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+ drv_data->reg_base + drv_data->reg_offsets.control);
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drv_data->block = 0;
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wake_up(&drv_data->waitq);
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break;
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@@ -372,9 +385,9 @@ mv64xxx_i2c_intr(int irq, void *dev_id)
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irqreturn_t rc = IRQ_NONE;
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spin_lock_irqsave(&drv_data->lock, flags);
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- while (readl(drv_data->reg_base + MV64XXX_I2C_REG_CONTROL) &
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+ while (readl(drv_data->reg_base + drv_data->reg_offsets.control) &
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MV64XXX_I2C_REG_CONTROL_IFLG) {
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- status = readl(drv_data->reg_base + MV64XXX_I2C_REG_STATUS);
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+ status = readl(drv_data->reg_base + drv_data->reg_offsets.status);
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mv64xxx_i2c_fsm(drv_data, status);
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mv64xxx_i2c_do_action(drv_data);
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rc = IRQ_HANDLED;
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@@ -495,6 +508,12 @@ static const struct i2c_algorithm mv64xxx_i2c_algo = {
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*
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*****************************************************************************
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*/
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+static const struct of_device_id mv64xxx_i2c_of_match_table[] = {
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+ { .compatible = "marvell,mv64xxx-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
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+ {}
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+};
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+MODULE_DEVICE_TABLE(of, mv64xxx_i2c_of_match_table);
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+
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#ifdef CONFIG_OF
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static int
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mv64xxx_calc_freq(const int tclk, const int n, const int m)
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@@ -528,8 +547,10 @@ mv64xxx_find_baud_factors(const u32 req_freq, const u32 tclk, u32 *best_n,
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static int
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mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
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- struct device_node *np)
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+ struct device *dev)
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{
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+ const struct of_device_id *device;
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+ struct device_node *np = dev->of_node;
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u32 bus_freq, tclk;
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int rc = 0;
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@@ -558,6 +579,13 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
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* So hard code the value to 1 second.
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*/
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drv_data->adapter.timeout = HZ;
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+
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+ device = of_match_device(mv64xxx_i2c_of_match_table, dev);
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+ if (!device)
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+ return -ENODEV;
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+
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+ memcpy(&drv_data->reg_offsets, device->data, sizeof(drv_data->reg_offsets));
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+
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out:
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return rc;
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#endif
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@@ -565,7 +593,7 @@ out:
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#else /* CONFIG_OF */
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static int
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mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
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- struct device_node *np)
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+ struct device *dev)
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{
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return -ENODEV;
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}
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@@ -611,8 +639,9 @@ mv64xxx_i2c_probe(struct platform_device *pd)
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drv_data->freq_n = pdata->freq_n;
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drv_data->irq = platform_get_irq(pd, 0);
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drv_data->adapter.timeout = msecs_to_jiffies(pdata->timeout);
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+ memcpy(&drv_data->reg_offsets, &mv64xxx_i2c_regs_mv64xxx, sizeof(drv_data->reg_offsets));
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} else if (pd->dev.of_node) {
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- rc = mv64xxx_of_config(drv_data, pd->dev.of_node);
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+ rc = mv64xxx_of_config(drv_data, &pd->dev);
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if (rc)
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goto exit_clk;
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}
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@@ -680,12 +709,6 @@ mv64xxx_i2c_remove(struct platform_device *dev)
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return 0;
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}
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-static const struct of_device_id mv64xxx_i2c_of_match_table[] = {
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- { .compatible = "marvell,mv64xxx-i2c", },
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- {}
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-};
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-MODULE_DEVICE_TABLE(of, mv64xxx_i2c_of_match_table);
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-
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static struct platform_driver mv64xxx_i2c_driver = {
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.probe = mv64xxx_i2c_probe,
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.remove = mv64xxx_i2c_remove,
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