cmd_reginfo.c 10.0 KB

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  1. /*
  2. * (C) Copyright 2000
  3. * Subodh Nijsure, SkyStream Networks, snijsure@skystream.com
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <command.h>
  25. #if defined(CONFIG_8xx)
  26. #include <mpc8xx.h>
  27. #elif defined (CONFIG_4xx)
  28. extern void ppc4xx_reginfo(void);
  29. #elif defined (CONFIG_5xx)
  30. #include <mpc5xx.h>
  31. #elif defined (CONFIG_MPC5200)
  32. #include <mpc5xxx.h>
  33. #elif defined (CONFIG_MPC86xx)
  34. extern void mpc86xx_reginfo(void);
  35. #elif defined(CONFIG_MPC85xx)
  36. extern void mpc85xx_reginfo(void);
  37. #endif
  38. static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc,
  39. char * const argv[])
  40. {
  41. #if defined(CONFIG_8xx)
  42. volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
  43. volatile memctl8xx_t *memctl = &immap->im_memctl;
  44. volatile sysconf8xx_t *sysconf = &immap->im_siu_conf;
  45. volatile sit8xx_t *timers = &immap->im_sit;
  46. /* Hopefully more PowerPC knowledgable people will add code to display
  47. * other useful registers
  48. */
  49. printf ("\nSystem Configuration registers\n"
  50. "\tIMMR\t0x%08X\n", get_immr(0));
  51. printf("\tSIUMCR\t0x%08X", sysconf->sc_siumcr);
  52. printf("\tSYPCR\t0x%08X\n",sysconf->sc_sypcr);
  53. printf("\tSWT\t0x%08X", sysconf->sc_swt);
  54. printf("\tSWSR\t0x%04X\n", sysconf->sc_swsr);
  55. printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X\n",
  56. sysconf->sc_sipend, sysconf->sc_simask);
  57. printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X\n",
  58. sysconf->sc_siel, sysconf->sc_sivec);
  59. printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n",
  60. sysconf->sc_tesr, sysconf->sc_sdcr);
  61. printf ("Memory Controller Registers\n"
  62. "\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0);
  63. printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, memctl->memc_or1);
  64. printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, memctl->memc_or2);
  65. printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl->memc_br3, memctl->memc_or3);
  66. printf("\tBR4\t0x%08X\tOR4\t0x%08X \n", memctl->memc_br4, memctl->memc_or4);
  67. printf("\tBR5\t0x%08X\tOR5\t0x%08X \n", memctl->memc_br5, memctl->memc_or5);
  68. printf("\tBR6\t0x%08X\tOR6\t0x%08X \n", memctl->memc_br6, memctl->memc_or6);
  69. printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", memctl->memc_br7, memctl->memc_or7);
  70. printf ("\n"
  71. "\tmamr\t0x%08X\tmbmr\t0x%08X \n",
  72. memctl->memc_mamr, memctl->memc_mbmr );
  73. printf("\tmstat\t0x%08X\tmptpr\t0x%08X \n",
  74. memctl->memc_mstat, memctl->memc_mptpr );
  75. printf("\tmdr\t0x%08X \n", memctl->memc_mdr);
  76. printf ("\nSystem Integration Timers\n"
  77. "\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n",
  78. timers->sit_tbscr, timers->sit_rtcsc);
  79. printf("\tPISCR\t0x%08X \n", timers->sit_piscr);
  80. /*
  81. * May be some CPM info here?
  82. */
  83. #elif defined (CONFIG_4xx)
  84. ppc4xx_reginfo();
  85. #elif defined(CONFIG_5xx)
  86. volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
  87. volatile memctl5xx_t *memctl = &immap->im_memctl;
  88. volatile sysconf5xx_t *sysconf = &immap->im_siu_conf;
  89. volatile sit5xx_t *timers = &immap->im_sit;
  90. volatile car5xx_t *car = &immap->im_clkrst;
  91. volatile uimb5xx_t *uimb = &immap->im_uimb;
  92. puts ("\nSystem Configuration registers\n");
  93. printf("\tIMMR\t0x%08X\tSIUMCR\t0x%08X \n", get_immr(0), sysconf->sc_siumcr);
  94. printf("\tSYPCR\t0x%08X\tSWSR\t0x%04X \n" ,sysconf->sc_sypcr, sysconf->sc_swsr);
  95. printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X \n", sysconf->sc_sipend, sysconf->sc_simask);
  96. printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X \n", sysconf->sc_siel, sysconf->sc_sivec);
  97. printf("\tTESR\t0x%08X\n", sysconf->sc_tesr);
  98. puts ("\nMemory Controller Registers\n");
  99. printf("\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0);
  100. printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, memctl->memc_or1);
  101. printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, memctl->memc_or2);
  102. printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl->memc_br3, memctl->memc_or3);
  103. printf("\tDMBR\t0x%08X\tDMOR\t0x%08X \n", memctl->memc_dmbr, memctl->memc_dmor );
  104. printf("\tMSTAT\t0x%08X\n", memctl->memc_mstat);
  105. puts ("\nSystem Integration Timers\n");
  106. printf("\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n", timers->sit_tbscr, timers->sit_rtcsc);
  107. printf("\tPISCR\t0x%08X \n", timers->sit_piscr);
  108. puts ("\nClocks and Reset\n");
  109. printf("\tSCCR\t0x%08X\tPLPRCR\t0x%08X \n", car->car_sccr, car->car_plprcr);
  110. puts ("\nU-Bus to IMB3 Bus Interface\n");
  111. printf("\tUMCR\t0x%08X\tUIPEND\t0x%08X \n", uimb->uimb_umcr, uimb->uimb_uipend);
  112. puts ("\n\n");
  113. #elif defined(CONFIG_MPC5200)
  114. puts ("\nMPC5200 registers\n");
  115. printf ("MBAR=%08x\n", CONFIG_SYS_MBAR);
  116. puts ("Memory map registers\n");
  117. printf ("\tCS0: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
  118. *(volatile ulong*)MPC5XXX_CS0_START,
  119. *(volatile ulong*)MPC5XXX_CS0_STOP,
  120. *(volatile ulong*)MPC5XXX_CS0_CFG,
  121. (*(volatile ulong*)MPC5XXX_ADDECR & 0x00010000) ? 1 : 0);
  122. printf ("\tCS1: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
  123. *(volatile ulong*)MPC5XXX_CS1_START,
  124. *(volatile ulong*)MPC5XXX_CS1_STOP,
  125. *(volatile ulong*)MPC5XXX_CS1_CFG,
  126. (*(volatile ulong*)MPC5XXX_ADDECR & 0x00020000) ? 1 : 0);
  127. printf ("\tCS2: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
  128. *(volatile ulong*)MPC5XXX_CS2_START,
  129. *(volatile ulong*)MPC5XXX_CS2_STOP,
  130. *(volatile ulong*)MPC5XXX_CS2_CFG,
  131. (*(volatile ulong*)MPC5XXX_ADDECR & 0x00040000) ? 1 : 0);
  132. printf ("\tCS3: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
  133. *(volatile ulong*)MPC5XXX_CS3_START,
  134. *(volatile ulong*)MPC5XXX_CS3_STOP,
  135. *(volatile ulong*)MPC5XXX_CS3_CFG,
  136. (*(volatile ulong*)MPC5XXX_ADDECR & 0x00080000) ? 1 : 0);
  137. printf ("\tCS4: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
  138. *(volatile ulong*)MPC5XXX_CS4_START,
  139. *(volatile ulong*)MPC5XXX_CS4_STOP,
  140. *(volatile ulong*)MPC5XXX_CS4_CFG,
  141. (*(volatile ulong*)MPC5XXX_ADDECR & 0x00100000) ? 1 : 0);
  142. printf ("\tCS5: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
  143. *(volatile ulong*)MPC5XXX_CS5_START,
  144. *(volatile ulong*)MPC5XXX_CS5_STOP,
  145. *(volatile ulong*)MPC5XXX_CS5_CFG,
  146. (*(volatile ulong*)MPC5XXX_ADDECR & 0x00200000) ? 1 : 0);
  147. printf ("\tCS6: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
  148. *(volatile ulong*)MPC5XXX_CS6_START,
  149. *(volatile ulong*)MPC5XXX_CS6_STOP,
  150. *(volatile ulong*)MPC5XXX_CS6_CFG,
  151. (*(volatile ulong*)MPC5XXX_ADDECR & 0x04000000) ? 1 : 0);
  152. printf ("\tCS7: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
  153. *(volatile ulong*)MPC5XXX_CS7_START,
  154. *(volatile ulong*)MPC5XXX_CS7_STOP,
  155. *(volatile ulong*)MPC5XXX_CS7_CFG,
  156. (*(volatile ulong*)MPC5XXX_ADDECR & 0x08000000) ? 1 : 0);
  157. printf ("\tBOOTCS: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
  158. *(volatile ulong*)MPC5XXX_BOOTCS_START,
  159. *(volatile ulong*)MPC5XXX_BOOTCS_STOP,
  160. *(volatile ulong*)MPC5XXX_BOOTCS_CFG,
  161. (*(volatile ulong*)MPC5XXX_ADDECR & 0x02000000) ? 1 : 0);
  162. printf ("\tSDRAMCS0: %08lX\n",
  163. *(volatile ulong*)MPC5XXX_SDRAM_CS0CFG);
  164. printf ("\tSDRAMCS1: %08lX\n",
  165. *(volatile ulong*)MPC5XXX_SDRAM_CS1CFG);
  166. #elif defined(CONFIG_MPC86xx)
  167. mpc86xx_reginfo();
  168. #elif defined(CONFIG_MPC85xx)
  169. mpc85xx_reginfo();
  170. #elif defined(CONFIG_BLACKFIN)
  171. puts("\nSystem Configuration registers\n");
  172. #ifndef __ADSPBF60x__
  173. puts("\nPLL Registers\n");
  174. printf("\tPLL_DIV: 0x%04x PLL_CTL: 0x%04x\n",
  175. bfin_read_PLL_DIV(), bfin_read_PLL_CTL());
  176. printf("\tPLL_STAT: 0x%04x PLL_LOCKCNT: 0x%04x\n",
  177. bfin_read_PLL_STAT(), bfin_read_PLL_LOCKCNT());
  178. printf("\tVR_CTL: 0x%04x\n", bfin_read_VR_CTL());
  179. puts("\nEBIU AMC Registers\n");
  180. printf("\tEBIU_AMGCTL: 0x%04x\n", bfin_read_EBIU_AMGCTL());
  181. printf("\tEBIU_AMBCTL0: 0x%08x EBIU_AMBCTL1: 0x%08x\n",
  182. bfin_read_EBIU_AMBCTL0(), bfin_read_EBIU_AMBCTL1());
  183. # ifdef EBIU_MODE
  184. printf("\tEBIU_MBSCTL: 0x%08x EBIU_ARBSTAT: 0x%08x\n",
  185. bfin_read_EBIU_MBSCTL(), bfin_read_EBIU_ARBSTAT());
  186. printf("\tEBIU_MODE: 0x%08x EBIU_FCTL: 0x%08x\n",
  187. bfin_read_EBIU_MODE(), bfin_read_EBIU_FCTL());
  188. # endif
  189. # ifdef EBIU_RSTCTL
  190. puts("\nEBIU DDR Registers\n");
  191. printf("\tEBIU_DDRCTL0: 0x%08x EBIU_DDRCTL1: 0x%08x\n",
  192. bfin_read_EBIU_DDRCTL0(), bfin_read_EBIU_DDRCTL1());
  193. printf("\tEBIU_DDRCTL2: 0x%08x EBIU_DDRCTL3: 0x%08x\n",
  194. bfin_read_EBIU_DDRCTL2(), bfin_read_EBIU_DDRCTL3());
  195. printf("\tEBIU_DDRQUE: 0x%08x EBIU_RSTCTL 0x%04x\n",
  196. bfin_read_EBIU_DDRQUE(), bfin_read_EBIU_RSTCTL());
  197. printf("\tEBIU_ERRADD: 0x%08x EBIU_ERRMST: 0x%04x\n",
  198. bfin_read_EBIU_ERRADD(), bfin_read_EBIU_ERRMST());
  199. # else
  200. puts("\nEBIU SDC Registers\n");
  201. printf("\tEBIU_SDRRC: 0x%04x EBIU_SDBCTL: 0x%04x\n",
  202. bfin_read_EBIU_SDRRC(), bfin_read_EBIU_SDBCTL());
  203. printf("\tEBIU_SDSTAT: 0x%04x EBIU_SDGCTL: 0x%08x\n",
  204. bfin_read_EBIU_SDSTAT(), bfin_read_EBIU_SDGCTL());
  205. # endif
  206. #else
  207. puts("\nCGU Registers\n");
  208. printf("\tCGU_DIV: 0x%08x CGU_CTL: 0x%08x\n",
  209. bfin_read_CGU_DIV(), bfin_read_CGU_CTL());
  210. printf("\tCGU_STAT: 0x%08x CGU_LOCKCNT: 0x%08x\n",
  211. bfin_read_CGU_STAT(), bfin_read_CGU_CLKOUTSEL());
  212. puts("\nSMC DDR Registers\n");
  213. printf("\tDDR_CFG: 0x%08x DDR_TR0: 0x%08x\n",
  214. bfin_read_DMC0_CFG(), bfin_read_DMC0_TR0());
  215. printf("\tDDR_TR1: 0x%08x DDR_TR2: 0x%08x\n",
  216. bfin_read_DMC0_TR1(), bfin_read_DMC0_TR2());
  217. printf("\tDDR_MR: 0x%08x DDR_EMR1: 0x%08x\n",
  218. bfin_read_DMC0_MR(), bfin_read_DMC0_EMR1());
  219. printf("\tDDR_CTL: 0x%08x DDR_STAT: 0x%08x\n",
  220. bfin_read_DMC0_CTL(), bfin_read_DMC0_STAT());
  221. printf("\tDDR_DLLCTL:0x%08x\n", bfin_read_DMC0_DLLCTL());
  222. #endif
  223. #endif /* CONFIG_BLACKFIN */
  224. return 0;
  225. }
  226. /**************************************************/
  227. #if defined(CONFIG_CMD_REGINFO)
  228. U_BOOT_CMD(
  229. reginfo, 2, 1, do_reginfo,
  230. "print register information",
  231. ""
  232. );
  233. #endif