cmd_pci.c 15 KB

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  1. /*
  2. * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  3. * Andreas Heppel <aheppel@sysgo.de>
  4. *
  5. * (C) Copyright 2002
  6. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  7. * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. /*
  28. * PCI routines
  29. */
  30. #include <common.h>
  31. #include <command.h>
  32. #include <asm/processor.h>
  33. #include <asm/io.h>
  34. #include <pci.h>
  35. /*
  36. * Follows routines for the output of infos about devices on PCI bus.
  37. */
  38. void pci_header_show(pci_dev_t dev);
  39. void pci_header_show_brief(pci_dev_t dev);
  40. /*
  41. * Subroutine: pciinfo
  42. *
  43. * Description: Show information about devices on PCI bus.
  44. * Depending on the define CONFIG_SYS_SHORT_PCI_LISTING
  45. * the output will be more or less exhaustive.
  46. *
  47. * Inputs: bus_no the number of the bus to be scanned.
  48. *
  49. * Return: None
  50. *
  51. */
  52. void pciinfo(int BusNum, int ShortPCIListing)
  53. {
  54. int Device;
  55. int Function;
  56. unsigned char HeaderType;
  57. unsigned short VendorID;
  58. pci_dev_t dev;
  59. printf("Scanning PCI devices on bus %d\n", BusNum);
  60. if (ShortPCIListing) {
  61. printf("BusDevFun VendorId DeviceId Device Class Sub-Class\n");
  62. printf("_____________________________________________________________\n");
  63. }
  64. for (Device = 0; Device < PCI_MAX_PCI_DEVICES; Device++) {
  65. HeaderType = 0;
  66. VendorID = 0;
  67. for (Function = 0; Function < PCI_MAX_PCI_FUNCTIONS; Function++) {
  68. /*
  69. * If this is not a multi-function device, we skip the rest.
  70. */
  71. if (Function && !(HeaderType & 0x80))
  72. break;
  73. dev = PCI_BDF(BusNum, Device, Function);
  74. pci_read_config_word(dev, PCI_VENDOR_ID, &VendorID);
  75. if ((VendorID == 0xFFFF) || (VendorID == 0x0000))
  76. continue;
  77. if (!Function) pci_read_config_byte(dev, PCI_HEADER_TYPE, &HeaderType);
  78. if (ShortPCIListing)
  79. {
  80. printf("%02x.%02x.%02x ", BusNum, Device, Function);
  81. pci_header_show_brief(dev);
  82. }
  83. else
  84. {
  85. printf("\nFound PCI device %02x.%02x.%02x:\n",
  86. BusNum, Device, Function);
  87. pci_header_show(dev);
  88. }
  89. }
  90. }
  91. }
  92. /*
  93. * Subroutine: pci_header_show_brief
  94. *
  95. * Description: Reads and prints the header of the
  96. * specified PCI device in short form.
  97. *
  98. * Inputs: dev Bus+Device+Function number
  99. *
  100. * Return: None
  101. *
  102. */
  103. void pci_header_show_brief(pci_dev_t dev)
  104. {
  105. u16 vendor, device;
  106. u8 class, subclass;
  107. pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
  108. pci_read_config_word(dev, PCI_DEVICE_ID, &device);
  109. pci_read_config_byte(dev, PCI_CLASS_CODE, &class);
  110. pci_read_config_byte(dev, PCI_CLASS_SUB_CODE, &subclass);
  111. printf("0x%.4x 0x%.4x %-23s 0x%.2x\n",
  112. vendor, device,
  113. pci_class_str(class), subclass);
  114. }
  115. /*
  116. * Subroutine: PCI_Header_Show
  117. *
  118. * Description: Reads the header of the specified PCI device.
  119. *
  120. * Inputs: BusDevFunc Bus+Device+Function number
  121. *
  122. * Return: None
  123. *
  124. */
  125. void pci_header_show(pci_dev_t dev)
  126. {
  127. u8 _byte, header_type;
  128. u16 _word;
  129. u32 _dword;
  130. #define PRINT(msg, type, reg) \
  131. pci_read_config_##type(dev, reg, &_##type); \
  132. printf(msg, _##type)
  133. #define PRINT2(msg, type, reg, func) \
  134. pci_read_config_##type(dev, reg, &_##type); \
  135. printf(msg, _##type, func(_##type))
  136. pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
  137. PRINT (" vendor ID = 0x%.4x\n", word, PCI_VENDOR_ID);
  138. PRINT (" device ID = 0x%.4x\n", word, PCI_DEVICE_ID);
  139. PRINT (" command register = 0x%.4x\n", word, PCI_COMMAND);
  140. PRINT (" status register = 0x%.4x\n", word, PCI_STATUS);
  141. PRINT (" revision ID = 0x%.2x\n", byte, PCI_REVISION_ID);
  142. PRINT2(" class code = 0x%.2x (%s)\n", byte, PCI_CLASS_CODE,
  143. pci_class_str);
  144. PRINT (" sub class code = 0x%.2x\n", byte, PCI_CLASS_SUB_CODE);
  145. PRINT (" programming interface = 0x%.2x\n", byte, PCI_CLASS_PROG);
  146. PRINT (" cache line = 0x%.2x\n", byte, PCI_CACHE_LINE_SIZE);
  147. PRINT (" latency time = 0x%.2x\n", byte, PCI_LATENCY_TIMER);
  148. PRINT (" header type = 0x%.2x\n", byte, PCI_HEADER_TYPE);
  149. PRINT (" BIST = 0x%.2x\n", byte, PCI_BIST);
  150. PRINT (" base address 0 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_0);
  151. switch (header_type & 0x03) {
  152. case PCI_HEADER_TYPE_NORMAL: /* "normal" PCI device */
  153. PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1);
  154. PRINT (" base address 2 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_2);
  155. PRINT (" base address 3 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_3);
  156. PRINT (" base address 4 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_4);
  157. PRINT (" base address 5 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_5);
  158. PRINT (" cardBus CIS pointer = 0x%.8x\n", dword, PCI_CARDBUS_CIS);
  159. PRINT (" sub system vendor ID = 0x%.4x\n", word, PCI_SUBSYSTEM_VENDOR_ID);
  160. PRINT (" sub system ID = 0x%.4x\n", word, PCI_SUBSYSTEM_ID);
  161. PRINT (" expansion ROM base address = 0x%.8x\n", dword, PCI_ROM_ADDRESS);
  162. PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE);
  163. PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN);
  164. PRINT (" min Grant = 0x%.2x\n", byte, PCI_MIN_GNT);
  165. PRINT (" max Latency = 0x%.2x\n", byte, PCI_MAX_LAT);
  166. break;
  167. case PCI_HEADER_TYPE_BRIDGE: /* PCI-to-PCI bridge */
  168. PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1);
  169. PRINT (" primary bus number = 0x%.2x\n", byte, PCI_PRIMARY_BUS);
  170. PRINT (" secondary bus number = 0x%.2x\n", byte, PCI_SECONDARY_BUS);
  171. PRINT (" subordinate bus number = 0x%.2x\n", byte, PCI_SUBORDINATE_BUS);
  172. PRINT (" secondary latency timer = 0x%.2x\n", byte, PCI_SEC_LATENCY_TIMER);
  173. PRINT (" IO base = 0x%.2x\n", byte, PCI_IO_BASE);
  174. PRINT (" IO limit = 0x%.2x\n", byte, PCI_IO_LIMIT);
  175. PRINT (" secondary status = 0x%.4x\n", word, PCI_SEC_STATUS);
  176. PRINT (" memory base = 0x%.4x\n", word, PCI_MEMORY_BASE);
  177. PRINT (" memory limit = 0x%.4x\n", word, PCI_MEMORY_LIMIT);
  178. PRINT (" prefetch memory base = 0x%.4x\n", word, PCI_PREF_MEMORY_BASE);
  179. PRINT (" prefetch memory limit = 0x%.4x\n", word, PCI_PREF_MEMORY_LIMIT);
  180. PRINT (" prefetch memory base upper = 0x%.8x\n", dword, PCI_PREF_BASE_UPPER32);
  181. PRINT (" prefetch memory limit upper = 0x%.8x\n", dword, PCI_PREF_LIMIT_UPPER32);
  182. PRINT (" IO base upper 16 bits = 0x%.4x\n", word, PCI_IO_BASE_UPPER16);
  183. PRINT (" IO limit upper 16 bits = 0x%.4x\n", word, PCI_IO_LIMIT_UPPER16);
  184. PRINT (" expansion ROM base address = 0x%.8x\n", dword, PCI_ROM_ADDRESS1);
  185. PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE);
  186. PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN);
  187. PRINT (" bridge control = 0x%.4x\n", word, PCI_BRIDGE_CONTROL);
  188. break;
  189. case PCI_HEADER_TYPE_CARDBUS: /* PCI-to-CardBus bridge */
  190. PRINT (" capabilities = 0x%.2x\n", byte, PCI_CB_CAPABILITY_LIST);
  191. PRINT (" secondary status = 0x%.4x\n", word, PCI_CB_SEC_STATUS);
  192. PRINT (" primary bus number = 0x%.2x\n", byte, PCI_CB_PRIMARY_BUS);
  193. PRINT (" CardBus number = 0x%.2x\n", byte, PCI_CB_CARD_BUS);
  194. PRINT (" subordinate bus number = 0x%.2x\n", byte, PCI_CB_SUBORDINATE_BUS);
  195. PRINT (" CardBus latency timer = 0x%.2x\n", byte, PCI_CB_LATENCY_TIMER);
  196. PRINT (" CardBus memory base 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_0);
  197. PRINT (" CardBus memory limit 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_0);
  198. PRINT (" CardBus memory base 1 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_1);
  199. PRINT (" CardBus memory limit 1 = 0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_1);
  200. PRINT (" CardBus IO base 0 = 0x%.4x\n", word, PCI_CB_IO_BASE_0);
  201. PRINT (" CardBus IO base high 0 = 0x%.4x\n", word, PCI_CB_IO_BASE_0_HI);
  202. PRINT (" CardBus IO limit 0 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_0);
  203. PRINT (" CardBus IO limit high 0 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_0_HI);
  204. PRINT (" CardBus IO base 1 = 0x%.4x\n", word, PCI_CB_IO_BASE_1);
  205. PRINT (" CardBus IO base high 1 = 0x%.4x\n", word, PCI_CB_IO_BASE_1_HI);
  206. PRINT (" CardBus IO limit 1 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_1);
  207. PRINT (" CardBus IO limit high 1 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_1_HI);
  208. PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE);
  209. PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN);
  210. PRINT (" bridge control = 0x%.4x\n", word, PCI_CB_BRIDGE_CONTROL);
  211. PRINT (" subvendor ID = 0x%.4x\n", word, PCI_CB_SUBSYSTEM_VENDOR_ID);
  212. PRINT (" subdevice ID = 0x%.4x\n", word, PCI_CB_SUBSYSTEM_ID);
  213. PRINT (" PC Card 16bit base address = 0x%.8x\n", dword, PCI_CB_LEGACY_MODE_BASE);
  214. break;
  215. default:
  216. printf("unknown header\n");
  217. break;
  218. }
  219. #undef PRINT
  220. #undef PRINT2
  221. }
  222. /* Convert the "bus.device.function" identifier into a number.
  223. */
  224. static pci_dev_t get_pci_dev(char* name)
  225. {
  226. char cnum[12];
  227. int len, i, iold, n;
  228. int bdfs[3] = {0,0,0};
  229. len = strlen(name);
  230. if (len > 8)
  231. return -1;
  232. for (i = 0, iold = 0, n = 0; i < len; i++) {
  233. if (name[i] == '.') {
  234. memcpy(cnum, &name[iold], i - iold);
  235. cnum[i - iold] = '\0';
  236. bdfs[n++] = simple_strtoul(cnum, NULL, 16);
  237. iold = i + 1;
  238. }
  239. }
  240. strcpy(cnum, &name[iold]);
  241. if (n == 0)
  242. n = 1;
  243. bdfs[n] = simple_strtoul(cnum, NULL, 16);
  244. return PCI_BDF(bdfs[0], bdfs[1], bdfs[2]);
  245. }
  246. static int pci_cfg_display(pci_dev_t bdf, ulong addr, ulong size, ulong length)
  247. {
  248. #define DISP_LINE_LEN 16
  249. ulong i, nbytes, linebytes;
  250. int rc = 0;
  251. if (length == 0)
  252. length = 0x40 / size; /* Standard PCI configuration space */
  253. /* Print the lines.
  254. * once, and all accesses are with the specified bus width.
  255. */
  256. nbytes = length * size;
  257. do {
  258. uint val4;
  259. ushort val2;
  260. u_char val1;
  261. printf("%08lx:", addr);
  262. linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes;
  263. for (i=0; i<linebytes; i+= size) {
  264. if (size == 4) {
  265. pci_read_config_dword(bdf, addr, &val4);
  266. printf(" %08x", val4);
  267. } else if (size == 2) {
  268. pci_read_config_word(bdf, addr, &val2);
  269. printf(" %04x", val2);
  270. } else {
  271. pci_read_config_byte(bdf, addr, &val1);
  272. printf(" %02x", val1);
  273. }
  274. addr += size;
  275. }
  276. printf("\n");
  277. nbytes -= linebytes;
  278. if (ctrlc()) {
  279. rc = 1;
  280. break;
  281. }
  282. } while (nbytes > 0);
  283. return (rc);
  284. }
  285. static int pci_cfg_write (pci_dev_t bdf, ulong addr, ulong size, ulong value)
  286. {
  287. if (size == 4) {
  288. pci_write_config_dword(bdf, addr, value);
  289. }
  290. else if (size == 2) {
  291. ushort val = value & 0xffff;
  292. pci_write_config_word(bdf, addr, val);
  293. }
  294. else {
  295. u_char val = value & 0xff;
  296. pci_write_config_byte(bdf, addr, val);
  297. }
  298. return 0;
  299. }
  300. static int
  301. pci_cfg_modify (pci_dev_t bdf, ulong addr, ulong size, ulong value, int incrflag)
  302. {
  303. ulong i;
  304. int nbytes;
  305. uint val4;
  306. ushort val2;
  307. u_char val1;
  308. /* Print the address, followed by value. Then accept input for
  309. * the next value. A non-converted value exits.
  310. */
  311. do {
  312. printf("%08lx:", addr);
  313. if (size == 4) {
  314. pci_read_config_dword(bdf, addr, &val4);
  315. printf(" %08x", val4);
  316. }
  317. else if (size == 2) {
  318. pci_read_config_word(bdf, addr, &val2);
  319. printf(" %04x", val2);
  320. }
  321. else {
  322. pci_read_config_byte(bdf, addr, &val1);
  323. printf(" %02x", val1);
  324. }
  325. nbytes = readline (" ? ");
  326. if (nbytes == 0 || (nbytes == 1 && console_buffer[0] == '-')) {
  327. /* <CR> pressed as only input, don't modify current
  328. * location and move to next. "-" pressed will go back.
  329. */
  330. if (incrflag)
  331. addr += nbytes ? -size : size;
  332. nbytes = 1;
  333. #ifdef CONFIG_BOOT_RETRY_TIME
  334. reset_cmd_timeout(); /* good enough to not time out */
  335. #endif
  336. }
  337. #ifdef CONFIG_BOOT_RETRY_TIME
  338. else if (nbytes == -2) {
  339. break; /* timed out, exit the command */
  340. }
  341. #endif
  342. else {
  343. char *endp;
  344. i = simple_strtoul(console_buffer, &endp, 16);
  345. nbytes = endp - console_buffer;
  346. if (nbytes) {
  347. #ifdef CONFIG_BOOT_RETRY_TIME
  348. /* good enough to not time out
  349. */
  350. reset_cmd_timeout();
  351. #endif
  352. pci_cfg_write (bdf, addr, size, i);
  353. if (incrflag)
  354. addr += size;
  355. }
  356. }
  357. } while (nbytes);
  358. return 0;
  359. }
  360. /* PCI Configuration Space access commands
  361. *
  362. * Syntax:
  363. * pci display[.b, .w, .l] bus.device.function} [addr] [len]
  364. * pci next[.b, .w, .l] bus.device.function [addr]
  365. * pci modify[.b, .w, .l] bus.device.function [addr]
  366. * pci write[.b, .w, .l] bus.device.function addr value
  367. */
  368. static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  369. {
  370. ulong addr = 0, value = 0, size = 0;
  371. pci_dev_t bdf = 0;
  372. char cmd = 's';
  373. if (argc > 1)
  374. cmd = argv[1][0];
  375. switch (cmd) {
  376. case 'd': /* display */
  377. case 'n': /* next */
  378. case 'm': /* modify */
  379. case 'w': /* write */
  380. /* Check for a size specification. */
  381. size = cmd_get_data_size(argv[1], 4);
  382. if (argc > 3)
  383. addr = simple_strtoul(argv[3], NULL, 16);
  384. if (argc > 4)
  385. value = simple_strtoul(argv[4], NULL, 16);
  386. case 'h': /* header */
  387. if (argc < 3)
  388. goto usage;
  389. if ((bdf = get_pci_dev(argv[2])) == -1)
  390. return 1;
  391. break;
  392. #ifdef CONFIG_CMD_PCI_ENUM
  393. case 'e':
  394. break;
  395. #endif
  396. default: /* scan bus */
  397. value = 1; /* short listing */
  398. bdf = 0; /* bus number */
  399. if (argc > 1) {
  400. if (argv[argc-1][0] == 'l') {
  401. value = 0;
  402. argc--;
  403. }
  404. if (argc > 1)
  405. bdf = simple_strtoul(argv[1], NULL, 16);
  406. }
  407. pciinfo(bdf, value);
  408. return 0;
  409. }
  410. switch (argv[1][0]) {
  411. case 'h': /* header */
  412. pci_header_show(bdf);
  413. return 0;
  414. case 'd': /* display */
  415. return pci_cfg_display(bdf, addr, size, value);
  416. #ifdef CONFIG_CMD_PCI_ENUM
  417. case 'e':
  418. pci_init();
  419. return 0;
  420. #endif
  421. case 'n': /* next */
  422. if (argc < 4)
  423. goto usage;
  424. return pci_cfg_modify(bdf, addr, size, value, 0);
  425. case 'm': /* modify */
  426. if (argc < 4)
  427. goto usage;
  428. return pci_cfg_modify(bdf, addr, size, value, 1);
  429. case 'w': /* write */
  430. if (argc < 5)
  431. goto usage;
  432. return pci_cfg_write(bdf, addr, size, value);
  433. }
  434. return 1;
  435. usage:
  436. return CMD_RET_USAGE;
  437. }
  438. /***************************************************/
  439. #ifdef CONFIG_SYS_LONGHELP
  440. static char pci_help_text[] =
  441. "[bus] [long]\n"
  442. " - short or long list of PCI devices on bus 'bus'\n"
  443. #ifdef CONFIG_CMD_PCI_ENUM
  444. "pci enum\n"
  445. " - re-enumerate PCI buses\n"
  446. #endif
  447. "pci header b.d.f\n"
  448. " - show header of PCI device 'bus.device.function'\n"
  449. "pci display[.b, .w, .l] b.d.f [address] [# of objects]\n"
  450. " - display PCI configuration space (CFG)\n"
  451. "pci next[.b, .w, .l] b.d.f address\n"
  452. " - modify, read and keep CFG address\n"
  453. "pci modify[.b, .w, .l] b.d.f address\n"
  454. " - modify, auto increment CFG address\n"
  455. "pci write[.b, .w, .l] b.d.f address value\n"
  456. " - write to CFG address";
  457. #endif
  458. U_BOOT_CMD(
  459. pci, 5, 1, do_pci,
  460. "list and access PCI Configuration Space", pci_help_text
  461. );