cmd_eeprom.c 12 KB

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  1. /*
  2. * (C) Copyright 2000, 2001
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * Support for read and write access to EEPROM like memory devices. This
  26. * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
  27. * FRAM devices read and write data at bus speed. In particular, there is no
  28. * write delay. Also, there is no limit imposed on the number of bytes that can
  29. * be transferred with a single read or write.
  30. *
  31. * Use the following configuration options to ensure no unneeded performance
  32. * degradation (typical for EEPROM) is incured for FRAM memory:
  33. *
  34. * #define CONFIG_SYS_I2C_FRAM
  35. * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
  36. *
  37. */
  38. #include <common.h>
  39. #include <config.h>
  40. #include <command.h>
  41. #include <i2c.h>
  42. extern void eeprom_init (void);
  43. extern int eeprom_read (unsigned dev_addr, unsigned offset,
  44. uchar *buffer, unsigned cnt);
  45. extern int eeprom_write (unsigned dev_addr, unsigned offset,
  46. uchar *buffer, unsigned cnt);
  47. #if defined(CONFIG_SYS_EEPROM_WREN)
  48. extern int eeprom_write_enable (unsigned dev_addr, int state);
  49. #endif
  50. #if defined(CONFIG_SYS_EEPROM_X40430)
  51. /* Maximum number of times to poll for acknowledge after write */
  52. #define MAX_ACKNOWLEDGE_POLLS 10
  53. #endif
  54. /* ------------------------------------------------------------------------- */
  55. #if defined(CONFIG_CMD_EEPROM)
  56. int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  57. {
  58. const char *const fmt =
  59. "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
  60. #if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
  61. if (argc == 6) {
  62. ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
  63. ulong addr = simple_strtoul (argv[3], NULL, 16);
  64. ulong off = simple_strtoul (argv[4], NULL, 16);
  65. ulong cnt = simple_strtoul (argv[5], NULL, 16);
  66. #else
  67. if (argc == 5) {
  68. ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
  69. ulong addr = simple_strtoul (argv[2], NULL, 16);
  70. ulong off = simple_strtoul (argv[3], NULL, 16);
  71. ulong cnt = simple_strtoul (argv[4], NULL, 16);
  72. #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
  73. # if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
  74. eeprom_init ();
  75. # endif /* !CONFIG_SPI */
  76. if (strcmp (argv[1], "read") == 0) {
  77. int rcode;
  78. printf (fmt, dev_addr, argv[1], addr, off, cnt);
  79. rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
  80. puts ("done\n");
  81. return rcode;
  82. } else if (strcmp (argv[1], "write") == 0) {
  83. int rcode;
  84. printf (fmt, dev_addr, argv[1], addr, off, cnt);
  85. rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
  86. puts ("done\n");
  87. return rcode;
  88. }
  89. }
  90. return CMD_RET_USAGE;
  91. }
  92. #endif
  93. /*-----------------------------------------------------------------------
  94. *
  95. * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
  96. * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
  97. *
  98. * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
  99. * 0x00000nxx for EEPROM address selectors and page number at n.
  100. */
  101. #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
  102. #if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
  103. #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
  104. #endif
  105. #endif
  106. int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
  107. {
  108. unsigned end = offset + cnt;
  109. unsigned blk_off;
  110. int rcode = 0;
  111. /* Read data until done or would cross a page boundary.
  112. * We must write the address again when changing pages
  113. * because the next page may be in a different device.
  114. */
  115. while (offset < end) {
  116. unsigned alen, len;
  117. #if !defined(CONFIG_SYS_I2C_FRAM)
  118. unsigned maxlen;
  119. #endif
  120. #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
  121. uchar addr[2];
  122. blk_off = offset & 0xFF; /* block offset */
  123. addr[0] = offset >> 8; /* block number */
  124. addr[1] = blk_off; /* block offset */
  125. alen = 2;
  126. #else
  127. uchar addr[3];
  128. blk_off = offset & 0xFF; /* block offset */
  129. addr[0] = offset >> 16; /* block number */
  130. addr[1] = offset >> 8; /* upper address octet */
  131. addr[2] = blk_off; /* lower address octet */
  132. alen = 3;
  133. #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
  134. addr[0] |= dev_addr; /* insert device address */
  135. len = end - offset;
  136. /*
  137. * For a FRAM device there is no limit on the number of the
  138. * bytes that can be ccessed with the single read or write
  139. * operation.
  140. */
  141. #if !defined(CONFIG_SYS_I2C_FRAM)
  142. maxlen = 0x100 - blk_off;
  143. if (maxlen > I2C_RXTX_LEN)
  144. maxlen = I2C_RXTX_LEN;
  145. if (len > maxlen)
  146. len = maxlen;
  147. #endif
  148. #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
  149. spi_read (addr, alen, buffer, len);
  150. #else
  151. if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0)
  152. rcode = 1;
  153. #endif
  154. buffer += len;
  155. offset += len;
  156. }
  157. return rcode;
  158. }
  159. /*-----------------------------------------------------------------------
  160. *
  161. * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
  162. * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
  163. *
  164. * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
  165. * 0x00000nxx for EEPROM address selectors and page number at n.
  166. */
  167. int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
  168. {
  169. unsigned end = offset + cnt;
  170. unsigned blk_off;
  171. int rcode = 0;
  172. #if defined(CONFIG_SYS_EEPROM_X40430)
  173. uchar contr_r_addr[2];
  174. uchar addr_void[2];
  175. uchar contr_reg[2];
  176. uchar ctrl_reg_v;
  177. int i;
  178. #endif
  179. #if defined(CONFIG_SYS_EEPROM_WREN)
  180. eeprom_write_enable (dev_addr,1);
  181. #endif
  182. /* Write data until done or would cross a write page boundary.
  183. * We must write the address again when changing pages
  184. * because the address counter only increments within a page.
  185. */
  186. while (offset < end) {
  187. unsigned alen, len;
  188. #if !defined(CONFIG_SYS_I2C_FRAM)
  189. unsigned maxlen;
  190. #endif
  191. #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
  192. uchar addr[2];
  193. blk_off = offset & 0xFF; /* block offset */
  194. addr[0] = offset >> 8; /* block number */
  195. addr[1] = blk_off; /* block offset */
  196. alen = 2;
  197. #else
  198. uchar addr[3];
  199. blk_off = offset & 0xFF; /* block offset */
  200. addr[0] = offset >> 16; /* block number */
  201. addr[1] = offset >> 8; /* upper address octet */
  202. addr[2] = blk_off; /* lower address octet */
  203. alen = 3;
  204. #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
  205. addr[0] |= dev_addr; /* insert device address */
  206. len = end - offset;
  207. /*
  208. * For a FRAM device there is no limit on the number of the
  209. * bytes that can be accessed with the single read or write
  210. * operation.
  211. */
  212. #if !defined(CONFIG_SYS_I2C_FRAM)
  213. #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
  214. #define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
  215. #define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
  216. maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
  217. #else
  218. maxlen = 0x100 - blk_off;
  219. #endif
  220. if (maxlen > I2C_RXTX_LEN)
  221. maxlen = I2C_RXTX_LEN;
  222. if (len > maxlen)
  223. len = maxlen;
  224. #endif
  225. #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
  226. spi_write (addr, alen, buffer, len);
  227. #else
  228. #if defined(CONFIG_SYS_EEPROM_X40430)
  229. /* Get the value of the control register.
  230. * Set current address (internal pointer in the x40430)
  231. * to 0x1ff.
  232. */
  233. contr_r_addr[0] = 9;
  234. contr_r_addr[1] = 0xff;
  235. addr_void[0] = 0;
  236. addr_void[1] = addr[1];
  237. #ifdef CONFIG_SYS_I2C_EEPROM_ADDR
  238. contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
  239. addr_void[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
  240. #endif
  241. contr_reg[0] = 0xff;
  242. if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
  243. rcode = 1;
  244. }
  245. ctrl_reg_v = contr_reg[0];
  246. /* Are any of the eeprom blocks write protected?
  247. */
  248. if (ctrl_reg_v & 0x18) {
  249. ctrl_reg_v &= ~0x18; /* reset block protect bits */
  250. ctrl_reg_v |= 0x02; /* set write enable latch */
  251. ctrl_reg_v &= ~0x04; /* clear RWEL */
  252. /* Set write enable latch.
  253. */
  254. contr_reg[0] = 0x02;
  255. if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
  256. rcode = 1;
  257. }
  258. /* Set register write enable latch.
  259. */
  260. contr_reg[0] = 0x06;
  261. if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
  262. rcode = 1;
  263. }
  264. /* Modify ctrl register.
  265. */
  266. contr_reg[0] = ctrl_reg_v;
  267. if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
  268. rcode = 1;
  269. }
  270. /* The write (above) is an operation on NV memory.
  271. * These can take some time (~5ms), and the device
  272. * will not respond to further I2C messages till
  273. * it's completed the write.
  274. * So poll device for an I2C acknowledge.
  275. * When we get one we know we can continue with other
  276. * operations.
  277. */
  278. contr_reg[0] = 0;
  279. for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
  280. if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
  281. break; /* got ack */
  282. #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
  283. udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
  284. #endif
  285. }
  286. if (i == MAX_ACKNOWLEDGE_POLLS) {
  287. puts ("EEPROM poll acknowledge failed\n");
  288. rcode = 1;
  289. }
  290. }
  291. /* Is the write enable latch on?.
  292. */
  293. else if (!(ctrl_reg_v & 0x02)) {
  294. /* Set write enable latch.
  295. */
  296. contr_reg[0] = 0x02;
  297. if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
  298. rcode = 1;
  299. }
  300. }
  301. /* Write is enabled ... now write eeprom value.
  302. */
  303. #endif
  304. if (i2c_write (addr[0], offset, alen-1, buffer, len) != 0)
  305. rcode = 1;
  306. #endif
  307. buffer += len;
  308. offset += len;
  309. #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
  310. udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
  311. #endif
  312. }
  313. #if defined(CONFIG_SYS_EEPROM_WREN)
  314. eeprom_write_enable (dev_addr,0);
  315. #endif
  316. return rcode;
  317. }
  318. #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
  319. int
  320. eeprom_probe (unsigned dev_addr, unsigned offset)
  321. {
  322. unsigned char chip;
  323. /* Probe the chip address
  324. */
  325. #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
  326. chip = offset >> 8; /* block number */
  327. #else
  328. chip = offset >> 16; /* block number */
  329. #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
  330. chip |= dev_addr; /* insert device address */
  331. return (i2c_probe (chip));
  332. }
  333. #endif
  334. /*-----------------------------------------------------------------------
  335. * Set default values
  336. */
  337. #ifndef CONFIG_SYS_I2C_SPEED
  338. #define CONFIG_SYS_I2C_SPEED 50000
  339. #endif
  340. void eeprom_init (void)
  341. {
  342. #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
  343. spi_init_f ();
  344. #endif
  345. #if defined(CONFIG_HARD_I2C) || \
  346. defined(CONFIG_SOFT_I2C)
  347. i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  348. #endif
  349. }
  350. /*-----------------------------------------------------------------------
  351. */
  352. /***************************************************/
  353. #if defined(CONFIG_CMD_EEPROM)
  354. #ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
  355. U_BOOT_CMD(
  356. eeprom, 6, 1, do_eeprom,
  357. "EEPROM sub-system",
  358. "read devaddr addr off cnt\n"
  359. "eeprom write devaddr addr off cnt\n"
  360. " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
  361. );
  362. #else /* One EEPROM */
  363. U_BOOT_CMD(
  364. eeprom, 5, 1, do_eeprom,
  365. "EEPROM sub-system",
  366. "read addr off cnt\n"
  367. "eeprom write addr off cnt\n"
  368. " - read/write `cnt' bytes at EEPROM offset `off'"
  369. );
  370. #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
  371. #endif