articiaS_pci.c 15 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <pci.h>
  25. #include "memio.h"
  26. #include "articiaS.h"
  27. DECLARE_GLOBAL_DATA_PTR;
  28. #undef ARTICIA_PCI_DEBUG
  29. #ifdef ARTICIA_PCI_DEBUG
  30. #define PRINTF(fmt,args...) printf (fmt ,##args)
  31. #else
  32. #define PRINTF(fmt,args...)
  33. #endif
  34. struct pci_controller articiaS_hose;
  35. long irq_alloc(long wanted);
  36. static pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_class, int index);
  37. static int articiaS_init_vga(void);
  38. static void pci_cfgfunc_dummy(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table);
  39. unsigned char pci_irq_alloc(void);
  40. extern void via_cfgfunc_via686(struct pci_controller * host, pci_dev_t dev, struct pci_config_table *table);
  41. extern void via_cfgfunc_ide_init(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table);
  42. extern void via_init_irq_routing(uint8 []);
  43. extern void via_init_afterscan(void);
  44. #define cfgfunc_via686 1
  45. #define cfgfunc_dummy 2
  46. #define cfgfunc_ide_init 3
  47. static struct pci_config_table config_table[] =
  48. {
  49. {
  50. 0x1106, PCI_ANY_ID, PCI_CLASS_BRIDGE_ISA, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  51. (void *)cfgfunc_via686, {0, 0, 0}
  52. },
  53. {
  54. 0x1106, PCI_ANY_ID, PCI_ANY_ID, 0,7,4,
  55. (void *)cfgfunc_dummy, {0,0,0}
  56. },
  57. {
  58. 0x1106, 0x3068, PCI_ANY_ID, 0, 7, PCI_ANY_ID,
  59. (void *)cfgfunc_dummy, {0,0,0}
  60. },
  61. {
  62. 0x1106, PCI_ANY_ID, PCI_ANY_ID, 0,7,1,
  63. (void *)cfgfunc_ide_init, {0,0,0}
  64. },
  65. {
  66. 0,
  67. }
  68. };
  69. void pci_cfgfunc_dummy(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table)
  70. {
  71. }
  72. unsigned long irq_penalties[16] =
  73. {
  74. 1000, /* 0:timer */
  75. 1000, /* 1:keyboard */
  76. 1000, /* 2:cascade */
  77. 50, /* 3:serial (COM2) */
  78. 50, /* 4:serial (COM1) */
  79. 4, /* 5:USB2 */
  80. 100, /* 6:floppy */
  81. 3, /* 7:parallel */
  82. 50, /* 8:AC97/MC97 */
  83. 0, /* 9: */
  84. 3, /* 10:: */
  85. 0, /* 11: */
  86. 3, /* 12: USB1 */
  87. 0, /* 13: */
  88. 100, /* 14: ide0 */
  89. 100, /* 15: ide1 */
  90. };
  91. /*
  92. * The following defines a hard-coded interrupt mapping for the
  93. * know devices on the board.
  94. * If a device isn't found here, assumed to be a device that's
  95. * plugged into a PCI or AGP slot
  96. * NOTE: This table is machine dependant.
  97. */
  98. struct pci_irq_fixup_table
  99. {
  100. uint8 bus; /* Bus number */
  101. uint8 device; /* Device number */
  102. uint8 func; /* Function number */
  103. uint8 interrupt; /* Interrupt to use (0xff to disable) */
  104. };
  105. struct pci_irq_fixup_table fixuptab [] =
  106. {
  107. { 0, 0, 0, 0xff}, /* Articia S host bridge */
  108. { 0, 1, 0, 0xff}, /* Articia S AGP bridge */
  109. /* { 0, 6, 0, 0x05}, /###* 3COM ethernet */
  110. { 0, 7, 0, 0xff}, /* VIA southbridge */
  111. { 0, 7, 1, 0x0e}, /* IDE controller in legacy mode */
  112. /* { 0, 7, 2, 0x05}, /###* First USB controller */
  113. /* { 0, 7, 3, 0x0c}, /###* Second USB controller (shares interrupt with ethernet) */
  114. { 0, 7, 4, 0xff}, /* ACPI Power Management */
  115. /* { 0, 7, 5, 0x08}, /###* AC97 */
  116. /* { 0, 7, 6, 0x08}, /###* MC97 */
  117. { 0xff, 0xff, 0xff, 0xff}
  118. };
  119. /*
  120. * This table maps IRQ's to PCI interrupts
  121. */
  122. uint8 pci_intmap[4] = {0, 0, 0, 0};
  123. /*
  124. * Map PCI slots to interrupt routings
  125. * This table lists the device number assigned to a card inserted
  126. * into the slot, along with a permutation for the slot's IRQ routing.
  127. * NOTE: This table is machine dependant.
  128. */
  129. struct pci_slot_irq_routing
  130. {
  131. uint8 bus;
  132. uint8 device;
  133. uint8 ints[4];
  134. };
  135. struct pci_slot_irq_routing amigaone_pci_routing[] =
  136. {
  137. {0, 8, {0, 1, 2, 3}}, /* Slot 1 (left of riser slot) */
  138. {0, 9, {1, 2, 3, 0}}, /* Slot 2 (middle slot) */
  139. {0, 10, {2, 3, 0, 1}}, /* Slot 3 (leftmost slot) */
  140. {1, 0, {1, 0, 2, 3}}, /* AGP slot (only IRQA and IRQB) */
  141. {1, 1, {1, 2, 3, 0}}, /* PCI slot on AGP bus */
  142. {0, 6, {3, 3, 3, 3}}, /* On board ethernet */
  143. {0, 7, {0, 1, 2, 3}}, /* Southbridge */
  144. {0xff, 0, {0, 0, 0, 0}}
  145. };
  146. void articiaS_pci_irq_init(void)
  147. {
  148. char *s;
  149. s = getenv("pci_irqa");
  150. if (s)
  151. pci_intmap[0] = simple_strtoul (s, NULL, 10);
  152. else
  153. pci_intmap[0] = pci_irq_alloc();
  154. s = getenv("pci_irqb");
  155. if (s)
  156. pci_intmap[1] = simple_strtoul (s, NULL, 10);
  157. else
  158. pci_intmap[1] = pci_irq_alloc();
  159. s = getenv("pci_irqc");
  160. if (s)
  161. pci_intmap[2] = simple_strtoul (s, NULL, 10);
  162. else
  163. pci_intmap[2] = pci_irq_alloc();
  164. s = getenv("pci_irqd");
  165. if (s)
  166. pci_intmap[3] = simple_strtoul (s, NULL, 10);
  167. else
  168. pci_intmap[3] = pci_irq_alloc();
  169. }
  170. unsigned char pci_irq_alloc(void)
  171. {
  172. int i;
  173. int interrupt = 10;
  174. unsigned long min_penalty = 1000;
  175. /* Search for the minimal penalty, favoring interrupts at the end */
  176. for (i = 0; i < 16; i++)
  177. {
  178. if (irq_penalties[i] <= min_penalty)
  179. {
  180. interrupt = i;
  181. min_penalty = irq_penalties[i];
  182. }
  183. }
  184. PRINTF("pci_irq_alloc: Minimal penalty is %ld for %d\n", min_penalty, interrupt);
  185. irq_penalties[interrupt]++;
  186. return interrupt;
  187. }
  188. void articiaS_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
  189. {
  190. int8 bus, device, func, pin, line;
  191. int i;
  192. bus = PCI_BUS(dev);
  193. device = PCI_DEV(dev);
  194. func = PCI_FUNC(dev);
  195. PRINTF("Fixup irq of %d:%d.%d\n", bus, device, func);
  196. /* Search for the device in the table */
  197. for (i = 0; fixuptab[i].bus != 0xff; i++)
  198. {
  199. if (bus == fixuptab[i].bus && device == fixuptab[i].device && func == fixuptab[i].func)
  200. {
  201. /* If the device needs an interrupt, write it */
  202. if (fixuptab[i].interrupt != 0xff)
  203. {
  204. PRINTF("Assigning IRQ %d (fixed)\n", fixuptab[i].interrupt);
  205. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, fixuptab[i].interrupt);
  206. }
  207. else
  208. {
  209. /* Otherwise, see if it wants an interrupt, and disable it if needed */
  210. pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
  211. if (pin)
  212. {
  213. PRINTF("Disabling IRQ\n");
  214. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 0xff);
  215. }
  216. }
  217. return;
  218. }
  219. }
  220. /* If we get here, we have another PCI device in a slot... find the appropriate IRQ */
  221. /* Find matching pin */
  222. pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
  223. pin--;
  224. /* Search for it's map */
  225. for (i = 0; amigaone_pci_routing[i].bus != 0xff; i++)
  226. {
  227. if (bus == amigaone_pci_routing[i].bus && device == amigaone_pci_routing[i].device)
  228. {
  229. line = pci_intmap[amigaone_pci_routing[i].ints[pin]];
  230. PRINTF("Assigning IRQ %d (pin %d)\n", line, pin);
  231. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, line);
  232. return;
  233. }
  234. }
  235. PRINTF("Unkonwn PCI device found\n");
  236. }
  237. void articiaS_pci_init (void)
  238. {
  239. int i;
  240. char *s;
  241. PRINTF("atriciaS_pci_init\n");
  242. /* Why aren't these relocated?? */
  243. for (i=0; config_table[i].config_device; i++)
  244. {
  245. switch((int)config_table[i].config_device)
  246. {
  247. case cfgfunc_via686: config_table[i].config_device = via_cfgfunc_via686; break;
  248. case cfgfunc_dummy: config_table[i].config_device = pci_cfgfunc_dummy; break;
  249. case cfgfunc_ide_init: config_table[i].config_device = via_cfgfunc_ide_init; break;
  250. default: PRINTF("Error: Unknown constant\n");
  251. }
  252. }
  253. articiaS_hose.first_busno = 0;
  254. articiaS_hose.last_busno = 0xff;
  255. articiaS_hose.config_table = config_table;
  256. articiaS_hose.fixup_irq = articiaS_pci_fixup_irq;
  257. articiaS_pci_irq_init();
  258. /* System memory */
  259. pci_set_region(articiaS_hose.regions + 0,
  260. ARTICIAS_SYS_BUS,
  261. ARTICIAS_SYS_PHYS,
  262. ARTICIAS_SYS_MAXSIZE,
  263. PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
  264. /* PCI memory space */
  265. pci_set_region(articiaS_hose.regions + 1,
  266. ARTICIAS_PCI_BUS,
  267. ARTICIAS_PCI_PHYS,
  268. ARTICIAS_PCI_MAXSIZE,
  269. PCI_REGION_MEM);
  270. /* PCI io space */
  271. pci_set_region(articiaS_hose.regions + 2,
  272. ARTICIAS_PCIIO_BUS,
  273. ARTICIAS_PCIIO_PHYS,
  274. ARTICIAS_PCIIO_MAXSIZE,
  275. PCI_REGION_IO);
  276. /* PCI/ISA io space */
  277. pci_set_region(articiaS_hose.regions + 3,
  278. ARTICIAS_ISAIO_BUS,
  279. ARTICIAS_ISAIO_PHYS,
  280. ARTICIAS_ISAIO_MAXSIZE,
  281. PCI_REGION_IO);
  282. articiaS_hose.region_count = 4;
  283. pci_setup_indirect(&articiaS_hose, ARTICIAS_PCI_CFGADDR, ARTICIAS_PCI_CFGDATA);
  284. PRINTF("Registering articia hose...\n");
  285. pci_register_hose(&articiaS_hose);
  286. PRINTF("Enabling AGP...\n");
  287. pci_write_config_byte(PCI_BDF(0,0,0), 0x58, 0x01);
  288. PRINTF("Scanning bus...\n");
  289. articiaS_hose.last_busno = pci_hose_scan(&articiaS_hose);
  290. via_init_irq_routing(pci_intmap);
  291. PRINTF("After-Scan results:\n");
  292. PRINTF("Bus range: %d - %d\n", articiaS_hose.first_busno , articiaS_hose.last_busno);
  293. via_init_afterscan();
  294. pci_write_config_byte(PCI_BDF(0,1,0), PCI_INTERRUPT_LINE, 0xFF);
  295. s = getenv("as_irq");
  296. if (s)
  297. {
  298. pci_write_config_byte(PCI_BDF(0,0,0), PCI_INTERRUPT_LINE, simple_strtoul (s, NULL, 10));
  299. }
  300. s = getenv("x86_run_bios");
  301. if (!s || (s && strcmp(s, "on")==0))
  302. {
  303. if (articiaS_init_vga() == -1)
  304. {
  305. /* If the VGA didn't init and we have stdout set to VGA, reset to serial */
  306. /* s = getenv("stdout"); */
  307. /* if (s && strcmp(s, "vga") == 0) */
  308. /* { */
  309. /* setenv("stdout", "serial"); */
  310. /* } */
  311. }
  312. }
  313. pci_write_config_byte(PCI_BDF(0,1,0), PCI_INTERRUPT_LINE, 0xFF);
  314. }
  315. pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_class, int index)
  316. {
  317. unsigned int sub_bus, found_multi=0;
  318. unsigned short vendor, class;
  319. unsigned char header_type;
  320. pci_dev_t dev;
  321. u8 c1, c2;
  322. sub_bus = bus;
  323. for (dev = PCI_BDF(bus,0,0);
  324. dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
  325. dev += PCI_BDF(0,0,1))
  326. {
  327. if ( dev == PCI_BDF(hose->first_busno,0,0) )
  328. continue;
  329. if (PCI_FUNC(dev) && !found_multi)
  330. continue;
  331. pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
  332. pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
  333. if (vendor != 0xffff && vendor != 0x0000)
  334. {
  335. if (!PCI_FUNC(dev))
  336. found_multi = header_type & 0x80;
  337. pci_hose_read_config_byte(hose, dev, 0x0B, &c1);
  338. pci_hose_read_config_byte(hose, dev, 0x0A, &c2);
  339. class = c1<<8 | c2;
  340. /*printf("At %02x:%02x:%02x: class %x\n", */
  341. /* PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class); */
  342. if (class == find_class)
  343. {
  344. if (index == 0)
  345. return dev;
  346. else index--;
  347. }
  348. }
  349. }
  350. return ~0;
  351. }
  352. /*
  353. * For a given bus number, find the bridge on this hose that provides this
  354. * bus number. The function scans for bridges and peeks config space offset
  355. * 0x19 (PCI_SECONDARY_BUS).
  356. */
  357. pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)
  358. {
  359. pci_dev_t dev;
  360. int bus;
  361. unsigned int found_multi=0;
  362. unsigned char header_type;
  363. unsigned short vendor;
  364. unsigned char secondary_bus;
  365. if (hose == NULL) hose = &articiaS_hose;
  366. if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; /* Not in range */
  367. /*
  368. * The bridge must be on a lower bus number
  369. */
  370. for (bus = hose->first_busno; bus < busnr; bus++)
  371. {
  372. for (dev = PCI_BDF(bus,0,0);
  373. dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
  374. dev += PCI_BDF(0,0,1))
  375. {
  376. if ( dev == PCI_BDF(hose->first_busno,0,0) )
  377. continue;
  378. if (PCI_FUNC(dev) && !found_multi)
  379. continue;
  380. pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
  381. pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
  382. if (vendor != 0xffff && vendor != 0x0000)
  383. {
  384. if (!PCI_FUNC(dev))
  385. found_multi = header_type & 0x80;
  386. if (header_type == 1) /* Bridge device header */
  387. {
  388. pci_hose_read_config_byte(hose, dev, PCI_SECONDARY_BUS, &secondary_bus);
  389. if ((int)secondary_bus == busnr) return dev;
  390. }
  391. }
  392. }
  393. }
  394. return PCI_ANY_ID;
  395. }
  396. static short classes[] =
  397. {
  398. PCI_CLASS_DISPLAY_VGA,
  399. PCI_CLASS_DISPLAY_XGA,
  400. PCI_CLASS_DISPLAY_3D,
  401. PCI_CLASS_DISPLAY_OTHER,
  402. ~0
  403. };
  404. extern int execute_bios(pci_dev_t gr_dev, void *);
  405. pci_dev_t video_dev;
  406. int articiaS_init_vga (void)
  407. {
  408. extern void shutdown_bios(void);
  409. pci_dev_t dev = ~0;
  410. int busnr = 0;
  411. int classnr = 0;
  412. video_dev = PCI_ANY_ID;
  413. printf("VGA: ");
  414. PRINTF("Trying to initialize x86 VGA Card(s)\n");
  415. while (dev == ~0)
  416. {
  417. PRINTF("Searching for class 0x%x on bus %d\n", classes[classnr], busnr);
  418. /* Find the first of this class on this bus */
  419. dev = pci_hose_find_class(&articiaS_hose, busnr, classes[classnr], 0);
  420. if (dev != ~0)
  421. {
  422. PRINTF("Found VGA Card at %02x:%02x:%02x\n", PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
  423. break;
  424. }
  425. busnr++;
  426. if (busnr > articiaS_hose.last_busno)
  427. {
  428. busnr = 0;
  429. classnr ++;
  430. if (classes[classnr] == ~0)
  431. {
  432. printf("NOT PRESENT\n");
  433. return -1;
  434. }
  435. }
  436. }
  437. /*
  438. * If we get here we have found the first graphics card.
  439. * If the bus number is not 0, then it is probably behind a bridge, and the
  440. * bridge needs to be told to forward VGA access.
  441. */
  442. if (PCI_BUS(dev) != 0)
  443. {
  444. pci_dev_t bridge;
  445. PRINTF("Behind bridge, looking for bridge\n");
  446. bridge = pci_find_bridge_for_bus(&articiaS_hose, PCI_BUS(dev));
  447. if (dev != PCI_ANY_ID)
  448. {
  449. unsigned char agp_control_0;
  450. PRINTF("Got the bridge at %02x:%02x:%02x\n",
  451. PCI_BUS(bridge), PCI_DEV(bridge), PCI_FUNC(bridge));
  452. pci_hose_read_config_byte(&articiaS_hose, bridge, 0x3E, &agp_control_0);
  453. agp_control_0 |= 0x18;
  454. pci_hose_write_config_byte(&articiaS_hose, bridge, 0x3E, agp_control_0);
  455. PRINTF("Configured for VGA forwarding\n");
  456. }
  457. }
  458. /*
  459. * Now try to run the bios
  460. */
  461. PRINTF("Trying to run bios now\n");
  462. if (execute_bios(dev, gd->relocaddr))
  463. {
  464. printf("OK\n");
  465. video_dev = dev;
  466. }
  467. else
  468. {
  469. printf("ERROR\n");
  470. }
  471. PRINTF("Done scanning.\n");
  472. shutdown_bios();
  473. if (dev == PCI_ANY_ID) return -1;
  474. else return 0;
  475. }