interrupts.c 4.7 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Alex Zuepke <azu@sysgo.de>
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #include <common.h>
  29. #include <asm/arch/pxa-regs.h>
  30. extern void reset_cpu (ulong addr);
  31. #ifdef CONFIG_USE_IRQ
  32. /* enable IRQ/FIQ interrupts */
  33. void enable_interrupts (void)
  34. {
  35. #error: interrupts not implemented yet
  36. }
  37. /*
  38. * disable IRQ/FIQ interrupts
  39. * returns true if interrupts had been enabled before we disabled them
  40. */
  41. int disable_interrupts (void)
  42. {
  43. #error: interrupts not implemented yet
  44. }
  45. #else
  46. void enable_interrupts (void)
  47. {
  48. return;
  49. }
  50. int disable_interrupts (void)
  51. {
  52. return 0;
  53. }
  54. #endif
  55. void bad_mode (void)
  56. {
  57. panic ("Resetting CPU ...\n");
  58. reset_cpu (0);
  59. }
  60. void show_regs (struct pt_regs *regs)
  61. {
  62. unsigned long flags;
  63. const char *processor_modes[] = {
  64. "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
  65. "UK4_26", "UK5_26", "UK6_26", "UK7_26",
  66. "UK8_26", "UK9_26", "UK10_26", "UK11_26",
  67. "UK12_26", "UK13_26", "UK14_26", "UK15_26",
  68. "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
  69. "UK4_32", "UK5_32", "UK6_32", "ABT_32",
  70. "UK8_32", "UK9_32", "UK10_32", "UND_32",
  71. "UK12_32", "UK13_32", "UK14_32", "SYS_32"
  72. };
  73. flags = condition_codes (regs);
  74. printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
  75. "sp : %08lx ip : %08lx fp : %08lx\n",
  76. instruction_pointer (regs),
  77. regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
  78. printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
  79. regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
  80. printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
  81. regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
  82. printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
  83. regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
  84. printf ("Flags: %c%c%c%c",
  85. flags & CC_N_BIT ? 'N' : 'n',
  86. flags & CC_Z_BIT ? 'Z' : 'z',
  87. flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
  88. printf (" IRQs %s FIQs %s Mode %s%s\n",
  89. interrupts_enabled (regs) ? "on" : "off",
  90. fast_interrupts_enabled (regs) ? "on" : "off",
  91. processor_modes[processor_mode (regs)],
  92. thumb_mode (regs) ? " (T)" : "");
  93. }
  94. void do_undefined_instruction (struct pt_regs *pt_regs)
  95. {
  96. printf ("undefined instruction\n");
  97. show_regs (pt_regs);
  98. bad_mode ();
  99. }
  100. void do_software_interrupt (struct pt_regs *pt_regs)
  101. {
  102. printf ("software interrupt\n");
  103. show_regs (pt_regs);
  104. bad_mode ();
  105. }
  106. void do_prefetch_abort (struct pt_regs *pt_regs)
  107. {
  108. printf ("prefetch abort\n");
  109. show_regs (pt_regs);
  110. bad_mode ();
  111. }
  112. void do_data_abort (struct pt_regs *pt_regs)
  113. {
  114. printf ("data abort\n");
  115. show_regs (pt_regs);
  116. bad_mode ();
  117. }
  118. void do_not_used (struct pt_regs *pt_regs)
  119. {
  120. printf ("not used\n");
  121. show_regs (pt_regs);
  122. bad_mode ();
  123. }
  124. void do_fiq (struct pt_regs *pt_regs)
  125. {
  126. printf ("fast interrupt request\n");
  127. show_regs (pt_regs);
  128. bad_mode ();
  129. }
  130. void do_irq (struct pt_regs *pt_regs)
  131. {
  132. printf ("interrupt request\n");
  133. show_regs (pt_regs);
  134. bad_mode ();
  135. }
  136. int interrupt_init (void)
  137. {
  138. /* nothing happens here - we don't setup any IRQs */
  139. return (0);
  140. }
  141. void reset_timer (void)
  142. {
  143. reset_timer_masked ();
  144. }
  145. ulong get_timer (ulong base)
  146. {
  147. return get_timer_masked ();
  148. }
  149. void set_timer (ulong t)
  150. {
  151. /* nop */
  152. }
  153. void udelay (unsigned long usec)
  154. {
  155. udelay_masked (usec);
  156. }
  157. void reset_timer_masked (void)
  158. {
  159. OSCR = 0;
  160. }
  161. ulong get_timer_masked (void)
  162. {
  163. return OSCR;
  164. }
  165. void udelay_masked (unsigned long usec)
  166. {
  167. ulong tmo;
  168. tmo = usec / 1000;
  169. tmo *= CFG_HZ;
  170. tmo /= 1000;
  171. reset_timer_masked ();
  172. while (tmo >= get_timer_masked ())
  173. /*NOP*/;
  174. }
  175. /*
  176. * This function is derived from PowerPC code (read timebase as long long).
  177. * On ARM it just returns the timer value.
  178. */
  179. unsigned long long get_ticks(void)
  180. {
  181. return get_timer(0);
  182. }
  183. /*
  184. * This function is derived from PowerPC code (timebase clock frequency).
  185. * On ARM it returns the number of timer ticks per second.
  186. */
  187. ulong get_tbclk (void)
  188. {
  189. ulong tbclk;
  190. tbclk = CFG_HZ;
  191. return tbclk;
  192. }