eNET_pci.c 3.1 KB

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  1. /*
  2. * (C) Copyright 2008,2009
  3. * Graeme Russ, <graeme.russ@gmail.com>
  4. *
  5. * (C) Copyright 2002
  6. * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. #include <pci.h>
  28. #include <asm/pci.h>
  29. #include <asm/ic/pci.h>
  30. static void pci_enet_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
  31. {
  32. /* a configurable lists of IRQs to steal when we need one */
  33. static int irq_list[] = {
  34. CONFIG_SYS_FIRST_PCI_IRQ,
  35. CONFIG_SYS_SECOND_PCI_IRQ,
  36. CONFIG_SYS_THIRD_PCI_IRQ,
  37. CONFIG_SYS_FORTH_PCI_IRQ
  38. };
  39. static int next_irq_index=0;
  40. uchar tmp_pin;
  41. int pin;
  42. pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
  43. pin = tmp_pin;
  44. pin -= 1; /* PCI config space use 1-based numbering */
  45. if (pin == -1) {
  46. return; /* device use no irq */
  47. }
  48. /* map device number + pin to a pin on the sc520 */
  49. switch (PCI_DEV(dev)) {
  50. case 12: /* First Ethernet Chip */
  51. pin += SC520_PCI_INTA;
  52. break;
  53. case 13: /* Second Ethernet Chip */
  54. pin += SC520_PCI_INTB;
  55. break;
  56. default:
  57. return;
  58. }
  59. pin &= 3; /* wrap around */
  60. if (sc520_pci_ints[pin] == -1) {
  61. /* re-route one interrupt for us */
  62. if (next_irq_index > 3) {
  63. return;
  64. }
  65. if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) {
  66. return;
  67. }
  68. next_irq_index++;
  69. }
  70. if (-1 != sc520_pci_ints[pin]) {
  71. pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE,
  72. sc520_pci_ints[pin]);
  73. }
  74. printf("fixup_irq: device %d pin %c irq %d\n",
  75. PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]);
  76. }
  77. static struct pci_controller enet_hose = {
  78. fixup_irq: pci_enet_fixup_irq,
  79. };
  80. void pci_init_board(void)
  81. {
  82. pci_sc520_init(&enet_hose);
  83. }
  84. int pci_set_regions(struct pci_controller *hose)
  85. {
  86. /* System memory space */
  87. pci_set_region(hose->regions + 0,
  88. SC520_PCI_MEMORY_BUS,
  89. SC520_PCI_MEMORY_PHYS,
  90. SC520_PCI_MEMORY_SIZE,
  91. PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
  92. /* ISA/PCI memory space */
  93. pci_set_region(hose->regions + 1,
  94. SC520_ISA_MEM_BUS,
  95. SC520_ISA_MEM_PHYS,
  96. SC520_ISA_MEM_SIZE,
  97. PCI_REGION_MEM);
  98. /* PCI I/O space */
  99. pci_set_region(hose->regions + 2,
  100. SC520_PCI_IO_BUS,
  101. SC520_PCI_IO_PHYS,
  102. SC520_PCI_IO_SIZE,
  103. PCI_REGION_IO);
  104. /* ISA/PCI I/O space */
  105. pci_set_region(hose->regions + 3,
  106. SC520_ISA_IO_BUS,
  107. SC520_ISA_IO_PHYS,
  108. SC520_ISA_IO_SIZE,
  109. PCI_REGION_IO);
  110. return 4;
  111. }