cfi_flash.c 52 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. #include <mtd/cfi_flash.h>
  41. /*
  42. * This file implements a Common Flash Interface (CFI) driver for
  43. * U-Boot.
  44. *
  45. * The width of the port and the width of the chips are determined at
  46. * initialization. These widths are used to calculate the address for
  47. * access CFI data structures.
  48. *
  49. * References
  50. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  51. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  52. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  53. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  54. * AMD CFI Specification, Release 2.0 December 1, 2001
  55. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  56. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  57. *
  58. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  59. * reading and writing ... (yes there is such a Hardware).
  60. */
  61. #ifndef CONFIG_SYS_FLASH_BANKS_LIST
  62. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  63. #endif
  64. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  65. static uint flash_verbose = 1;
  66. /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
  67. #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
  68. # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
  69. #else
  70. # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
  71. #endif
  72. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  73. /*
  74. * Check if chip width is defined. If not, start detecting with 8bit.
  75. */
  76. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  77. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  78. #endif
  79. static void __flash_write8(u8 value, void *addr)
  80. {
  81. __raw_writeb(value, addr);
  82. }
  83. static void __flash_write16(u16 value, void *addr)
  84. {
  85. __raw_writew(value, addr);
  86. }
  87. static void __flash_write32(u32 value, void *addr)
  88. {
  89. __raw_writel(value, addr);
  90. }
  91. static void __flash_write64(u64 value, void *addr)
  92. {
  93. /* No architectures currently implement __raw_writeq() */
  94. *(volatile u64 *)addr = value;
  95. }
  96. static u8 __flash_read8(void *addr)
  97. {
  98. return __raw_readb(addr);
  99. }
  100. static u16 __flash_read16(void *addr)
  101. {
  102. return __raw_readw(addr);
  103. }
  104. static u32 __flash_read32(void *addr)
  105. {
  106. return __raw_readl(addr);
  107. }
  108. static u64 __flash_read64(void *addr)
  109. {
  110. /* No architectures currently implement __raw_readq() */
  111. return *(volatile u64 *)addr;
  112. }
  113. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  114. void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
  115. void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
  116. void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
  117. void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
  118. u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
  119. u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
  120. u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
  121. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  122. #else
  123. #define flash_write8 __flash_write8
  124. #define flash_write16 __flash_write16
  125. #define flash_write32 __flash_write32
  126. #define flash_write64 __flash_write64
  127. #define flash_read8 __flash_read8
  128. #define flash_read16 __flash_read16
  129. #define flash_read32 __flash_read32
  130. #define flash_read64 __flash_read64
  131. #endif
  132. /*-----------------------------------------------------------------------
  133. */
  134. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  135. flash_info_t *flash_get_info(ulong base)
  136. {
  137. int i;
  138. flash_info_t * info = 0;
  139. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  140. info = & flash_info[i];
  141. if (info->size && info->start[0] <= base &&
  142. base <= info->start[0] + info->size - 1)
  143. break;
  144. }
  145. return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
  146. }
  147. #endif
  148. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  149. {
  150. if (sect != (info->sector_count - 1))
  151. return info->start[sect + 1] - info->start[sect];
  152. else
  153. return info->start[0] + info->size - info->start[sect];
  154. }
  155. /*-----------------------------------------------------------------------
  156. * create an address based on the offset and the port width
  157. */
  158. static inline void *
  159. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  160. {
  161. unsigned int byte_offset = offset * info->portwidth;
  162. return (void *)(info->start[sect] + byte_offset);
  163. }
  164. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  165. unsigned int offset, void *addr)
  166. {
  167. }
  168. /*-----------------------------------------------------------------------
  169. * make a proper sized command based on the port and chip widths
  170. */
  171. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  172. {
  173. int i;
  174. int cword_offset;
  175. int cp_offset;
  176. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  177. u32 cmd_le = cpu_to_le32(cmd);
  178. #endif
  179. uchar val;
  180. uchar *cp = (uchar *) cmdbuf;
  181. for (i = info->portwidth; i > 0; i--){
  182. cword_offset = (info->portwidth-i)%info->chipwidth;
  183. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  184. cp_offset = info->portwidth - i;
  185. val = *((uchar*)&cmd_le + cword_offset);
  186. #else
  187. cp_offset = i - 1;
  188. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  189. #endif
  190. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  191. }
  192. }
  193. #ifdef DEBUG
  194. /*-----------------------------------------------------------------------
  195. * Debug support
  196. */
  197. static void print_longlong (char *str, unsigned long long data)
  198. {
  199. int i;
  200. char *cp;
  201. cp = (char *) &data;
  202. for (i = 0; i < 8; i++)
  203. sprintf (&str[i * 2], "%2.2x", *cp++);
  204. }
  205. static void flash_printqry (struct cfi_qry *qry)
  206. {
  207. u8 *p = (u8 *)qry;
  208. int x, y;
  209. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  210. debug("%02x : ", x);
  211. for (y = 0; y < 16; y++)
  212. debug("%2.2x ", p[x + y]);
  213. debug(" ");
  214. for (y = 0; y < 16; y++) {
  215. unsigned char c = p[x + y];
  216. if (c >= 0x20 && c <= 0x7e)
  217. debug("%c", c);
  218. else
  219. debug(".");
  220. }
  221. debug("\n");
  222. }
  223. }
  224. #endif
  225. /*-----------------------------------------------------------------------
  226. * read a character at a port width address
  227. */
  228. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  229. {
  230. uchar *cp;
  231. uchar retval;
  232. cp = flash_map (info, 0, offset);
  233. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  234. retval = flash_read8(cp);
  235. #else
  236. retval = flash_read8(cp + info->portwidth - 1);
  237. #endif
  238. flash_unmap (info, 0, offset, cp);
  239. return retval;
  240. }
  241. /*-----------------------------------------------------------------------
  242. * read a word at a port width address, assume 16bit bus
  243. */
  244. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  245. {
  246. ushort *addr, retval;
  247. addr = flash_map (info, 0, offset);
  248. retval = flash_read16 (addr);
  249. flash_unmap (info, 0, offset, addr);
  250. return retval;
  251. }
  252. /*-----------------------------------------------------------------------
  253. * read a long word by picking the least significant byte of each maximum
  254. * port size word. Swap for ppc format.
  255. */
  256. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  257. uint offset)
  258. {
  259. uchar *addr;
  260. ulong retval;
  261. #ifdef DEBUG
  262. int x;
  263. #endif
  264. addr = flash_map (info, sect, offset);
  265. #ifdef DEBUG
  266. debug ("long addr is at %p info->portwidth = %d\n", addr,
  267. info->portwidth);
  268. for (x = 0; x < 4 * info->portwidth; x++) {
  269. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  270. }
  271. #endif
  272. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  273. retval = ((flash_read8(addr) << 16) |
  274. (flash_read8(addr + info->portwidth) << 24) |
  275. (flash_read8(addr + 2 * info->portwidth)) |
  276. (flash_read8(addr + 3 * info->portwidth) << 8));
  277. #else
  278. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  279. (flash_read8(addr + info->portwidth - 1) << 16) |
  280. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  281. (flash_read8(addr + 3 * info->portwidth - 1)));
  282. #endif
  283. flash_unmap(info, sect, offset, addr);
  284. return retval;
  285. }
  286. /*
  287. * Write a proper sized command to the correct address
  288. */
  289. void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  290. uint offset, u32 cmd)
  291. {
  292. void *addr;
  293. cfiword_t cword;
  294. addr = flash_map (info, sect, offset);
  295. flash_make_cmd (info, cmd, &cword);
  296. switch (info->portwidth) {
  297. case FLASH_CFI_8BIT:
  298. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  299. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  300. flash_write8(cword.c, addr);
  301. break;
  302. case FLASH_CFI_16BIT:
  303. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  304. cmd, cword.w,
  305. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  306. flash_write16(cword.w, addr);
  307. break;
  308. case FLASH_CFI_32BIT:
  309. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  310. cmd, cword.l,
  311. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  312. flash_write32(cword.l, addr);
  313. break;
  314. case FLASH_CFI_64BIT:
  315. #ifdef DEBUG
  316. {
  317. char str[20];
  318. print_longlong (str, cword.ll);
  319. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  320. addr, cmd, str,
  321. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  322. }
  323. #endif
  324. flash_write64(cword.ll, addr);
  325. break;
  326. }
  327. /* Ensure all the instructions are fully finished */
  328. sync();
  329. flash_unmap(info, sect, offset, addr);
  330. }
  331. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  332. {
  333. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  334. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  335. }
  336. /*-----------------------------------------------------------------------
  337. */
  338. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  339. uint offset, uchar cmd)
  340. {
  341. void *addr;
  342. cfiword_t cword;
  343. int retval;
  344. addr = flash_map (info, sect, offset);
  345. flash_make_cmd (info, cmd, &cword);
  346. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  347. switch (info->portwidth) {
  348. case FLASH_CFI_8BIT:
  349. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  350. retval = (flash_read8(addr) == cword.c);
  351. break;
  352. case FLASH_CFI_16BIT:
  353. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  354. retval = (flash_read16(addr) == cword.w);
  355. break;
  356. case FLASH_CFI_32BIT:
  357. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  358. retval = (flash_read32(addr) == cword.l);
  359. break;
  360. case FLASH_CFI_64BIT:
  361. #ifdef DEBUG
  362. {
  363. char str1[20];
  364. char str2[20];
  365. print_longlong (str1, flash_read64(addr));
  366. print_longlong (str2, cword.ll);
  367. debug ("is= %s %s\n", str1, str2);
  368. }
  369. #endif
  370. retval = (flash_read64(addr) == cword.ll);
  371. break;
  372. default:
  373. retval = 0;
  374. break;
  375. }
  376. flash_unmap(info, sect, offset, addr);
  377. return retval;
  378. }
  379. /*-----------------------------------------------------------------------
  380. */
  381. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  382. uint offset, uchar cmd)
  383. {
  384. void *addr;
  385. cfiword_t cword;
  386. int retval;
  387. addr = flash_map (info, sect, offset);
  388. flash_make_cmd (info, cmd, &cword);
  389. switch (info->portwidth) {
  390. case FLASH_CFI_8BIT:
  391. retval = ((flash_read8(addr) & cword.c) == cword.c);
  392. break;
  393. case FLASH_CFI_16BIT:
  394. retval = ((flash_read16(addr) & cword.w) == cword.w);
  395. break;
  396. case FLASH_CFI_32BIT:
  397. retval = ((flash_read32(addr) & cword.l) == cword.l);
  398. break;
  399. case FLASH_CFI_64BIT:
  400. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  401. break;
  402. default:
  403. retval = 0;
  404. break;
  405. }
  406. flash_unmap(info, sect, offset, addr);
  407. return retval;
  408. }
  409. /*-----------------------------------------------------------------------
  410. */
  411. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  412. uint offset, uchar cmd)
  413. {
  414. void *addr;
  415. cfiword_t cword;
  416. int retval;
  417. addr = flash_map (info, sect, offset);
  418. flash_make_cmd (info, cmd, &cword);
  419. switch (info->portwidth) {
  420. case FLASH_CFI_8BIT:
  421. retval = flash_read8(addr) != flash_read8(addr);
  422. break;
  423. case FLASH_CFI_16BIT:
  424. retval = flash_read16(addr) != flash_read16(addr);
  425. break;
  426. case FLASH_CFI_32BIT:
  427. retval = flash_read32(addr) != flash_read32(addr);
  428. break;
  429. case FLASH_CFI_64BIT:
  430. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  431. (flash_read32(addr+4) != flash_read32(addr+4)) );
  432. break;
  433. default:
  434. retval = 0;
  435. break;
  436. }
  437. flash_unmap(info, sect, offset, addr);
  438. return retval;
  439. }
  440. /*
  441. * flash_is_busy - check to see if the flash is busy
  442. *
  443. * This routine checks the status of the chip and returns true if the
  444. * chip is busy.
  445. */
  446. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  447. {
  448. int retval;
  449. switch (info->vendor) {
  450. case CFI_CMDSET_INTEL_PROG_REGIONS:
  451. case CFI_CMDSET_INTEL_STANDARD:
  452. case CFI_CMDSET_INTEL_EXTENDED:
  453. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  454. break;
  455. case CFI_CMDSET_AMD_STANDARD:
  456. case CFI_CMDSET_AMD_EXTENDED:
  457. #ifdef CONFIG_FLASH_CFI_LEGACY
  458. case CFI_CMDSET_AMD_LEGACY:
  459. #endif
  460. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  461. break;
  462. default:
  463. retval = 0;
  464. }
  465. debug ("flash_is_busy: %d\n", retval);
  466. return retval;
  467. }
  468. /*-----------------------------------------------------------------------
  469. * wait for XSR.7 to be set. Time out with an error if it does not.
  470. * This routine does not set the flash to read-array mode.
  471. */
  472. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  473. ulong tout, char *prompt)
  474. {
  475. ulong start;
  476. #if CONFIG_SYS_HZ != 1000
  477. tout *= CONFIG_SYS_HZ/1000;
  478. #endif
  479. /* Wait for command completion */
  480. start = get_timer (0);
  481. while (flash_is_busy (info, sector)) {
  482. if (get_timer (start) > tout) {
  483. printf ("Flash %s timeout at address %lx data %lx\n",
  484. prompt, info->start[sector],
  485. flash_read_long (info, sector, 0));
  486. flash_write_cmd (info, sector, 0, info->cmd_reset);
  487. return ERR_TIMOUT;
  488. }
  489. udelay (1); /* also triggers watchdog */
  490. }
  491. return ERR_OK;
  492. }
  493. /*-----------------------------------------------------------------------
  494. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  495. * do a full status check.
  496. *
  497. * This routine sets the flash to read-array mode.
  498. */
  499. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  500. ulong tout, char *prompt)
  501. {
  502. int retcode;
  503. retcode = flash_status_check (info, sector, tout, prompt);
  504. switch (info->vendor) {
  505. case CFI_CMDSET_INTEL_PROG_REGIONS:
  506. case CFI_CMDSET_INTEL_EXTENDED:
  507. case CFI_CMDSET_INTEL_STANDARD:
  508. if ((retcode != ERR_OK)
  509. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  510. retcode = ERR_INVAL;
  511. printf ("Flash %s error at address %lx\n", prompt,
  512. info->start[sector]);
  513. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  514. FLASH_STATUS_PSLBS)) {
  515. puts ("Command Sequence Error.\n");
  516. } else if (flash_isset (info, sector, 0,
  517. FLASH_STATUS_ECLBS)) {
  518. puts ("Block Erase Error.\n");
  519. retcode = ERR_NOT_ERASED;
  520. } else if (flash_isset (info, sector, 0,
  521. FLASH_STATUS_PSLBS)) {
  522. puts ("Locking Error\n");
  523. }
  524. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  525. puts ("Block locked.\n");
  526. retcode = ERR_PROTECTED;
  527. }
  528. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  529. puts ("Vpp Low Error.\n");
  530. }
  531. flash_write_cmd (info, sector, 0, info->cmd_reset);
  532. break;
  533. default:
  534. break;
  535. }
  536. return retcode;
  537. }
  538. /*-----------------------------------------------------------------------
  539. */
  540. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  541. {
  542. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  543. unsigned short w;
  544. unsigned int l;
  545. unsigned long long ll;
  546. #endif
  547. switch (info->portwidth) {
  548. case FLASH_CFI_8BIT:
  549. cword->c = c;
  550. break;
  551. case FLASH_CFI_16BIT:
  552. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  553. w = c;
  554. w <<= 8;
  555. cword->w = (cword->w >> 8) | w;
  556. #else
  557. cword->w = (cword->w << 8) | c;
  558. #endif
  559. break;
  560. case FLASH_CFI_32BIT:
  561. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  562. l = c;
  563. l <<= 24;
  564. cword->l = (cword->l >> 8) | l;
  565. #else
  566. cword->l = (cword->l << 8) | c;
  567. #endif
  568. break;
  569. case FLASH_CFI_64BIT:
  570. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  571. ll = c;
  572. ll <<= 56;
  573. cword->ll = (cword->ll >> 8) | ll;
  574. #else
  575. cword->ll = (cword->ll << 8) | c;
  576. #endif
  577. break;
  578. }
  579. }
  580. /*
  581. * Loop through the sector table starting from the previously found sector.
  582. * Searches forwards or backwards, dependent on the passed address.
  583. */
  584. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  585. {
  586. static flash_sect_t saved_sector = 0; /* previously found sector */
  587. flash_sect_t sector = saved_sector;
  588. while ((info->start[sector] < addr)
  589. && (sector < info->sector_count - 1))
  590. sector++;
  591. while ((info->start[sector] > addr) && (sector > 0))
  592. /*
  593. * also decrements the sector in case of an overshot
  594. * in the first loop
  595. */
  596. sector--;
  597. saved_sector = sector;
  598. return sector;
  599. }
  600. /*-----------------------------------------------------------------------
  601. */
  602. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  603. cfiword_t cword)
  604. {
  605. void *dstaddr = (void *)dest;
  606. int flag;
  607. flash_sect_t sect = 0;
  608. char sect_found = 0;
  609. /* Check if Flash is (sufficiently) erased */
  610. switch (info->portwidth) {
  611. case FLASH_CFI_8BIT:
  612. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  613. break;
  614. case FLASH_CFI_16BIT:
  615. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  616. break;
  617. case FLASH_CFI_32BIT:
  618. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  619. break;
  620. case FLASH_CFI_64BIT:
  621. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  622. break;
  623. default:
  624. flag = 0;
  625. break;
  626. }
  627. if (!flag)
  628. return ERR_NOT_ERASED;
  629. /* Disable interrupts which might cause a timeout here */
  630. flag = disable_interrupts ();
  631. switch (info->vendor) {
  632. case CFI_CMDSET_INTEL_PROG_REGIONS:
  633. case CFI_CMDSET_INTEL_EXTENDED:
  634. case CFI_CMDSET_INTEL_STANDARD:
  635. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  636. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  637. break;
  638. case CFI_CMDSET_AMD_EXTENDED:
  639. case CFI_CMDSET_AMD_STANDARD:
  640. sect = find_sector(info, dest);
  641. flash_unlock_seq (info, sect);
  642. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  643. sect_found = 1;
  644. break;
  645. #ifdef CONFIG_FLASH_CFI_LEGACY
  646. case CFI_CMDSET_AMD_LEGACY:
  647. sect = find_sector(info, dest);
  648. flash_unlock_seq (info, 0);
  649. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  650. sect_found = 1;
  651. break;
  652. #endif
  653. }
  654. switch (info->portwidth) {
  655. case FLASH_CFI_8BIT:
  656. flash_write8(cword.c, dstaddr);
  657. break;
  658. case FLASH_CFI_16BIT:
  659. flash_write16(cword.w, dstaddr);
  660. break;
  661. case FLASH_CFI_32BIT:
  662. flash_write32(cword.l, dstaddr);
  663. break;
  664. case FLASH_CFI_64BIT:
  665. flash_write64(cword.ll, dstaddr);
  666. break;
  667. }
  668. /* re-enable interrupts if necessary */
  669. if (flag)
  670. enable_interrupts ();
  671. if (!sect_found)
  672. sect = find_sector (info, dest);
  673. return flash_full_status_check (info, sect, info->write_tout, "write");
  674. }
  675. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  676. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  677. int len)
  678. {
  679. flash_sect_t sector;
  680. int cnt;
  681. int retcode;
  682. void *src = cp;
  683. void *dst = (void *)dest;
  684. void *dst2 = dst;
  685. int flag = 0;
  686. uint offset = 0;
  687. unsigned int shift;
  688. uchar write_cmd;
  689. switch (info->portwidth) {
  690. case FLASH_CFI_8BIT:
  691. shift = 0;
  692. break;
  693. case FLASH_CFI_16BIT:
  694. shift = 1;
  695. break;
  696. case FLASH_CFI_32BIT:
  697. shift = 2;
  698. break;
  699. case FLASH_CFI_64BIT:
  700. shift = 3;
  701. break;
  702. default:
  703. retcode = ERR_INVAL;
  704. goto out_unmap;
  705. }
  706. cnt = len >> shift;
  707. while ((cnt-- > 0) && (flag == 0)) {
  708. switch (info->portwidth) {
  709. case FLASH_CFI_8BIT:
  710. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  711. flash_read8(src));
  712. src += 1, dst2 += 1;
  713. break;
  714. case FLASH_CFI_16BIT:
  715. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  716. flash_read16(src));
  717. src += 2, dst2 += 2;
  718. break;
  719. case FLASH_CFI_32BIT:
  720. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  721. flash_read32(src));
  722. src += 4, dst2 += 4;
  723. break;
  724. case FLASH_CFI_64BIT:
  725. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  726. flash_read64(src));
  727. src += 8, dst2 += 8;
  728. break;
  729. }
  730. }
  731. if (!flag) {
  732. retcode = ERR_NOT_ERASED;
  733. goto out_unmap;
  734. }
  735. src = cp;
  736. sector = find_sector (info, dest);
  737. switch (info->vendor) {
  738. case CFI_CMDSET_INTEL_PROG_REGIONS:
  739. case CFI_CMDSET_INTEL_STANDARD:
  740. case CFI_CMDSET_INTEL_EXTENDED:
  741. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  742. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  743. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  744. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  745. flash_write_cmd (info, sector, 0, write_cmd);
  746. retcode = flash_status_check (info, sector,
  747. info->buffer_write_tout,
  748. "write to buffer");
  749. if (retcode == ERR_OK) {
  750. /* reduce the number of loops by the width of
  751. * the port */
  752. cnt = len >> shift;
  753. flash_write_cmd (info, sector, 0, cnt - 1);
  754. while (cnt-- > 0) {
  755. switch (info->portwidth) {
  756. case FLASH_CFI_8BIT:
  757. flash_write8(flash_read8(src), dst);
  758. src += 1, dst += 1;
  759. break;
  760. case FLASH_CFI_16BIT:
  761. flash_write16(flash_read16(src), dst);
  762. src += 2, dst += 2;
  763. break;
  764. case FLASH_CFI_32BIT:
  765. flash_write32(flash_read32(src), dst);
  766. src += 4, dst += 4;
  767. break;
  768. case FLASH_CFI_64BIT:
  769. flash_write64(flash_read64(src), dst);
  770. src += 8, dst += 8;
  771. break;
  772. default:
  773. retcode = ERR_INVAL;
  774. goto out_unmap;
  775. }
  776. }
  777. flash_write_cmd (info, sector, 0,
  778. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  779. retcode = flash_full_status_check (
  780. info, sector, info->buffer_write_tout,
  781. "buffer write");
  782. }
  783. break;
  784. case CFI_CMDSET_AMD_STANDARD:
  785. case CFI_CMDSET_AMD_EXTENDED:
  786. flash_unlock_seq(info,0);
  787. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  788. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  789. #endif
  790. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  791. cnt = len >> shift;
  792. flash_write_cmd(info, sector, offset, cnt - 1);
  793. switch (info->portwidth) {
  794. case FLASH_CFI_8BIT:
  795. while (cnt-- > 0) {
  796. flash_write8(flash_read8(src), dst);
  797. src += 1, dst += 1;
  798. }
  799. break;
  800. case FLASH_CFI_16BIT:
  801. while (cnt-- > 0) {
  802. flash_write16(flash_read16(src), dst);
  803. src += 2, dst += 2;
  804. }
  805. break;
  806. case FLASH_CFI_32BIT:
  807. while (cnt-- > 0) {
  808. flash_write32(flash_read32(src), dst);
  809. src += 4, dst += 4;
  810. }
  811. break;
  812. case FLASH_CFI_64BIT:
  813. while (cnt-- > 0) {
  814. flash_write64(flash_read64(src), dst);
  815. src += 8, dst += 8;
  816. }
  817. break;
  818. default:
  819. retcode = ERR_INVAL;
  820. goto out_unmap;
  821. }
  822. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  823. retcode = flash_full_status_check (info, sector,
  824. info->buffer_write_tout,
  825. "buffer write");
  826. break;
  827. default:
  828. debug ("Unknown Command Set\n");
  829. retcode = ERR_INVAL;
  830. break;
  831. }
  832. out_unmap:
  833. return retcode;
  834. }
  835. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  836. /*-----------------------------------------------------------------------
  837. */
  838. int flash_erase (flash_info_t * info, int s_first, int s_last)
  839. {
  840. int rcode = 0;
  841. int prot;
  842. flash_sect_t sect;
  843. if (info->flash_id != FLASH_MAN_CFI) {
  844. puts ("Can't erase unknown flash type - aborted\n");
  845. return 1;
  846. }
  847. if ((s_first < 0) || (s_first > s_last)) {
  848. puts ("- no sectors to erase\n");
  849. return 1;
  850. }
  851. prot = 0;
  852. for (sect = s_first; sect <= s_last; ++sect) {
  853. if (info->protect[sect]) {
  854. prot++;
  855. }
  856. }
  857. if (prot) {
  858. printf ("- Warning: %d protected sectors will not be erased!\n",
  859. prot);
  860. } else if (flash_verbose) {
  861. putc ('\n');
  862. }
  863. for (sect = s_first; sect <= s_last; sect++) {
  864. if (info->protect[sect] == 0) { /* not protected */
  865. switch (info->vendor) {
  866. case CFI_CMDSET_INTEL_PROG_REGIONS:
  867. case CFI_CMDSET_INTEL_STANDARD:
  868. case CFI_CMDSET_INTEL_EXTENDED:
  869. flash_write_cmd (info, sect, 0,
  870. FLASH_CMD_CLEAR_STATUS);
  871. flash_write_cmd (info, sect, 0,
  872. FLASH_CMD_BLOCK_ERASE);
  873. flash_write_cmd (info, sect, 0,
  874. FLASH_CMD_ERASE_CONFIRM);
  875. break;
  876. case CFI_CMDSET_AMD_STANDARD:
  877. case CFI_CMDSET_AMD_EXTENDED:
  878. flash_unlock_seq (info, sect);
  879. flash_write_cmd (info, sect,
  880. info->addr_unlock1,
  881. AMD_CMD_ERASE_START);
  882. flash_unlock_seq (info, sect);
  883. flash_write_cmd (info, sect, 0,
  884. AMD_CMD_ERASE_SECTOR);
  885. break;
  886. #ifdef CONFIG_FLASH_CFI_LEGACY
  887. case CFI_CMDSET_AMD_LEGACY:
  888. flash_unlock_seq (info, 0);
  889. flash_write_cmd (info, 0, info->addr_unlock1,
  890. AMD_CMD_ERASE_START);
  891. flash_unlock_seq (info, 0);
  892. flash_write_cmd (info, sect, 0,
  893. AMD_CMD_ERASE_SECTOR);
  894. break;
  895. #endif
  896. default:
  897. debug ("Unkown flash vendor %d\n",
  898. info->vendor);
  899. break;
  900. }
  901. if (flash_full_status_check
  902. (info, sect, info->erase_blk_tout, "erase")) {
  903. rcode = 1;
  904. } else if (flash_verbose)
  905. putc ('.');
  906. }
  907. }
  908. if (flash_verbose)
  909. puts (" done\n");
  910. return rcode;
  911. }
  912. /*-----------------------------------------------------------------------
  913. */
  914. void flash_print_info (flash_info_t * info)
  915. {
  916. int i;
  917. if (info->flash_id != FLASH_MAN_CFI) {
  918. puts ("missing or unknown FLASH type\n");
  919. return;
  920. }
  921. printf ("%s FLASH (%d x %d)",
  922. info->name,
  923. (info->portwidth << 3), (info->chipwidth << 3));
  924. if (info->size < 1024*1024)
  925. printf (" Size: %ld kB in %d Sectors\n",
  926. info->size >> 10, info->sector_count);
  927. else
  928. printf (" Size: %ld MB in %d Sectors\n",
  929. info->size >> 20, info->sector_count);
  930. printf (" ");
  931. switch (info->vendor) {
  932. case CFI_CMDSET_INTEL_PROG_REGIONS:
  933. printf ("Intel Prog Regions");
  934. break;
  935. case CFI_CMDSET_INTEL_STANDARD:
  936. printf ("Intel Standard");
  937. break;
  938. case CFI_CMDSET_INTEL_EXTENDED:
  939. printf ("Intel Extended");
  940. break;
  941. case CFI_CMDSET_AMD_STANDARD:
  942. printf ("AMD Standard");
  943. break;
  944. case CFI_CMDSET_AMD_EXTENDED:
  945. printf ("AMD Extended");
  946. break;
  947. #ifdef CONFIG_FLASH_CFI_LEGACY
  948. case CFI_CMDSET_AMD_LEGACY:
  949. printf ("AMD Legacy");
  950. break;
  951. #endif
  952. default:
  953. printf ("Unknown (%d)", info->vendor);
  954. break;
  955. }
  956. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
  957. info->manufacturer_id, info->device_id);
  958. if (info->device_id == 0x7E) {
  959. printf("%04X", info->device_id2);
  960. }
  961. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  962. info->erase_blk_tout,
  963. info->write_tout);
  964. if (info->buffer_size > 1) {
  965. printf (" Buffer write timeout: %ld ms, "
  966. "buffer size: %d bytes\n",
  967. info->buffer_write_tout,
  968. info->buffer_size);
  969. }
  970. puts ("\n Sector Start Addresses:");
  971. for (i = 0; i < info->sector_count; ++i) {
  972. if ((i % 5) == 0)
  973. printf ("\n");
  974. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  975. int k;
  976. int size;
  977. int erased;
  978. volatile unsigned long *flash;
  979. /*
  980. * Check if whole sector is erased
  981. */
  982. size = flash_sector_size(info, i);
  983. erased = 1;
  984. flash = (volatile unsigned long *) info->start[i];
  985. size = size >> 2; /* divide by 4 for longword access */
  986. for (k = 0; k < size; k++) {
  987. if (*flash++ != 0xffffffff) {
  988. erased = 0;
  989. break;
  990. }
  991. }
  992. /* print empty and read-only info */
  993. printf (" %08lX %c %s ",
  994. info->start[i],
  995. erased ? 'E' : ' ',
  996. info->protect[i] ? "RO" : " ");
  997. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  998. printf (" %08lX %s ",
  999. info->start[i],
  1000. info->protect[i] ? "RO" : " ");
  1001. #endif
  1002. }
  1003. putc ('\n');
  1004. return;
  1005. }
  1006. /*-----------------------------------------------------------------------
  1007. * This is used in a few places in write_buf() to show programming
  1008. * progress. Making it a function is nasty because it needs to do side
  1009. * effect updates to digit and dots. Repeated code is nasty too, so
  1010. * we define it once here.
  1011. */
  1012. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1013. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1014. if (flash_verbose) { \
  1015. dots -= dots_sub; \
  1016. if ((scale > 0) && (dots <= 0)) { \
  1017. if ((digit % 5) == 0) \
  1018. printf ("%d", digit / 5); \
  1019. else \
  1020. putc ('.'); \
  1021. digit--; \
  1022. dots += scale; \
  1023. } \
  1024. }
  1025. #else
  1026. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1027. #endif
  1028. /*-----------------------------------------------------------------------
  1029. * Copy memory to flash, returns:
  1030. * 0 - OK
  1031. * 1 - write timeout
  1032. * 2 - Flash not erased
  1033. */
  1034. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1035. {
  1036. ulong wp;
  1037. uchar *p;
  1038. int aln;
  1039. cfiword_t cword;
  1040. int i, rc;
  1041. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1042. int buffered_size;
  1043. #endif
  1044. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1045. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1046. int scale = 0;
  1047. int dots = 0;
  1048. /*
  1049. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1050. */
  1051. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1052. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1053. CONFIG_FLASH_SHOW_PROGRESS);
  1054. }
  1055. #endif
  1056. /* get lower aligned address */
  1057. wp = (addr & ~(info->portwidth - 1));
  1058. /* handle unaligned start */
  1059. if ((aln = addr - wp) != 0) {
  1060. cword.l = 0;
  1061. p = (uchar *)wp;
  1062. for (i = 0; i < aln; ++i)
  1063. flash_add_byte (info, &cword, flash_read8(p + i));
  1064. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1065. flash_add_byte (info, &cword, *src++);
  1066. cnt--;
  1067. }
  1068. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1069. flash_add_byte (info, &cword, flash_read8(p + i));
  1070. rc = flash_write_cfiword (info, wp, cword);
  1071. if (rc != 0)
  1072. return rc;
  1073. wp += i;
  1074. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1075. }
  1076. /* handle the aligned part */
  1077. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1078. buffered_size = (info->portwidth / info->chipwidth);
  1079. buffered_size *= info->buffer_size;
  1080. while (cnt >= info->portwidth) {
  1081. /* prohibit buffer write when buffer_size is 1 */
  1082. if (info->buffer_size == 1) {
  1083. cword.l = 0;
  1084. for (i = 0; i < info->portwidth; i++)
  1085. flash_add_byte (info, &cword, *src++);
  1086. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1087. return rc;
  1088. wp += info->portwidth;
  1089. cnt -= info->portwidth;
  1090. continue;
  1091. }
  1092. /* write buffer until next buffered_size aligned boundary */
  1093. i = buffered_size - (wp % buffered_size);
  1094. if (i > cnt)
  1095. i = cnt;
  1096. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1097. return rc;
  1098. i -= i & (info->portwidth - 1);
  1099. wp += i;
  1100. src += i;
  1101. cnt -= i;
  1102. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1103. }
  1104. #else
  1105. while (cnt >= info->portwidth) {
  1106. cword.l = 0;
  1107. for (i = 0; i < info->portwidth; i++) {
  1108. flash_add_byte (info, &cword, *src++);
  1109. }
  1110. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1111. return rc;
  1112. wp += info->portwidth;
  1113. cnt -= info->portwidth;
  1114. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1115. }
  1116. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1117. if (cnt == 0) {
  1118. return (0);
  1119. }
  1120. /*
  1121. * handle unaligned tail bytes
  1122. */
  1123. cword.l = 0;
  1124. p = (uchar *)wp;
  1125. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1126. flash_add_byte (info, &cword, *src++);
  1127. --cnt;
  1128. }
  1129. for (; i < info->portwidth; ++i)
  1130. flash_add_byte (info, &cword, flash_read8(p + i));
  1131. return flash_write_cfiword (info, wp, cword);
  1132. }
  1133. /*-----------------------------------------------------------------------
  1134. */
  1135. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1136. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1137. {
  1138. int retcode = 0;
  1139. switch (info->vendor) {
  1140. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1141. case CFI_CMDSET_INTEL_STANDARD:
  1142. case CFI_CMDSET_INTEL_EXTENDED:
  1143. flash_write_cmd (info, sector, 0,
  1144. FLASH_CMD_CLEAR_STATUS);
  1145. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1146. if (prot)
  1147. flash_write_cmd (info, sector, 0,
  1148. FLASH_CMD_PROTECT_SET);
  1149. else
  1150. flash_write_cmd (info, sector, 0,
  1151. FLASH_CMD_PROTECT_CLEAR);
  1152. break;
  1153. case CFI_CMDSET_AMD_EXTENDED:
  1154. case CFI_CMDSET_AMD_STANDARD:
  1155. /* U-Boot only checks the first byte */
  1156. if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
  1157. if (prot) {
  1158. flash_unlock_seq (info, 0);
  1159. flash_write_cmd (info, 0,
  1160. info->addr_unlock1,
  1161. ATM_CMD_SOFTLOCK_START);
  1162. flash_unlock_seq (info, 0);
  1163. flash_write_cmd (info, sector, 0,
  1164. ATM_CMD_LOCK_SECT);
  1165. } else {
  1166. flash_write_cmd (info, 0,
  1167. info->addr_unlock1,
  1168. AMD_CMD_UNLOCK_START);
  1169. if (info->device_id == ATM_ID_BV6416)
  1170. flash_write_cmd (info, sector,
  1171. 0, ATM_CMD_UNLOCK_SECT);
  1172. }
  1173. }
  1174. break;
  1175. #ifdef CONFIG_FLASH_CFI_LEGACY
  1176. case CFI_CMDSET_AMD_LEGACY:
  1177. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1178. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1179. if (prot)
  1180. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1181. else
  1182. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1183. #endif
  1184. };
  1185. if ((retcode =
  1186. flash_full_status_check (info, sector, info->erase_blk_tout,
  1187. prot ? "protect" : "unprotect")) == 0) {
  1188. info->protect[sector] = prot;
  1189. /*
  1190. * On some of Intel's flash chips (marked via legacy_unlock)
  1191. * unprotect unprotects all locking.
  1192. */
  1193. if ((prot == 0) && (info->legacy_unlock)) {
  1194. flash_sect_t i;
  1195. for (i = 0; i < info->sector_count; i++) {
  1196. if (info->protect[i])
  1197. flash_real_protect (info, i, 1);
  1198. }
  1199. }
  1200. }
  1201. return retcode;
  1202. }
  1203. /*-----------------------------------------------------------------------
  1204. * flash_read_user_serial - read the OneTimeProgramming cells
  1205. */
  1206. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1207. int len)
  1208. {
  1209. uchar *src;
  1210. uchar *dst;
  1211. dst = buffer;
  1212. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1213. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1214. memcpy (dst, src + offset, len);
  1215. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1216. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1217. }
  1218. /*
  1219. * flash_read_factory_serial - read the device Id from the protection area
  1220. */
  1221. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1222. int len)
  1223. {
  1224. uchar *src;
  1225. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1226. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1227. memcpy (buffer, src + offset, len);
  1228. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1229. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1230. }
  1231. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1232. /*-----------------------------------------------------------------------
  1233. * Reverse the order of the erase regions in the CFI QRY structure.
  1234. * This is needed for chips that are either a) correctly detected as
  1235. * top-boot, or b) buggy.
  1236. */
  1237. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1238. {
  1239. unsigned int i, j;
  1240. u32 tmp;
  1241. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1242. tmp = qry->erase_region_info[i];
  1243. qry->erase_region_info[i] = qry->erase_region_info[j];
  1244. qry->erase_region_info[j] = tmp;
  1245. }
  1246. }
  1247. /*-----------------------------------------------------------------------
  1248. * read jedec ids from device and set corresponding fields in info struct
  1249. *
  1250. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1251. *
  1252. */
  1253. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1254. {
  1255. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1256. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1257. udelay(1000); /* some flash are slow to respond */
  1258. info->manufacturer_id = flash_read_uchar (info,
  1259. FLASH_OFFSET_MANUFACTURER_ID);
  1260. info->device_id = flash_read_uchar (info,
  1261. FLASH_OFFSET_DEVICE_ID);
  1262. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1263. }
  1264. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1265. {
  1266. info->cmd_reset = FLASH_CMD_RESET;
  1267. cmdset_intel_read_jedec_ids(info);
  1268. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1269. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1270. /* read legacy lock/unlock bit from intel flash */
  1271. if (info->ext_addr) {
  1272. info->legacy_unlock = flash_read_uchar (info,
  1273. info->ext_addr + 5) & 0x08;
  1274. }
  1275. #endif
  1276. return 0;
  1277. }
  1278. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1279. {
  1280. ushort bankId = 0;
  1281. uchar manuId;
  1282. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1283. flash_unlock_seq(info, 0);
  1284. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1285. udelay(1000); /* some flash are slow to respond */
  1286. manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
  1287. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1288. while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
  1289. bankId += 0x100;
  1290. manuId = flash_read_uchar (info,
  1291. bankId | FLASH_OFFSET_MANUFACTURER_ID);
  1292. }
  1293. info->manufacturer_id = manuId;
  1294. switch (info->chipwidth){
  1295. case FLASH_CFI_8BIT:
  1296. info->device_id = flash_read_uchar (info,
  1297. FLASH_OFFSET_DEVICE_ID);
  1298. if (info->device_id == 0x7E) {
  1299. /* AMD 3-byte (expanded) device ids */
  1300. info->device_id2 = flash_read_uchar (info,
  1301. FLASH_OFFSET_DEVICE_ID2);
  1302. info->device_id2 <<= 8;
  1303. info->device_id2 |= flash_read_uchar (info,
  1304. FLASH_OFFSET_DEVICE_ID3);
  1305. }
  1306. break;
  1307. case FLASH_CFI_16BIT:
  1308. info->device_id = flash_read_word (info,
  1309. FLASH_OFFSET_DEVICE_ID);
  1310. break;
  1311. default:
  1312. break;
  1313. }
  1314. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1315. }
  1316. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1317. {
  1318. info->cmd_reset = AMD_CMD_RESET;
  1319. cmdset_amd_read_jedec_ids(info);
  1320. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1321. return 0;
  1322. }
  1323. #ifdef CONFIG_FLASH_CFI_LEGACY
  1324. static void flash_read_jedec_ids (flash_info_t * info)
  1325. {
  1326. info->manufacturer_id = 0;
  1327. info->device_id = 0;
  1328. info->device_id2 = 0;
  1329. switch (info->vendor) {
  1330. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1331. case CFI_CMDSET_INTEL_STANDARD:
  1332. case CFI_CMDSET_INTEL_EXTENDED:
  1333. cmdset_intel_read_jedec_ids(info);
  1334. break;
  1335. case CFI_CMDSET_AMD_STANDARD:
  1336. case CFI_CMDSET_AMD_EXTENDED:
  1337. cmdset_amd_read_jedec_ids(info);
  1338. break;
  1339. default:
  1340. break;
  1341. }
  1342. }
  1343. /*-----------------------------------------------------------------------
  1344. * Call board code to request info about non-CFI flash.
  1345. * board_flash_get_legacy needs to fill in at least:
  1346. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1347. */
  1348. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1349. {
  1350. flash_info_t *info = &flash_info[banknum];
  1351. if (board_flash_get_legacy(base, banknum, info)) {
  1352. /* board code may have filled info completely. If not, we
  1353. use JEDEC ID probing. */
  1354. if (!info->vendor) {
  1355. int modes[] = {
  1356. CFI_CMDSET_AMD_STANDARD,
  1357. CFI_CMDSET_INTEL_STANDARD
  1358. };
  1359. int i;
  1360. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1361. info->vendor = modes[i];
  1362. info->start[0] =
  1363. (ulong)map_physmem(base,
  1364. info->portwidth,
  1365. MAP_NOCACHE);
  1366. if (info->portwidth == FLASH_CFI_8BIT
  1367. && info->interface == FLASH_CFI_X8X16) {
  1368. info->addr_unlock1 = 0x2AAA;
  1369. info->addr_unlock2 = 0x5555;
  1370. } else {
  1371. info->addr_unlock1 = 0x5555;
  1372. info->addr_unlock2 = 0x2AAA;
  1373. }
  1374. flash_read_jedec_ids(info);
  1375. debug("JEDEC PROBE: ID %x %x %x\n",
  1376. info->manufacturer_id,
  1377. info->device_id,
  1378. info->device_id2);
  1379. if (jedec_flash_match(info, info->start[0]))
  1380. break;
  1381. else
  1382. unmap_physmem((void *)info->start[0],
  1383. MAP_NOCACHE);
  1384. }
  1385. }
  1386. switch(info->vendor) {
  1387. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1388. case CFI_CMDSET_INTEL_STANDARD:
  1389. case CFI_CMDSET_INTEL_EXTENDED:
  1390. info->cmd_reset = FLASH_CMD_RESET;
  1391. break;
  1392. case CFI_CMDSET_AMD_STANDARD:
  1393. case CFI_CMDSET_AMD_EXTENDED:
  1394. case CFI_CMDSET_AMD_LEGACY:
  1395. info->cmd_reset = AMD_CMD_RESET;
  1396. break;
  1397. }
  1398. info->flash_id = FLASH_MAN_CFI;
  1399. return 1;
  1400. }
  1401. return 0; /* use CFI */
  1402. }
  1403. #else
  1404. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1405. {
  1406. return 0; /* use CFI */
  1407. }
  1408. #endif
  1409. /*-----------------------------------------------------------------------
  1410. * detect if flash is compatible with the Common Flash Interface (CFI)
  1411. * http://www.jedec.org/download/search/jesd68.pdf
  1412. */
  1413. static void flash_read_cfi (flash_info_t *info, void *buf,
  1414. unsigned int start, size_t len)
  1415. {
  1416. u8 *p = buf;
  1417. unsigned int i;
  1418. for (i = 0; i < len; i++)
  1419. p[i] = flash_read_uchar(info, start + i);
  1420. }
  1421. void __flash_cmd_reset(flash_info_t *info)
  1422. {
  1423. /*
  1424. * We do not yet know what kind of commandset to use, so we issue
  1425. * the reset command in both Intel and AMD variants, in the hope
  1426. * that AMD flash roms ignore the Intel command.
  1427. */
  1428. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1429. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1430. }
  1431. void flash_cmd_reset(flash_info_t *info)
  1432. __attribute__((weak,alias("__flash_cmd_reset")));
  1433. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1434. {
  1435. int cfi_offset;
  1436. /* Issue FLASH reset command */
  1437. flash_cmd_reset(info);
  1438. for (cfi_offset=0;
  1439. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1440. cfi_offset++) {
  1441. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1442. FLASH_CMD_CFI);
  1443. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1444. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1445. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1446. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1447. sizeof(struct cfi_qry));
  1448. info->interface = le16_to_cpu(qry->interface_desc);
  1449. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1450. debug ("device interface is %d\n",
  1451. info->interface);
  1452. debug ("found port %d chip %d ",
  1453. info->portwidth, info->chipwidth);
  1454. debug ("port %d bits chip %d bits\n",
  1455. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1456. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1457. /* calculate command offsets as in the Linux driver */
  1458. info->addr_unlock1 = 0x555;
  1459. info->addr_unlock2 = 0x2aa;
  1460. /*
  1461. * modify the unlock address if we are
  1462. * in compatibility mode
  1463. */
  1464. if ( /* x8/x16 in x8 mode */
  1465. ((info->chipwidth == FLASH_CFI_BY8) &&
  1466. (info->interface == FLASH_CFI_X8X16)) ||
  1467. /* x16/x32 in x16 mode */
  1468. ((info->chipwidth == FLASH_CFI_BY16) &&
  1469. (info->interface == FLASH_CFI_X16X32)))
  1470. {
  1471. info->addr_unlock1 = 0xaaa;
  1472. info->addr_unlock2 = 0x555;
  1473. }
  1474. info->name = "CFI conformant";
  1475. return 1;
  1476. }
  1477. }
  1478. return 0;
  1479. }
  1480. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1481. {
  1482. debug ("flash detect cfi\n");
  1483. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1484. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1485. for (info->chipwidth = FLASH_CFI_BY8;
  1486. info->chipwidth <= info->portwidth;
  1487. info->chipwidth <<= 1)
  1488. if (__flash_detect_cfi(info, qry))
  1489. return 1;
  1490. }
  1491. debug ("not found\n");
  1492. return 0;
  1493. }
  1494. /*
  1495. * Manufacturer-specific quirks. Add workarounds for geometry
  1496. * reversal, etc. here.
  1497. */
  1498. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1499. {
  1500. /* check if flash geometry needs reversal */
  1501. if (qry->num_erase_regions > 1) {
  1502. /* reverse geometry if top boot part */
  1503. if (info->cfi_version < 0x3131) {
  1504. /* CFI < 1.1, try to guess from device id */
  1505. if ((info->device_id & 0x80) != 0)
  1506. cfi_reverse_geometry(qry);
  1507. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1508. /* CFI >= 1.1, deduct from top/bottom flag */
  1509. /* note: ext_addr is valid since cfi_version > 0 */
  1510. cfi_reverse_geometry(qry);
  1511. }
  1512. }
  1513. }
  1514. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1515. {
  1516. int reverse_geometry = 0;
  1517. /* Check the "top boot" bit in the PRI */
  1518. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1519. reverse_geometry = 1;
  1520. /* AT49BV6416(T) list the erase regions in the wrong order.
  1521. * However, the device ID is identical with the non-broken
  1522. * AT49BV642D they differ in the high byte.
  1523. */
  1524. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1525. reverse_geometry = !reverse_geometry;
  1526. if (reverse_geometry)
  1527. cfi_reverse_geometry(qry);
  1528. }
  1529. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1530. {
  1531. /* check if flash geometry needs reversal */
  1532. if (qry->num_erase_regions > 1) {
  1533. /* reverse geometry if top boot part */
  1534. if (info->cfi_version < 0x3131) {
  1535. /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
  1536. if (info->device_id == 0x22CA ||
  1537. info->device_id == 0x2256) {
  1538. cfi_reverse_geometry(qry);
  1539. }
  1540. }
  1541. }
  1542. }
  1543. /*
  1544. * The following code cannot be run from FLASH!
  1545. *
  1546. */
  1547. ulong flash_get_size (phys_addr_t base, int banknum)
  1548. {
  1549. flash_info_t *info = &flash_info[banknum];
  1550. int i, j;
  1551. flash_sect_t sect_cnt;
  1552. phys_addr_t sector;
  1553. unsigned long tmp;
  1554. int size_ratio;
  1555. uchar num_erase_regions;
  1556. int erase_region_size;
  1557. int erase_region_count;
  1558. struct cfi_qry qry;
  1559. memset(&qry, 0, sizeof(qry));
  1560. info->ext_addr = 0;
  1561. info->cfi_version = 0;
  1562. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1563. info->legacy_unlock = 0;
  1564. #endif
  1565. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1566. if (flash_detect_cfi (info, &qry)) {
  1567. info->vendor = le16_to_cpu(qry.p_id);
  1568. info->ext_addr = le16_to_cpu(qry.p_adr);
  1569. num_erase_regions = qry.num_erase_regions;
  1570. if (info->ext_addr) {
  1571. info->cfi_version = (ushort) flash_read_uchar (info,
  1572. info->ext_addr + 3) << 8;
  1573. info->cfi_version |= (ushort) flash_read_uchar (info,
  1574. info->ext_addr + 4);
  1575. }
  1576. #ifdef DEBUG
  1577. flash_printqry (&qry);
  1578. #endif
  1579. switch (info->vendor) {
  1580. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1581. case CFI_CMDSET_INTEL_STANDARD:
  1582. case CFI_CMDSET_INTEL_EXTENDED:
  1583. cmdset_intel_init(info, &qry);
  1584. break;
  1585. case CFI_CMDSET_AMD_STANDARD:
  1586. case CFI_CMDSET_AMD_EXTENDED:
  1587. cmdset_amd_init(info, &qry);
  1588. break;
  1589. default:
  1590. printf("CFI: Unknown command set 0x%x\n",
  1591. info->vendor);
  1592. /*
  1593. * Unfortunately, this means we don't know how
  1594. * to get the chip back to Read mode. Might
  1595. * as well try an Intel-style reset...
  1596. */
  1597. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1598. return 0;
  1599. }
  1600. /* Do manufacturer-specific fixups */
  1601. switch (info->manufacturer_id) {
  1602. case 0x0001:
  1603. flash_fixup_amd(info, &qry);
  1604. break;
  1605. case 0x001f:
  1606. flash_fixup_atmel(info, &qry);
  1607. break;
  1608. case 0x0020:
  1609. flash_fixup_stm(info, &qry);
  1610. break;
  1611. }
  1612. debug ("manufacturer is %d\n", info->vendor);
  1613. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1614. debug ("device id is 0x%x\n", info->device_id);
  1615. debug ("device id2 is 0x%x\n", info->device_id2);
  1616. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1617. size_ratio = info->portwidth / info->chipwidth;
  1618. /* if the chip is x8/x16 reduce the ratio by half */
  1619. if ((info->interface == FLASH_CFI_X8X16)
  1620. && (info->chipwidth == FLASH_CFI_BY8)) {
  1621. size_ratio >>= 1;
  1622. }
  1623. debug ("size_ratio %d port %d bits chip %d bits\n",
  1624. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1625. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1626. debug ("found %d erase regions\n", num_erase_regions);
  1627. sect_cnt = 0;
  1628. sector = base;
  1629. for (i = 0; i < num_erase_regions; i++) {
  1630. if (i > NUM_ERASE_REGIONS) {
  1631. printf ("%d erase regions found, only %d used\n",
  1632. num_erase_regions, NUM_ERASE_REGIONS);
  1633. break;
  1634. }
  1635. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1636. debug("erase region %u: 0x%08lx\n", i, tmp);
  1637. erase_region_count = (tmp & 0xffff) + 1;
  1638. tmp >>= 16;
  1639. erase_region_size =
  1640. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1641. debug ("erase_region_count = %d erase_region_size = %d\n",
  1642. erase_region_count, erase_region_size);
  1643. for (j = 0; j < erase_region_count; j++) {
  1644. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1645. printf("ERROR: too many flash sectors\n");
  1646. break;
  1647. }
  1648. info->start[sect_cnt] =
  1649. (ulong)map_physmem(sector,
  1650. info->portwidth,
  1651. MAP_NOCACHE);
  1652. sector += (erase_region_size * size_ratio);
  1653. /*
  1654. * Only read protection status from
  1655. * supported devices (intel...)
  1656. */
  1657. switch (info->vendor) {
  1658. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1659. case CFI_CMDSET_INTEL_EXTENDED:
  1660. case CFI_CMDSET_INTEL_STANDARD:
  1661. info->protect[sect_cnt] =
  1662. flash_isset (info, sect_cnt,
  1663. FLASH_OFFSET_PROTECT,
  1664. FLASH_STATUS_PROTECT);
  1665. break;
  1666. default:
  1667. /* default: not protected */
  1668. info->protect[sect_cnt] = 0;
  1669. }
  1670. sect_cnt++;
  1671. }
  1672. }
  1673. info->sector_count = sect_cnt;
  1674. info->size = 1 << qry.dev_size;
  1675. /* multiply the size by the number of chips */
  1676. info->size *= size_ratio;
  1677. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  1678. tmp = 1 << qry.block_erase_timeout_typ;
  1679. info->erase_blk_tout = tmp *
  1680. (1 << qry.block_erase_timeout_max);
  1681. tmp = (1 << qry.buf_write_timeout_typ) *
  1682. (1 << qry.buf_write_timeout_max);
  1683. /* round up when converting to ms */
  1684. info->buffer_write_tout = (tmp + 999) / 1000;
  1685. tmp = (1 << qry.word_write_timeout_typ) *
  1686. (1 << qry.word_write_timeout_max);
  1687. /* round up when converting to ms */
  1688. info->write_tout = (tmp + 999) / 1000;
  1689. info->flash_id = FLASH_MAN_CFI;
  1690. if ((info->interface == FLASH_CFI_X8X16) &&
  1691. (info->chipwidth == FLASH_CFI_BY8)) {
  1692. /* XXX - Need to test on x8/x16 in parallel. */
  1693. info->portwidth >>= 1;
  1694. }
  1695. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1696. }
  1697. return (info->size);
  1698. }
  1699. void flash_set_verbose(uint v)
  1700. {
  1701. flash_verbose = v;
  1702. }
  1703. /*-----------------------------------------------------------------------
  1704. */
  1705. unsigned long flash_init (void)
  1706. {
  1707. unsigned long size = 0;
  1708. int i;
  1709. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1710. struct apl_s {
  1711. ulong start;
  1712. ulong size;
  1713. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  1714. #endif
  1715. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1716. /* read environment from EEPROM */
  1717. char s[64];
  1718. getenv_r ("unlock", s, sizeof(s));
  1719. #endif
  1720. #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
  1721. /* Init: no FLASHes known */
  1722. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  1723. flash_info[i].flash_id = FLASH_UNKNOWN;
  1724. if (!flash_detect_legacy (BANK_BASE(i), i))
  1725. flash_get_size (BANK_BASE(i), i);
  1726. size += flash_info[i].size;
  1727. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  1728. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  1729. printf ("## Unknown FLASH on Bank %d "
  1730. "- Size = 0x%08lx = %ld MB\n",
  1731. i+1, flash_info[i].size,
  1732. flash_info[i].size << 20);
  1733. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  1734. }
  1735. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1736. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  1737. /*
  1738. * Only the U-Boot image and it's environment
  1739. * is protected, all other sectors are
  1740. * unprotected (unlocked) if flash hardware
  1741. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  1742. * and the environment variable "unlock" is
  1743. * set to "yes".
  1744. */
  1745. if (flash_info[i].legacy_unlock) {
  1746. int k;
  1747. /*
  1748. * Disable legacy_unlock temporarily,
  1749. * since flash_real_protect would
  1750. * relock all other sectors again
  1751. * otherwise.
  1752. */
  1753. flash_info[i].legacy_unlock = 0;
  1754. /*
  1755. * Legacy unlocking (e.g. Intel J3) ->
  1756. * unlock only one sector. This will
  1757. * unlock all sectors.
  1758. */
  1759. flash_real_protect (&flash_info[i], 0, 0);
  1760. flash_info[i].legacy_unlock = 1;
  1761. /*
  1762. * Manually mark other sectors as
  1763. * unlocked (unprotected)
  1764. */
  1765. for (k = 1; k < flash_info[i].sector_count; k++)
  1766. flash_info[i].protect[k] = 0;
  1767. } else {
  1768. /*
  1769. * No legancy unlocking -> unlock all sectors
  1770. */
  1771. flash_protect (FLAG_PROTECT_CLEAR,
  1772. flash_info[i].start[0],
  1773. flash_info[i].start[0]
  1774. + flash_info[i].size - 1,
  1775. &flash_info[i]);
  1776. }
  1777. }
  1778. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1779. }
  1780. /* Monitor protection ON by default */
  1781. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  1782. flash_protect (FLAG_PROTECT_SET,
  1783. CONFIG_SYS_MONITOR_BASE,
  1784. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  1785. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  1786. #endif
  1787. /* Environment protection ON by default */
  1788. #ifdef CONFIG_ENV_IS_IN_FLASH
  1789. flash_protect (FLAG_PROTECT_SET,
  1790. CONFIG_ENV_ADDR,
  1791. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  1792. flash_get_info(CONFIG_ENV_ADDR));
  1793. #endif
  1794. /* Redundant environment protection ON by default */
  1795. #ifdef CONFIG_ENV_ADDR_REDUND
  1796. flash_protect (FLAG_PROTECT_SET,
  1797. CONFIG_ENV_ADDR_REDUND,
  1798. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  1799. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  1800. #endif
  1801. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1802. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  1803. debug("autoprotecting from %08x to %08x\n",
  1804. apl[i].start, apl[i].start + apl[i].size - 1);
  1805. flash_protect (FLAG_PROTECT_SET,
  1806. apl[i].start,
  1807. apl[i].start + apl[i].size - 1,
  1808. flash_get_info(apl[i].start));
  1809. }
  1810. #endif
  1811. #ifdef CONFIG_FLASH_CFI_MTD
  1812. cfi_mtd_init();
  1813. #endif
  1814. return (size);
  1815. }