tam3517-common.h 11 KB

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  1. /*
  2. * Copyright (C) 2011
  3. * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
  4. *
  5. * Copyright (C) 2009 TechNexion Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc.
  20. */
  21. #ifndef __TAM3517_H
  22. #define __TAM3517_H
  23. /*
  24. * High Level Configuration Options
  25. */
  26. #define CONFIG_OMAP /* in a TI OMAP core */
  27. #define CONFIG_OMAP34XX /* which is a 34XX */
  28. #define CONFIG_SYS_TEXT_BASE 0x80008000
  29. #define CONFIG_SYS_CACHELINE_SIZE 64
  30. #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
  31. #include <asm/arch/cpu.h> /* get chip and board defs */
  32. #include <asm/arch/omap3.h>
  33. /*
  34. * Display CPU and Board information
  35. */
  36. #define CONFIG_DISPLAY_CPUINFO
  37. #define CONFIG_DISPLAY_BOARDINFO
  38. /* Clock Defines */
  39. #define V_OSCK 26000000 /* Clock output from T2 */
  40. #define V_SCLK (V_OSCK >> 1)
  41. #undef CONFIG_USE_IRQ /* no support for IRQs */
  42. #define CONFIG_MISC_INIT_R
  43. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  44. #define CONFIG_SETUP_MEMORY_TAGS
  45. #define CONFIG_INITRD_TAG
  46. #define CONFIG_REVISION_TAG
  47. /*
  48. * Size of malloc() pool
  49. */
  50. #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
  51. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
  52. 2 * 1024 * 1024)
  53. /*
  54. * DDR related
  55. */
  56. #define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */
  57. #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
  58. /*
  59. * Hardware drivers
  60. */
  61. /*
  62. * NS16550 Configuration
  63. */
  64. #define CONFIG_SYS_NS16550
  65. #define CONFIG_SYS_NS16550_SERIAL
  66. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  67. #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
  68. /*
  69. * select serial console configuration
  70. */
  71. #define CONFIG_CONS_INDEX 1
  72. #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
  73. #define CONFIG_SERIAL1 /* UART1 */
  74. /* allow to overwrite serial and ethaddr */
  75. #define CONFIG_ENV_OVERWRITE
  76. #define CONFIG_BAUDRATE 115200
  77. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
  78. 115200}
  79. #define CONFIG_MMC
  80. #define CONFIG_OMAP_HSMMC
  81. #define CONFIG_GENERIC_MMC
  82. #define CONFIG_DOS_PARTITION
  83. /* EHCI */
  84. #define CONFIG_OMAP3_GPIO_5
  85. #define CONFIG_USB_EHCI
  86. #define CONFIG_USB_EHCI_OMAP
  87. #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
  88. #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
  89. #define CONFIG_USB_STORAGE
  90. /* #define CONFIG_EHCI_DCACHE */
  91. /* commands to include */
  92. #include <config_cmd_default.h>
  93. #define CONFIG_CMD_CACHE
  94. #define CONFIG_CMD_DHCP
  95. #define CONFIG_CMD_EXT2 /* EXT2 Support */
  96. #define CONFIG_CMD_FAT /* FAT support */
  97. #define CONFIG_CMD_GPIO
  98. #define CONFIG_CMD_I2C /* I2C serial bus support */
  99. #define CONFIG_CMD_MII
  100. #define CONFIG_CMD_MMC /* MMC support */
  101. #define CONFIG_CMD_NET
  102. #define CONFIG_CMD_NFS
  103. #define CONFIG_CMD_NAND /* NAND support */
  104. #define CONFIG_CMD_PING
  105. #define CONFIG_CMD_USB
  106. #undef CONFIG_CMD_FLASH /* only NAND on the SOM */
  107. #undef CONFIG_CMD_IMLS
  108. #define CONFIG_SYS_NO_FLASH
  109. #define CONFIG_HARD_I2C
  110. #define CONFIG_SYS_I2C_SPEED 400000
  111. #define CONFIG_SYS_I2C_SLAVE 1
  112. #define CONFIG_SYS_I2C_BUS 0
  113. #define CONFIG_SYS_I2C_BUS_SELECT 1
  114. #define CONFIG_DRIVER_OMAP34XX_I2C
  115. /*
  116. * Board NAND Info.
  117. */
  118. #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
  119. /* to access */
  120. /* nand at CS0 */
  121. #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
  122. /* NAND devices */
  123. #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
  124. #define CONFIG_AUTO_COMPLETE
  125. /*
  126. * Miscellaneous configurable options
  127. */
  128. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  129. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  130. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  131. #define CONFIG_CMDLINE_EDITING
  132. #define CONFIG_AUTO_COMPLETE
  133. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  134. /* Print Buffer Size */
  135. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  136. sizeof(CONFIG_SYS_PROMPT) + 16)
  137. #define CONFIG_SYS_MAXARGS 32 /* max number of command */
  138. /* args */
  139. /* Boot Argument Buffer Size */
  140. #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
  141. /* memtest works on */
  142. #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
  143. #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
  144. 0x01F00000) /* 31MB */
  145. #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
  146. /* address */
  147. /*
  148. * AM3517 has 12 GP timers, they can be driven by the system clock
  149. * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  150. * This rate is divided by a local divisor.
  151. */
  152. #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
  153. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  154. #define CONFIG_SYS_HZ 1000
  155. /*
  156. * Stack sizes
  157. * The stack sizes are set up in start.S using the settings below
  158. */
  159. #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
  160. /*
  161. * Physical Memory Map
  162. */
  163. #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
  164. #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
  165. #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
  166. #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
  167. /*
  168. * FLASH and environment organization
  169. */
  170. /* **** PISMO SUPPORT *** */
  171. /* Configure the PISMO */
  172. #define PISMO1_NAND_SIZE GPMC_SIZE_128M
  173. #define CONFIG_NAND_OMAP_GPMC
  174. #define GPMC_NAND_ECC_LP_x16_LAYOUT
  175. #define CONFIG_ENV_IS_IN_NAND
  176. #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
  177. /* Redundant Environment */
  178. #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
  179. #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
  180. #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
  181. #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
  182. 2 * CONFIG_SYS_ENV_SECT_SIZE)
  183. #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
  184. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  185. #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
  186. #define CONFIG_SYS_INIT_RAM_SIZE 0x800
  187. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  188. CONFIG_SYS_INIT_RAM_SIZE - \
  189. GENERATED_GBL_DATA_SIZE)
  190. /*
  191. * ethernet support, EMAC
  192. *
  193. */
  194. #define CONFIG_DRIVER_TI_EMAC
  195. #define CONFIG_DRIVER_TI_EMAC_USE_RMII
  196. #define CONFIG_MII
  197. #define CONFIG_EMAC_MDIO_PHY_NUM 0
  198. #define CONFIG_BOOTP_DEFAULT
  199. #define CONFIG_BOOTP_DNS
  200. #define CONFIG_BOOTP_DNS2
  201. #define CONFIG_BOOTP_SEND_HOSTNAME
  202. #define CONFIG_NET_RETRY_COUNT 10
  203. #define CONFIG_NET_MULTI
  204. /* Defines for SPL */
  205. #define CONFIG_SPL
  206. #define CONFIG_SPL_CONSOLE
  207. #define CONFIG_SPL_NAND_SIMPLE
  208. #define CONFIG_SPL_NAND_SOFTECC
  209. #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
  210. #define CONFIG_SPL_LIBCOMMON_SUPPORT
  211. #define CONFIG_SPL_LIBDISK_SUPPORT
  212. #define CONFIG_SPL_I2C_SUPPORT
  213. #define CONFIG_SPL_LIBGENERIC_SUPPORT
  214. #define CONFIG_SPL_SERIAL_SUPPORT
  215. #define CONFIG_SPL_POWER_SUPPORT
  216. #define CONFIG_SPL_NAND_SUPPORT
  217. #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
  218. #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
  219. #define CONFIG_SPL_MAX_SIZE (45 << 10) /* 45 K */
  220. #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
  221. #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
  222. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
  223. #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
  224. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  225. /* NAND boot config */
  226. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  227. #define CONFIG_SYS_NAND_PAGE_SIZE 2048
  228. #define CONFIG_SYS_NAND_OOBSIZE 64
  229. #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
  230. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  231. #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
  232. #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
  233. 48, 49, 50, 51, 52, 53, 54, 55,\
  234. 56, 57, 58, 59, 60, 61, 62, 63}
  235. #define CONFIG_SYS_NAND_ECCSIZE 256
  236. #define CONFIG_SYS_NAND_ECCBYTES 3
  237. #define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
  238. CONFIG_SYS_NAND_ECCSIZE)
  239. #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
  240. CONFIG_SYS_NAND_ECCSTEPS)
  241. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  242. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
  243. #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
  244. #define CONFIG_OF_LIBFDT
  245. #define CONFIG_FIT
  246. #define CONFIG_CMD_UBI
  247. #define CONFIG_CMD_UBIFS
  248. #define CONFIG_RBTREE
  249. #define CONFIG_LZO
  250. #define CONFIG_MTD_PARTITIONS
  251. #define CONFIG_MTD_DEVICE
  252. #define CONFIG_CMD_MTDPARTS
  253. /* Setup MTD for NAND on the SOM */
  254. #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
  255. #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
  256. "512k(u-boot),128k(env1)," \
  257. "128k(env2),6m(kernel),-(rootfs)"
  258. #define xstr(s) str(s)
  259. #define str(s) #s
  260. #define CONFIG_TAM3517_SETTINGS \
  261. "netdev=eth0\0" \
  262. "nandargs=setenv bootargs root=${nandroot} " \
  263. "rootfstype=${nandrootfstype}\0" \
  264. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  265. "nfsroot=${serverip}:${rootpath}\0" \
  266. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  267. "addip_sta=setenv bootargs ${bootargs} " \
  268. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  269. ":${hostname}:${netdev}:off panic=1\0" \
  270. "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
  271. "addip=if test -n ${ipdyn};then run addip_dyn;" \
  272. "else run addip_sta;fi\0" \
  273. "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  274. "addtty=setenv bootargs ${bootargs}" \
  275. " console=ttyO0,${baudrate}\0" \
  276. "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
  277. "loadaddr=82000000\0" \
  278. "kernel_addr_r=82000000\0" \
  279. "hostname=" xstr(CONFIG_HOSTNAME) "\0" \
  280. "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
  281. "flash_self=run ramargs addip addtty addmtd addmisc;" \
  282. "bootm ${kernel_addr} ${ramdisk_addr}\0" \
  283. "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
  284. "bootm ${kernel_addr}\0" \
  285. "nandboot=run nandargs addip addtty addmtd addmisc;" \
  286. "nand read ${kernel_addr_r} kernel\0" \
  287. "bootm ${kernel_addr_r}\0" \
  288. "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
  289. "run nfsargs addip addtty addmtd addmisc;" \
  290. "bootm ${kernel_addr_r}\0" \
  291. "net_self=if run net_self_load;then " \
  292. "run ramargs addip addtty addmtd addmisc;" \
  293. "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
  294. "else echo Images not loades;fi\0" \
  295. "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.img\0" \
  296. "load=tftp ${loadaddr} ${u-boot}\0" \
  297. "loadmlo=tftp ${loadaddr} ${mlo}\0" \
  298. "mlo=" xstr(CONFIG_HOSTNAME) "/MLO\0" \
  299. "uboot_addr=0x80000\0" \
  300. "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
  301. "nand write ${loadaddr} ${uboot_addr} 80000\0" \
  302. "updatemlo=nandecc hw;nand erase 0 20000;" \
  303. "nand write ${loadaddr} 0 20000\0" \
  304. "upd=if run load;then echo Updating u-boot;if run update;" \
  305. "then echo U-Boot updated;" \
  306. "else echo Error updating u-boot !;" \
  307. "echo Board without bootloader !!;" \
  308. "fi;" \
  309. "else echo U-Boot not downloaded..exiting;fi\0" \
  310. #endif /* __TAM3517_H */