spi_flash.c 14 KB

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  1. /*
  2. * SPI flash interface
  3. *
  4. * Copyright (C) 2008 Atmel Corporation
  5. * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <common.h>
  10. #include <fdtdec.h>
  11. #include <malloc.h>
  12. #include <spi.h>
  13. #include <spi_flash.h>
  14. #include <watchdog.h>
  15. #include "spi_flash_internal.h"
  16. DECLARE_GLOBAL_DATA_PTR;
  17. static void spi_flash_addr(u32 addr, u8 *cmd)
  18. {
  19. /* cmd[0] is actual command */
  20. cmd[1] = addr >> 16;
  21. cmd[2] = addr >> 8;
  22. cmd[3] = addr >> 0;
  23. }
  24. static int spi_flash_read_write(struct spi_slave *spi,
  25. const u8 *cmd, size_t cmd_len,
  26. const u8 *data_out, u8 *data_in,
  27. size_t data_len)
  28. {
  29. unsigned long flags = SPI_XFER_BEGIN;
  30. int ret;
  31. if (data_len == 0)
  32. flags |= SPI_XFER_END;
  33. ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
  34. if (ret) {
  35. debug("SF: Failed to send command (%zu bytes): %d\n",
  36. cmd_len, ret);
  37. } else if (data_len != 0) {
  38. ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END);
  39. if (ret)
  40. debug("SF: Failed to transfer %zu bytes of data: %d\n",
  41. data_len, ret);
  42. }
  43. return ret;
  44. }
  45. int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
  46. {
  47. return spi_flash_cmd_read(spi, &cmd, 1, response, len);
  48. }
  49. int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
  50. size_t cmd_len, void *data, size_t data_len)
  51. {
  52. return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
  53. }
  54. int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
  55. const void *data, size_t data_len)
  56. {
  57. return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
  58. }
  59. int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
  60. {
  61. struct spi_slave *spi = flash->spi;
  62. unsigned long timebase;
  63. int ret;
  64. u8 status;
  65. u8 check_status = 0x0;
  66. u8 poll_bit = STATUS_WIP;
  67. u8 cmd = flash->poll_cmd;
  68. if (cmd == CMD_FLAG_STATUS) {
  69. poll_bit = STATUS_PEC;
  70. check_status = poll_bit;
  71. }
  72. ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
  73. if (ret) {
  74. debug("SF: fail to read %s status register\n",
  75. cmd == CMD_READ_STATUS ? "read" : "flag");
  76. return ret;
  77. }
  78. timebase = get_timer(0);
  79. do {
  80. WATCHDOG_RESET();
  81. ret = spi_xfer(spi, 8, NULL, &status, 0);
  82. if (ret)
  83. return -1;
  84. if ((status & poll_bit) == check_status)
  85. break;
  86. } while (get_timer(timebase) < timeout);
  87. spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
  88. if ((status & poll_bit) == check_status)
  89. return 0;
  90. /* Timed out */
  91. debug("SF: time out!\n");
  92. return -1;
  93. }
  94. int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
  95. size_t cmd_len, const void *buf, size_t buf_len)
  96. {
  97. struct spi_slave *spi = flash->spi;
  98. unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
  99. int ret;
  100. if (buf == NULL)
  101. timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
  102. ret = spi_claim_bus(flash->spi);
  103. if (ret) {
  104. debug("SF: unable to claim SPI bus\n");
  105. return ret;
  106. }
  107. ret = spi_flash_cmd_write_enable(flash);
  108. if (ret < 0) {
  109. debug("SF: enabling write failed\n");
  110. return ret;
  111. }
  112. ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
  113. if (ret < 0) {
  114. debug("SF: write cmd failed\n");
  115. return ret;
  116. }
  117. ret = spi_flash_cmd_wait_ready(flash, timeout);
  118. if (ret < 0) {
  119. debug("SF: write %s timed out\n",
  120. timeout == SPI_FLASH_PROG_TIMEOUT ?
  121. "program" : "page erase");
  122. return ret;
  123. }
  124. spi_release_bus(spi);
  125. return ret;
  126. }
  127. int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
  128. {
  129. u32 erase_size;
  130. u8 cmd[4];
  131. int ret = -1;
  132. erase_size = flash->sector_size;
  133. if (offset % erase_size || len % erase_size) {
  134. debug("SF: Erase offset/length not multiple of erase size\n");
  135. return -1;
  136. }
  137. if (erase_size == 4096)
  138. cmd[0] = CMD_ERASE_4K;
  139. else
  140. cmd[0] = CMD_ERASE_64K;
  141. while (len) {
  142. #ifdef CONFIG_SPI_FLASH_BAR
  143. u8 bank_sel;
  144. bank_sel = offset / SPI_FLASH_16MB_BOUN;
  145. ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
  146. if (ret) {
  147. debug("SF: fail to set bank%d\n", bank_sel);
  148. return ret;
  149. }
  150. #endif
  151. spi_flash_addr(offset, cmd);
  152. debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
  153. cmd[2], cmd[3], offset);
  154. ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
  155. if (ret < 0) {
  156. debug("SF: erase failed\n");
  157. break;
  158. }
  159. offset += erase_size;
  160. len -= erase_size;
  161. }
  162. return ret;
  163. }
  164. int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
  165. size_t len, const void *buf)
  166. {
  167. unsigned long byte_addr, page_size;
  168. size_t chunk_len, actual;
  169. u8 cmd[4];
  170. int ret = -1;
  171. page_size = flash->page_size;
  172. cmd[0] = CMD_PAGE_PROGRAM;
  173. for (actual = 0; actual < len; actual += chunk_len) {
  174. #ifdef CONFIG_SPI_FLASH_BAR
  175. u8 bank_sel;
  176. bank_sel = offset / SPI_FLASH_16MB_BOUN;
  177. ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
  178. if (ret) {
  179. debug("SF: fail to set bank%d\n", bank_sel);
  180. return ret;
  181. }
  182. #endif
  183. byte_addr = offset % page_size;
  184. chunk_len = min(len - actual, page_size - byte_addr);
  185. if (flash->spi->max_write_size)
  186. chunk_len = min(chunk_len, flash->spi->max_write_size);
  187. spi_flash_addr(offset, cmd);
  188. debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
  189. buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
  190. ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
  191. buf + actual, chunk_len);
  192. if (ret < 0) {
  193. debug("SF: write failed\n");
  194. break;
  195. }
  196. offset += chunk_len;
  197. }
  198. return ret;
  199. }
  200. int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
  201. size_t cmd_len, void *data, size_t data_len)
  202. {
  203. struct spi_slave *spi = flash->spi;
  204. int ret;
  205. ret = spi_claim_bus(flash->spi);
  206. if (ret) {
  207. debug("SF: unable to claim SPI bus\n");
  208. return ret;
  209. }
  210. ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
  211. if (ret < 0) {
  212. debug("SF: read cmd failed\n");
  213. return ret;
  214. }
  215. spi_release_bus(spi);
  216. return ret;
  217. }
  218. int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
  219. size_t len, void *data)
  220. {
  221. u8 cmd[5], bank_sel = 0;
  222. u32 remain_len, read_len;
  223. int ret = -1;
  224. /* Handle memory-mapped SPI */
  225. if (flash->memory_map) {
  226. memcpy(data, flash->memory_map + offset, len);
  227. return 0;
  228. }
  229. cmd[0] = CMD_READ_ARRAY_FAST;
  230. cmd[4] = 0x00;
  231. while (len) {
  232. #ifdef CONFIG_SPI_FLASH_BAR
  233. bank_sel = offset / SPI_FLASH_16MB_BOUN;
  234. ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
  235. if (ret) {
  236. debug("SF: fail to set bank%d\n", bank_sel);
  237. return ret;
  238. }
  239. #endif
  240. remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
  241. if (len < remain_len)
  242. read_len = len;
  243. else
  244. read_len = remain_len;
  245. spi_flash_addr(offset, cmd);
  246. ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
  247. data, read_len);
  248. if (ret < 0) {
  249. debug("SF: read failed\n");
  250. break;
  251. }
  252. offset += read_len;
  253. len -= read_len;
  254. data += read_len;
  255. }
  256. return ret;
  257. }
  258. int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
  259. {
  260. u8 cmd;
  261. int ret;
  262. cmd = CMD_WRITE_STATUS;
  263. ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1);
  264. if (ret < 0) {
  265. debug("SF: fail to write status register\n");
  266. return ret;
  267. }
  268. return 0;
  269. }
  270. #ifdef CONFIG_SPI_FLASH_BAR
  271. int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
  272. {
  273. u8 cmd;
  274. int ret;
  275. if (flash->bank_curr == bank_sel) {
  276. debug("SF: not require to enable bank%d\n", bank_sel);
  277. return 0;
  278. }
  279. cmd = flash->bank_write_cmd;
  280. ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
  281. if (ret < 0) {
  282. debug("SF: fail to write bank register\n");
  283. return ret;
  284. }
  285. flash->bank_curr = bank_sel;
  286. return 0;
  287. }
  288. int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
  289. {
  290. u8 cmd;
  291. u8 curr_bank = 0;
  292. /* discover bank cmds */
  293. switch (idcode0) {
  294. case SPI_FLASH_SPANSION_IDCODE0:
  295. flash->bank_read_cmd = CMD_BANKADDR_BRRD;
  296. flash->bank_write_cmd = CMD_BANKADDR_BRWR;
  297. break;
  298. case SPI_FLASH_STMICRO_IDCODE0:
  299. case SPI_FLASH_WINBOND_IDCODE0:
  300. flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
  301. flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
  302. break;
  303. default:
  304. printf("SF: Unsupported bank commands %02x\n", idcode0);
  305. return -1;
  306. }
  307. /* read the bank reg - on which bank the flash is in currently */
  308. cmd = flash->bank_read_cmd;
  309. if (flash->size > SPI_FLASH_16MB_BOUN) {
  310. if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
  311. debug("SF: fail to read bank addr register\n");
  312. return -1;
  313. }
  314. flash->bank_curr = curr_bank;
  315. } else {
  316. flash->bank_curr = curr_bank;
  317. }
  318. return 0;
  319. }
  320. #endif
  321. #ifdef CONFIG_OF_CONTROL
  322. int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
  323. {
  324. fdt_addr_t addr;
  325. fdt_size_t size;
  326. int node;
  327. /* If there is no node, do nothing */
  328. node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
  329. if (node < 0)
  330. return 0;
  331. addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
  332. if (addr == FDT_ADDR_T_NONE) {
  333. debug("%s: Cannot decode address\n", __func__);
  334. return 0;
  335. }
  336. if (flash->size != size) {
  337. debug("%s: Memory map must cover entire device\n", __func__);
  338. return -1;
  339. }
  340. flash->memory_map = (void *)addr;
  341. return 0;
  342. }
  343. #endif /* CONFIG_OF_CONTROL */
  344. /*
  345. * The following table holds all device probe functions
  346. *
  347. * shift: number of continuation bytes before the ID
  348. * idcode: the expected IDCODE or 0xff for non JEDEC devices
  349. * probe: the function to call
  350. *
  351. * Non JEDEC devices should be ordered in the table such that
  352. * the probe functions with best detection algorithms come first.
  353. *
  354. * Several matching entries are permitted, they will be tried
  355. * in sequence until a probe function returns non NULL.
  356. *
  357. * IDCODE_CONT_LEN may be redefined if a device needs to declare a
  358. * larger "shift" value. IDCODE_PART_LEN generally shouldn't be
  359. * changed. This is the max number of bytes probe functions may
  360. * examine when looking up part-specific identification info.
  361. *
  362. * Probe functions will be given the idcode buffer starting at their
  363. * manu id byte (the "idcode" in the table below). In other words,
  364. * all of the continuation bytes will be skipped (the "shift" below).
  365. */
  366. #define IDCODE_CONT_LEN 0
  367. #define IDCODE_PART_LEN 5
  368. static const struct {
  369. const u8 shift;
  370. const u8 idcode;
  371. struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
  372. } flashes[] = {
  373. /* Keep it sorted by define name */
  374. #ifdef CONFIG_SPI_FLASH_ATMEL
  375. { 0, 0x1f, spi_flash_probe_atmel, },
  376. #endif
  377. #ifdef CONFIG_SPI_FLASH_EON
  378. { 0, 0x1c, spi_flash_probe_eon, },
  379. #endif
  380. #ifdef CONFIG_SPI_FLASH_GIGADEVICE
  381. { 0, 0xc8, spi_flash_probe_gigadevice, },
  382. #endif
  383. #ifdef CONFIG_SPI_FLASH_MACRONIX
  384. { 0, 0xc2, spi_flash_probe_macronix, },
  385. #endif
  386. #ifdef CONFIG_SPI_FLASH_SPANSION
  387. { 0, 0x01, spi_flash_probe_spansion, },
  388. #endif
  389. #ifdef CONFIG_SPI_FLASH_SST
  390. { 0, 0xbf, spi_flash_probe_sst, },
  391. #endif
  392. #ifdef CONFIG_SPI_FLASH_STMICRO
  393. { 0, 0x20, spi_flash_probe_stmicro, },
  394. #endif
  395. #ifdef CONFIG_SPI_FLASH_WINBOND
  396. { 0, 0xef, spi_flash_probe_winbond, },
  397. #endif
  398. #ifdef CONFIG_SPI_FRAM_RAMTRON
  399. { 6, 0xc2, spi_fram_probe_ramtron, },
  400. # undef IDCODE_CONT_LEN
  401. # define IDCODE_CONT_LEN 6
  402. #endif
  403. /* Keep it sorted by best detection */
  404. #ifdef CONFIG_SPI_FLASH_STMICRO
  405. { 0, 0xff, spi_flash_probe_stmicro, },
  406. #endif
  407. #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
  408. { 0, 0xff, spi_fram_probe_ramtron, },
  409. #endif
  410. };
  411. #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
  412. struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
  413. unsigned int max_hz, unsigned int spi_mode)
  414. {
  415. struct spi_slave *spi;
  416. struct spi_flash *flash = NULL;
  417. int ret, i, shift;
  418. u8 idcode[IDCODE_LEN], *idp;
  419. spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
  420. if (!spi) {
  421. printf("SF: Failed to set up slave\n");
  422. return NULL;
  423. }
  424. ret = spi_claim_bus(spi);
  425. if (ret) {
  426. debug("SF: Failed to claim SPI bus: %d\n", ret);
  427. goto err_claim_bus;
  428. }
  429. /* Read the ID codes */
  430. ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
  431. if (ret)
  432. goto err_read_id;
  433. #ifdef DEBUG
  434. printf("SF: Got idcodes\n");
  435. print_buffer(0, idcode, 1, sizeof(idcode), 0);
  436. #endif
  437. /* count the number of continuation bytes */
  438. for (shift = 0, idp = idcode;
  439. shift < IDCODE_CONT_LEN && *idp == 0x7f;
  440. ++shift, ++idp)
  441. continue;
  442. /* search the table for matches in shift and id */
  443. for (i = 0; i < ARRAY_SIZE(flashes); ++i)
  444. if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
  445. /* we have a match, call probe */
  446. flash = flashes[i].probe(spi, idp);
  447. if (flash)
  448. break;
  449. }
  450. if (!flash) {
  451. printf("SF: Unsupported manufacturer %02x\n", *idp);
  452. goto err_manufacturer_probe;
  453. }
  454. #ifdef CONFIG_SPI_FLASH_BAR
  455. /* Configure the BAR - disover bank cmds and read current bank */
  456. ret = spi_flash_bank_config(flash, *idp);
  457. if (ret < 0)
  458. goto err_manufacturer_probe;
  459. #endif
  460. #ifdef CONFIG_OF_CONTROL
  461. if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
  462. debug("SF: FDT decode error\n");
  463. goto err_manufacturer_probe;
  464. }
  465. #endif
  466. printf("SF: Detected %s with page size ", flash->name);
  467. print_size(flash->sector_size, ", total ");
  468. print_size(flash->size, "");
  469. if (flash->memory_map)
  470. printf(", mapped at %p", flash->memory_map);
  471. puts("\n");
  472. #ifndef CONFIG_SPI_FLASH_BAR
  473. if (flash->size > SPI_FLASH_16MB_BOUN) {
  474. puts("SF: Warning - Only lower 16MiB accessible,");
  475. puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
  476. }
  477. #endif
  478. spi_release_bus(spi);
  479. return flash;
  480. err_manufacturer_probe:
  481. err_read_id:
  482. spi_release_bus(spi);
  483. err_claim_bus:
  484. spi_free_slave(spi);
  485. return NULL;
  486. }
  487. void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
  488. const char *name)
  489. {
  490. struct spi_flash *flash;
  491. void *ptr;
  492. ptr = malloc(size);
  493. if (!ptr) {
  494. debug("SF: Failed to allocate memory\n");
  495. return NULL;
  496. }
  497. memset(ptr, '\0', size);
  498. flash = (struct spi_flash *)(ptr + offset);
  499. /* Set up some basic fields - caller will sort out sizes */
  500. flash->spi = spi;
  501. flash->name = name;
  502. flash->poll_cmd = CMD_READ_STATUS;
  503. flash->read = spi_flash_cmd_read_fast;
  504. flash->write = spi_flash_cmd_write_multi;
  505. flash->erase = spi_flash_cmd_erase;
  506. return flash;
  507. }
  508. void spi_flash_free(struct spi_flash *flash)
  509. {
  510. spi_free_slave(flash->spi);
  511. free(flash);
  512. }