flash.c 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324
  1. /*
  2. * Copyright (C) 2003 ETC s.r.o.
  3. *
  4. * This code was inspired by Marius Groeger and Kyle Harris code
  5. * available in other board ports for U-Boot
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. *
  25. * Written by Peter Figuli <peposh@etc.sk>, 2003.
  26. *
  27. */
  28. #include <common.h>
  29. #include "intel.h"
  30. /*
  31. * This code should handle CFI FLASH memory device. This code is very
  32. * minimalistic approach without many essential error handling code as well.
  33. * Because U-Boot actually is missing smart handling of FLASH device,
  34. * we just set flash_id to anything else to FLASH_UNKNOW, so common code
  35. * can call us without any restrictions.
  36. * TODO: Add CFI Query, to be able to determine FLASH device.
  37. * TODO: Add error handling code
  38. * NOTE: This code was tested with BUS_WIDTH 4 and ITERLEAVE 2 only, but
  39. * hopefully may work with other configurations.
  40. */
  41. #if ( WEP_FLASH_BUS_WIDTH == 1 )
  42. # define FLASH_BUS vu_char
  43. # define FLASH_BUS_RET u_char
  44. # if ( WEP_FLASH_INTERLEAVE == 1 )
  45. # define FLASH_CMD( x ) x
  46. # else
  47. # error "With 8bit bus only one chip is allowed"
  48. # endif
  49. #elif ( WEP_FLASH_BUS_WIDTH == 2 )
  50. # define FLASH_BUS vu_short
  51. # define FLASH_BUS_RET u_short
  52. # if ( WEP_FLASH_INTERLEAVE == 1 )
  53. # define FLASH_CMD( x ) x
  54. # elif ( WEP_FLASH_INTERLEAVE == 2 )
  55. # define FLASH_CMD( x ) (( x << 8 )| x )
  56. # else
  57. # error "With 16bit bus only 1 or 2 chip(s) are allowed"
  58. # endif
  59. #elif ( WEP_FLASH_BUS_WIDTH == 4 )
  60. # define FLASH_BUS vu_long
  61. # define FLASH_BUS_RET u_long
  62. # if ( WEP_FLASH_INTERLEAVE == 1 )
  63. # define FLASH_CMD( x ) x
  64. # elif ( WEP_FLASH_INTERLEAVE == 2 )
  65. # define FLASH_CMD( x ) (( x << 16 )| x )
  66. # elif ( WEP_FLASH_INTERLEAVE == 4 )
  67. # define FLASH_CMD( x ) (( x << 24 )|( x << 16 ) ( x << 8 )| x )
  68. # else
  69. # error "With 32bit bus only 1,2 or 4 chip(s) are allowed"
  70. # endif
  71. #else
  72. # error "Flash bus width might be 1,2,4 for 8,16,32 bit configuration"
  73. #endif
  74. flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
  75. static FLASH_BUS_RET flash_status_reg (void)
  76. {
  77. FLASH_BUS *addr = (FLASH_BUS *) 0;
  78. *addr = FLASH_CMD (CFI_INTEL_CMD_READ_STATUS_REGISTER);
  79. return *addr;
  80. }
  81. static int flash_ready (ulong timeout)
  82. {
  83. int ok = 1;
  84. reset_timer_masked ();
  85. while ((flash_status_reg () & FLASH_CMD (CFI_INTEL_SR_READY)) !=
  86. FLASH_CMD (CFI_INTEL_SR_READY)) {
  87. if (get_timer_masked () > timeout && timeout != 0) {
  88. ok = 0;
  89. break;
  90. }
  91. }
  92. return ok;
  93. }
  94. #if ( CFG_MAX_FLASH_BANKS != 1 )
  95. # error "WEP platform has only one flash bank!"
  96. #endif
  97. ulong flash_init (void)
  98. {
  99. int i;
  100. FLASH_BUS address = WEP_FLASH_BASE;
  101. flash_info[0].size = WEP_FLASH_BANK_SIZE;
  102. flash_info[0].sector_count = CFG_MAX_FLASH_SECT;
  103. flash_info[0].flash_id = INTEL_MANUFACT;
  104. memset (flash_info[0].protect, 0, CFG_MAX_FLASH_SECT);
  105. for (i = 0; i < CFG_MAX_FLASH_SECT; i++) {
  106. flash_info[0].start[i] = address;
  107. #ifdef WEP_FLASH_UNLOCK
  108. /* Some devices are hw locked after start. */
  109. *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_LOCK_SETUP);
  110. *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_UNLOCK_BLOCK);
  111. flash_ready (0);
  112. *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
  113. #endif
  114. address += WEP_FLASH_SECT_SIZE;
  115. }
  116. flash_protect (FLAG_PROTECT_SET,
  117. CFG_FLASH_BASE,
  118. CFG_FLASH_BASE + monitor_flash_len - 1,
  119. &flash_info[0]);
  120. flash_protect (FLAG_PROTECT_SET,
  121. CFG_ENV_ADDR,
  122. CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
  123. return WEP_FLASH_BANK_SIZE;
  124. }
  125. void flash_print_info (flash_info_t * info)
  126. {
  127. int i;
  128. printf (" Intel vendor\n");
  129. printf (" Size: %ld MB in %d Sectors\n",
  130. info->size >> 20, info->sector_count);
  131. printf (" Sector Start Addresses:");
  132. for (i = 0; i < info->sector_count; i++) {
  133. if (!(i % 5)) {
  134. printf ("\n");
  135. }
  136. printf (" %08lX%s", info->start[i],
  137. info->protect[i] ? " (RO)" : " ");
  138. }
  139. printf ("\n");
  140. }
  141. int flash_erase (flash_info_t * info, int s_first, int s_last)
  142. {
  143. int flag, non_protected = 0, sector;
  144. int rc = ERR_OK;
  145. FLASH_BUS *address;
  146. for (sector = s_first; sector <= s_last; sector++) {
  147. if (!info->protect[sector]) {
  148. non_protected++;
  149. }
  150. }
  151. if (!non_protected) {
  152. return ERR_PROTECTED;
  153. }
  154. /*
  155. * Disable interrupts which might cause a timeout
  156. * here. Remember that our exception vectors are
  157. * at address 0 in the flash, and we don't want a
  158. * (ticker) exception to happen while the flash
  159. * chip is in programming mode.
  160. */
  161. flag = disable_interrupts ();
  162. /* Start erase on unprotected sectors */
  163. for (sector = s_first; sector <= s_last && !ctrlc (); sector++) {
  164. if (info->protect[sector]) {
  165. printf ("Protected sector %2d skipping...\n", sector);
  166. continue;
  167. } else {
  168. printf ("Erasing sector %2d ... ", sector);
  169. }
  170. address = (FLASH_BUS *) (info->start[sector]);
  171. *address = FLASH_CMD (CFI_INTEL_CMD_BLOCK_ERASE);
  172. *address = FLASH_CMD (CFI_INTEL_CMD_CONFIRM);
  173. if (flash_ready (CFG_FLASH_ERASE_TOUT)) {
  174. *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
  175. printf ("ok.\n");
  176. } else {
  177. *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
  178. rc = ERR_TIMOUT;
  179. printf ("timeout! Aborting...\n");
  180. break;
  181. }
  182. *address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
  183. }
  184. if (ctrlc ())
  185. printf ("User Interrupt!\n");
  186. /* allow flash to settle - wait 10 ms */
  187. udelay_masked (10000);
  188. if (flag) {
  189. enable_interrupts ();
  190. }
  191. return rc;
  192. }
  193. static int write_data (flash_info_t * info, ulong dest, FLASH_BUS data)
  194. {
  195. FLASH_BUS *address = (FLASH_BUS *) dest;
  196. int rc = ERR_OK;
  197. int flag;
  198. /* Check if Flash is (sufficiently) erased */
  199. if ((*address & data) != data) {
  200. return ERR_NOT_ERASED;
  201. }
  202. /*
  203. * Disable interrupts which might cause a timeout
  204. * here. Remember that our exception vectors are
  205. * at address 0 in the flash, and we don't want a
  206. * (ticker) exception to happen while the flash
  207. * chip is in programming mode.
  208. */
  209. flag = disable_interrupts ();
  210. *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
  211. *address = FLASH_CMD (CFI_INTEL_CMD_PROGRAM1);
  212. *address = data;
  213. if (!flash_ready (CFG_FLASH_WRITE_TOUT)) {
  214. *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
  215. rc = ERR_TIMOUT;
  216. printf ("timeout! Aborting...\n");
  217. }
  218. *address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
  219. if (flag) {
  220. enable_interrupts ();
  221. }
  222. return rc;
  223. }
  224. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  225. {
  226. ulong read_addr, write_addr;
  227. FLASH_BUS data;
  228. int i, result = ERR_OK;
  229. read_addr = addr & ~(sizeof (FLASH_BUS) - 1);
  230. write_addr = read_addr;
  231. if (read_addr != addr) {
  232. data = 0;
  233. for (i = 0; i < sizeof (FLASH_BUS); i++) {
  234. if (read_addr < addr || cnt == 0) {
  235. data |= *((uchar *) read_addr) << i * 8;
  236. } else {
  237. data |= (*src++) << i * 8;
  238. cnt--;
  239. }
  240. read_addr++;
  241. }
  242. if ((result = write_data (info, write_addr, data)) != ERR_OK) {
  243. return result;
  244. }
  245. write_addr += sizeof (FLASH_BUS);
  246. }
  247. for (; cnt >= sizeof (FLASH_BUS); cnt -= sizeof (FLASH_BUS)) {
  248. if ((result = write_data (info, write_addr,
  249. *((FLASH_BUS *) src))) != ERR_OK) {
  250. return result;
  251. }
  252. write_addr += sizeof (FLASH_BUS);
  253. src += sizeof (FLASH_BUS);
  254. }
  255. if (cnt > 0) {
  256. read_addr = write_addr;
  257. data = 0;
  258. for (i = 0; i < sizeof (FLASH_BUS); i++) {
  259. if (cnt > 0) {
  260. data |= (*src++) << i * 8;
  261. cnt--;
  262. } else {
  263. data |= *((uchar *) read_addr) << i * 8;
  264. }
  265. read_addr++;
  266. }
  267. if ((result = write_data (info, write_addr, data)) != 0) {
  268. return result;
  269. }
  270. }
  271. return ERR_OK;
  272. }