pb1x00.c 3.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121
  1. /*
  2. * (C) Copyright 2003
  3. * Thomas.Lange@corelatus.se
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <command.h>
  25. #include <asm/au1x00.h>
  26. #include <asm/mipsregs.h>
  27. #include <asm/io.h>
  28. long int initdram(int board_type)
  29. {
  30. /* Sdram is setup by assembler code */
  31. /* If memory could be changed, we should return the true value here */
  32. return 64*1024*1024;
  33. }
  34. #define BCSR_PCMCIA_PC0DRVEN 0x0010
  35. #define BCSR_PCMCIA_PC0RST 0x0080
  36. /* In cpu/mips/cpu.c */
  37. void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
  38. int checkboard (void)
  39. {
  40. #if defined(CONFIG_IDE_PCMCIA) && 0
  41. u16 status;
  42. #endif
  43. /* volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10); */
  44. volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
  45. u32 proc_id;
  46. *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
  47. proc_id = read_32bit_cp0_register(CP0_PRID);
  48. switch (proc_id >> 24) {
  49. case 0:
  50. puts ("Board: Pb1000\n");
  51. printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n",
  52. (proc_id >> 8) & 0xFF, proc_id & 0xFF);
  53. break;
  54. case 1:
  55. puts ("Board: Pb1500\n");
  56. printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n",
  57. (proc_id >> 8) & 0xFF, proc_id & 0xFF);
  58. break;
  59. case 2:
  60. puts ("Board: Pb1100\n");
  61. printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n",
  62. (proc_id >> 8) & 0xFF, proc_id & 0xFF);
  63. break;
  64. default:
  65. printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
  66. }
  67. set_io_port_base(0);
  68. #if defined(CONFIG_IDE_PCMCIA) && 0
  69. /* Enable 3.3 V on slot 0 ( VCC )
  70. No 5V */
  71. status = 4;
  72. *pcmcia_bcsr = status;
  73. status |= BCSR_PCMCIA_PC0DRVEN;
  74. *pcmcia_bcsr = status;
  75. au_sync();
  76. udelay(300*1000);
  77. status |= BCSR_PCMCIA_PC0RST;
  78. *pcmcia_bcsr = status;
  79. au_sync();
  80. udelay(100*1000);
  81. /* PCMCIA is on a 36 bit physical address.
  82. We need to map it into a 32 bit addresses */
  83. #if 0
  84. /* We dont need theese unless we run whole pcmcia package */
  85. write_one_tlb(20, /* index */
  86. 0x01ffe000, /* Pagemask, 16 MB pages */
  87. CFG_PCMCIA_IO_BASE, /* Hi */
  88. 0x3C000017, /* Lo0 */
  89. 0x3C200017); /* Lo1 */
  90. write_one_tlb(21, /* index */
  91. 0x01ffe000, /* Pagemask, 16 MB pages */
  92. CFG_PCMCIA_ATTR_BASE, /* Hi */
  93. 0x3D000017, /* Lo0 */
  94. 0x3D200017); /* Lo1 */
  95. #endif /* 0 */
  96. write_one_tlb(22, /* index */
  97. 0x01ffe000, /* Pagemask, 16 MB pages */
  98. CFG_PCMCIA_MEM_ADDR, /* Hi */
  99. 0x3E000017, /* Lo0 */
  100. 0x3E200017); /* Lo1 */
  101. #endif /* CONFIG_IDE_PCMCIA */
  102. return 0;
  103. }