spi_flash.c 18 KB

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  1. /*
  2. * SPI flash driver
  3. *
  4. * Enter bugs at http://blackfin.uclinux.org/
  5. *
  6. * Copyright (c) 2005-2008 Analog Devices Inc.
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. /* Configuration options:
  11. * CONFIG_SPI_BAUD - value to load into SPI_BAUD (divisor of SCLK to get SPI CLK)
  12. * CONFIG_SPI_FLASH_SLOW_READ - force usage of the slower read
  13. * WARNING: make sure your SCLK + SPI_BAUD is slow enough
  14. */
  15. #include <common.h>
  16. #include <malloc.h>
  17. #include <asm/io.h>
  18. #include <asm/mach-common/bits/spi.h>
  19. /* Forcibly phase out these */
  20. #ifdef CONFIG_SPI_FLASH_NUM_SECTORS
  21. # error do not set CONFIG_SPI_FLASH_NUM_SECTORS
  22. #endif
  23. #ifdef CONFIG_SPI_FLASH_SECTOR_SIZE
  24. # error do not set CONFIG_SPI_FLASH_SECTOR_SIZE
  25. #endif
  26. #if defined(CONFIG_SPI)
  27. struct flash_info {
  28. char *name;
  29. uint16_t id;
  30. unsigned sector_size;
  31. unsigned num_sectors;
  32. };
  33. /* SPI Speeds: 50 MHz / 33 MHz */
  34. static struct flash_info flash_spansion_serial_flash[] = {
  35. { "S25FL016", 0x0215, 64 * 1024, 32 },
  36. { "S25FL032", 0x0216, 64 * 1024, 64 },
  37. { "S25FL064", 0x0217, 64 * 1024, 128 },
  38. { "S25FL0128", 0x0218, 256 * 1024, 64 },
  39. { NULL, 0, 0, 0 }
  40. };
  41. /* SPI Speeds: 50 MHz / 20 MHz */
  42. static struct flash_info flash_st_serial_flash[] = {
  43. { "m25p05", 0x2010, 32 * 1024, 2 },
  44. { "m25p10", 0x2011, 32 * 1024, 4 },
  45. { "m25p20", 0x2012, 64 * 1024, 4 },
  46. { "m25p40", 0x2013, 64 * 1024, 8 },
  47. { "m25p16", 0x2015, 64 * 1024, 32 },
  48. { "m25p32", 0x2016, 64 * 1024, 64 },
  49. { "m25p64", 0x2017, 64 * 1024, 128 },
  50. { "m25p128", 0x2018, 256 * 1024, 64 },
  51. { NULL, 0, 0, 0 }
  52. };
  53. /* SPI Speeds: 66 MHz / 33 MHz */
  54. static struct flash_info flash_atmel_dataflash[] = {
  55. { "AT45DB011x", 0x0c, 264, 512 },
  56. { "AT45DB021x", 0x14, 264, 1025 },
  57. { "AT45DB041x", 0x1c, 264, 2048 },
  58. { "AT45DB081x", 0x24, 264, 4096 },
  59. { "AT45DB161x", 0x2c, 528, 4096 },
  60. { "AT45DB321x", 0x34, 528, 8192 },
  61. { "AT45DB642x", 0x3c, 1056, 8192 },
  62. { NULL, 0, 0, 0 }
  63. };
  64. /* SPI Speed: 50 MHz / 25 MHz or 40 MHz / 20 MHz */
  65. static struct flash_info flash_winbond_serial_flash[] = {
  66. { "W25X10", 0x3011, 16 * 256, 32 },
  67. { "W25X20", 0x3012, 16 * 256, 64 },
  68. { "W25X40", 0x3013, 16 * 256, 128 },
  69. { "W25X80", 0x3014, 16 * 256, 256 },
  70. { "W25P80", 0x2014, 256 * 256, 16 },
  71. { "W25P16", 0x2015, 256 * 256, 32 },
  72. { NULL, 0, 0, 0 }
  73. };
  74. struct flash_ops {
  75. uint8_t read, write, erase, status;
  76. };
  77. #ifdef CONFIG_SPI_FLASH_SLOW_READ
  78. # define OP_READ 0x03
  79. #else
  80. # define OP_READ 0x0B
  81. #endif
  82. static struct flash_ops flash_st_ops = {
  83. .read = OP_READ,
  84. .write = 0x02,
  85. .erase = 0xD8,
  86. .status = 0x05,
  87. };
  88. static struct flash_ops flash_atmel_ops = {
  89. .read = OP_READ,
  90. .write = 0x82,
  91. .erase = 0x81,
  92. .status = 0xD7,
  93. };
  94. static struct flash_ops flash_winbond_ops = {
  95. .read = OP_READ,
  96. .write = 0x02,
  97. .erase = 0x20,
  98. .status = 0x05,
  99. };
  100. struct manufacturer_info {
  101. const char *name;
  102. uint8_t id;
  103. struct flash_info *flashes;
  104. struct flash_ops *ops;
  105. };
  106. static struct {
  107. struct manufacturer_info *manufacturer;
  108. struct flash_info *flash;
  109. struct flash_ops *ops;
  110. uint8_t manufacturer_id, device_id1, device_id2;
  111. unsigned int write_length;
  112. unsigned long sector_size, num_sectors;
  113. } flash;
  114. enum {
  115. JED_MANU_SPANSION = 0x01,
  116. JED_MANU_ST = 0x20,
  117. JED_MANU_ATMEL = 0x1F,
  118. JED_MANU_WINBOND = 0xEF,
  119. };
  120. static struct manufacturer_info flash_manufacturers[] = {
  121. {
  122. .name = "Spansion",
  123. .id = JED_MANU_SPANSION,
  124. .flashes = flash_spansion_serial_flash,
  125. .ops = &flash_st_ops,
  126. },
  127. {
  128. .name = "ST",
  129. .id = JED_MANU_ST,
  130. .flashes = flash_st_serial_flash,
  131. .ops = &flash_st_ops,
  132. },
  133. {
  134. .name = "Atmel",
  135. .id = JED_MANU_ATMEL,
  136. .flashes = flash_atmel_dataflash,
  137. .ops = &flash_atmel_ops,
  138. },
  139. {
  140. .name = "Winbond",
  141. .id = JED_MANU_WINBOND,
  142. .flashes = flash_winbond_serial_flash,
  143. .ops = &flash_winbond_ops,
  144. },
  145. };
  146. #define TIMEOUT 5000 /* timeout of 5 seconds */
  147. /* If part has multiple SPI flashes, assume SPI0 as that is
  148. * the one we can boot off of ...
  149. */
  150. #ifndef pSPI_CTL
  151. # define pSPI_CTL pSPI0_CTL
  152. # define pSPI_BAUD pSPI0_BAUD
  153. # define pSPI_FLG pSPI0_FLG
  154. # define pSPI_RDBR pSPI0_RDBR
  155. # define pSPI_STAT pSPI0_STAT
  156. # define pSPI_TDBR pSPI0_TDBR
  157. #endif
  158. /* Default to the SPI SSEL that we boot off of:
  159. * BF54x, BF537, (everything new?): SSEL1
  160. * BF51x, BF533, BF561: SSEL2
  161. */
  162. #ifndef CONFIG_SPI_FLASH_SSEL
  163. # define CONFIG_SPI_FLASH_SSEL BFIN_BOOT_SPI_SSEL
  164. #endif
  165. #define SSEL_MASK (1 << CONFIG_SPI_FLASH_SSEL)
  166. static void SPI_INIT(void)
  167. {
  168. /* [#3541] This delay appears to be necessary, but not sure
  169. * exactly why as the history behind it is non-existant.
  170. */
  171. udelay(CONFIG_CCLK_HZ / 25000000);
  172. /* enable SPI pins: SSEL, MOSI, MISO, SCK */
  173. #ifdef __ADSPBF54x__
  174. *pPORTE_FER |= (PE0 | PE1 | PE2 | PE4);
  175. #elif defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__)
  176. *pPORTF_FER |= (PF10 | PF11 | PF12 | PF13);
  177. #elif defined(__ADSPBF52x__)
  178. bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_0_MASK) | PORT_x_MUX_0_FUNC_3);
  179. bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG1 | PG2 | PG3 | PG4);
  180. #elif defined(__ADSPBF51x__)
  181. bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_1);
  182. bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG12 | PG13 | PG14 | PG15);
  183. #endif
  184. /* initate communication upon write of TDBR */
  185. *pSPI_CTL = (SPE|MSTR|CPHA|CPOL|0x01);
  186. *pSPI_BAUD = CONFIG_SPI_BAUD;
  187. }
  188. static void SPI_DEINIT(void)
  189. {
  190. /* put SPI settings back to reset state */
  191. *pSPI_CTL = 0x0400;
  192. *pSPI_BAUD = 0;
  193. SSYNC();
  194. }
  195. static void SPI_ON(void)
  196. {
  197. /* toggle SSEL to reset the device so it'll take a new command */
  198. *pSPI_FLG = 0xFF00 | SSEL_MASK;
  199. SSYNC();
  200. *pSPI_FLG = ((0xFF & ~SSEL_MASK) << 8) | SSEL_MASK;
  201. SSYNC();
  202. }
  203. static void SPI_OFF(void)
  204. {
  205. /* put SPI settings back to reset state */
  206. *pSPI_FLG = 0xFF00;
  207. SSYNC();
  208. }
  209. static uint8_t spi_write_read_byte(uint8_t transmit)
  210. {
  211. *pSPI_TDBR = transmit;
  212. SSYNC();
  213. while ((*pSPI_STAT & TXS))
  214. if (ctrlc())
  215. break;
  216. while (!(*pSPI_STAT & SPIF))
  217. if (ctrlc())
  218. break;
  219. while (!(*pSPI_STAT & RXS))
  220. if (ctrlc())
  221. break;
  222. /* Read dummy to empty the receive register */
  223. return *pSPI_RDBR;
  224. }
  225. static uint8_t read_status_register(void)
  226. {
  227. uint8_t status_register;
  228. /* send instruction to read status register */
  229. SPI_ON();
  230. spi_write_read_byte(flash.ops->status);
  231. /* send dummy to receive the status register */
  232. status_register = spi_write_read_byte(0);
  233. SPI_OFF();
  234. return status_register;
  235. }
  236. static int wait_for_ready_status(void)
  237. {
  238. ulong start = get_timer(0);
  239. while (get_timer(0) - start < TIMEOUT) {
  240. switch (flash.manufacturer_id) {
  241. case JED_MANU_SPANSION:
  242. case JED_MANU_ST:
  243. case JED_MANU_WINBOND:
  244. if (!(read_status_register() & 0x01))
  245. return 0;
  246. break;
  247. case JED_MANU_ATMEL:
  248. if (read_status_register() & 0x80)
  249. return 0;
  250. break;
  251. }
  252. if (ctrlc()) {
  253. puts("\nAbort\n");
  254. return -1;
  255. }
  256. }
  257. puts("Timeout\n");
  258. return -1;
  259. }
  260. /* Request and read the manufacturer and device id of parts which
  261. * are compatible with the JEDEC standard (JEP106) and use that to
  262. * setup other operating conditions.
  263. */
  264. static int spi_detect_part(void)
  265. {
  266. uint16_t dev_id;
  267. size_t i;
  268. static char called_init;
  269. if (called_init)
  270. return 0;
  271. SPI_ON();
  272. /* Send the request for the part identification */
  273. spi_write_read_byte(0x9F);
  274. /* Now read in the manufacturer id bytes */
  275. do {
  276. flash.manufacturer_id = spi_write_read_byte(0);
  277. if (flash.manufacturer_id == 0x7F)
  278. puts("Warning: unhandled manufacturer continuation byte!\n");
  279. } while (flash.manufacturer_id == 0x7F);
  280. /* Now read in the first device id byte */
  281. flash.device_id1 = spi_write_read_byte(0);
  282. /* Now read in the second device id byte */
  283. flash.device_id2 = spi_write_read_byte(0);
  284. SPI_OFF();
  285. dev_id = (flash.device_id1 << 8) | flash.device_id2;
  286. for (i = 0; i < ARRAY_SIZE(flash_manufacturers); ++i) {
  287. if (flash.manufacturer_id == flash_manufacturers[i].id)
  288. break;
  289. }
  290. if (i == ARRAY_SIZE(flash_manufacturers))
  291. goto unknown;
  292. flash.manufacturer = &flash_manufacturers[i];
  293. flash.ops = flash_manufacturers[i].ops;
  294. switch (flash.manufacturer_id) {
  295. case JED_MANU_SPANSION:
  296. case JED_MANU_ST:
  297. case JED_MANU_WINBOND:
  298. for (i = 0; flash.manufacturer->flashes[i].name; ++i) {
  299. if (dev_id == flash.manufacturer->flashes[i].id)
  300. break;
  301. }
  302. if (!flash.manufacturer->flashes[i].name)
  303. goto unknown;
  304. flash.flash = &flash.manufacturer->flashes[i];
  305. flash.sector_size = flash.flash->sector_size;
  306. flash.num_sectors = flash.flash->num_sectors;
  307. flash.write_length = 256;
  308. break;
  309. case JED_MANU_ATMEL: {
  310. uint8_t status = read_status_register();
  311. for (i = 0; flash.manufacturer->flashes[i].name; ++i) {
  312. if ((status & 0x3c) == flash.manufacturer->flashes[i].id)
  313. break;
  314. }
  315. if (!flash.manufacturer->flashes[i].name)
  316. goto unknown;
  317. flash.flash = &flash.manufacturer->flashes[i];
  318. flash.sector_size = flash.flash->sector_size;
  319. flash.num_sectors = flash.flash->num_sectors;
  320. /* see if flash is in "power of 2" mode */
  321. if (status & 0x1)
  322. flash.sector_size &= ~(1 << (ffs(flash.sector_size) - 1));
  323. flash.write_length = flash.sector_size;
  324. break;
  325. }
  326. }
  327. called_init = 1;
  328. return 0;
  329. unknown:
  330. printf("Unknown SPI device: 0x%02X 0x%02X 0x%02X\n",
  331. flash.manufacturer_id, flash.device_id1, flash.device_id2);
  332. return 1;
  333. }
  334. /*
  335. * Function: spi_init_f
  336. * Description: Init SPI-Controller (ROM part)
  337. * return: ---
  338. */
  339. void spi_init_f(void)
  340. {
  341. }
  342. /*
  343. * Function: spi_init_r
  344. * Description: Init SPI-Controller (RAM part) -
  345. * The malloc engine is ready and we can move our buffers to
  346. * normal RAM
  347. * return: ---
  348. */
  349. void spi_init_r(void)
  350. {
  351. #if defined(CONFIG_POST) && (CONFIG_POST & CONFIG_SYS_POST_SPI)
  352. /* Our testing strategy here is pretty basic:
  353. * - fill src memory with an 8-bit pattern
  354. * - write the src memory to the SPI flash
  355. * - read the SPI flash into the dst memory
  356. * - compare src and dst memory regions
  357. * - repeat a few times
  358. * The variations we test for:
  359. * - change the 8-bit pattern a bit
  360. * - change the read/write block size so we know:
  361. * - writes smaller/equal/larger than the buffer work
  362. * - writes smaller/equal/larger than the sector work
  363. * - change the SPI offsets so we know:
  364. * - writing partial sectors works
  365. */
  366. uint8_t *mem_src, *mem_dst;
  367. size_t i, c, l, o;
  368. size_t test_count, errors;
  369. uint8_t pattern;
  370. SPI_INIT();
  371. if (spi_detect_part())
  372. goto out;
  373. eeprom_info();
  374. ulong lengths[] = {
  375. flash.write_length,
  376. flash.write_length * 2,
  377. flash.write_length / 2,
  378. flash.sector_size,
  379. flash.sector_size * 2,
  380. flash.sector_size / 2
  381. };
  382. ulong offsets[] = {
  383. 0,
  384. flash.write_length,
  385. flash.write_length * 2,
  386. flash.write_length / 2,
  387. flash.write_length / 4,
  388. flash.sector_size,
  389. flash.sector_size * 2,
  390. flash.sector_size / 2,
  391. flash.sector_size / 4,
  392. };
  393. /* the exact addresses are arbitrary ... they just need to not overlap */
  394. mem_src = (void *)(0);
  395. mem_dst = (void *)(max(flash.write_length, flash.sector_size) * 2);
  396. test_count = 0;
  397. errors = 0;
  398. pattern = 0x00;
  399. for (i = 0; i < 16; ++i) { /* 16 = 8 bits * 2 iterations */
  400. for (l = 0; l < ARRAY_SIZE(lengths); ++l) {
  401. for (o = 0; o < ARRAY_SIZE(offsets); ++o) {
  402. ulong len = lengths[l];
  403. ulong off = offsets[o];
  404. printf("Testing pattern 0x%02X of length %5lu and offset %5lu: ", pattern, len, off);
  405. /* setup the source memory region */
  406. memset(mem_src, pattern, len);
  407. test_count += 4;
  408. for (c = 0; c < 4; ++c) { /* 4 is just a random repeat count */
  409. if (ctrlc()) {
  410. puts("\nAbort\n");
  411. goto out;
  412. }
  413. /* make sure background fill pattern != pattern */
  414. memset(mem_dst, pattern ^ 0xFF, len);
  415. /* write out the source memory and then read it back and compare */
  416. eeprom_write(0, off, mem_src, len);
  417. eeprom_read(0, off, mem_dst, len);
  418. if (memcmp(mem_src, mem_dst, len)) {
  419. for (c = 0; c < len; ++c)
  420. if (mem_src[c] != mem_dst[c])
  421. break;
  422. printf(" FAIL @ offset %u, skipping repeats ", c);
  423. ++errors;
  424. break;
  425. }
  426. /* XXX: should shrink write region here to test with
  427. * leading/trailing canaries so we know surrounding
  428. * bytes don't get screwed.
  429. */
  430. }
  431. puts("\n");
  432. }
  433. }
  434. /* invert the pattern every other run and shift out bits slowly */
  435. pattern ^= 0xFF;
  436. if (i % 2)
  437. pattern = (pattern | 0x01) << 1;
  438. }
  439. if (errors)
  440. printf("SPI FAIL: Out of %i tests, there were %i errors ;(\n", test_count, errors);
  441. else
  442. printf("SPI PASS: %i tests worked!\n", test_count);
  443. out:
  444. SPI_DEINIT();
  445. #endif
  446. }
  447. static void transmit_address(uint32_t addr)
  448. {
  449. /* Send the highest byte of the 24 bit address at first */
  450. spi_write_read_byte(addr >> 16);
  451. /* Send the middle byte of the 24 bit address at second */
  452. spi_write_read_byte(addr >> 8);
  453. /* Send the lowest byte of the 24 bit address finally */
  454. spi_write_read_byte(addr);
  455. }
  456. /*
  457. * Read a value from flash for verify purpose
  458. * Inputs: unsigned long ulStart - holds the SPI start address
  459. * int pnData - pointer to store value read from flash
  460. * long lCount - number of elements to read
  461. */
  462. static int read_flash(unsigned long address, long count, uchar *buffer)
  463. {
  464. size_t i;
  465. /* Send the read command to SPI device */
  466. SPI_ON();
  467. spi_write_read_byte(flash.ops->read);
  468. transmit_address(address);
  469. #ifndef CONFIG_SPI_FLASH_SLOW_READ
  470. /* Send dummy byte when doing SPI fast reads */
  471. spi_write_read_byte(0);
  472. #endif
  473. /* After the SPI device address has been placed on the MOSI pin the data can be */
  474. /* received on the MISO pin. */
  475. for (i = 1; i <= count; ++i) {
  476. *buffer++ = spi_write_read_byte(0);
  477. if (i % flash.sector_size == 0)
  478. puts(".");
  479. }
  480. SPI_OFF();
  481. return 0;
  482. }
  483. static int enable_writing(void)
  484. {
  485. ulong start;
  486. if (flash.manufacturer_id == JED_MANU_ATMEL)
  487. return 0;
  488. /* A write enable instruction must previously have been executed */
  489. SPI_ON();
  490. spi_write_read_byte(0x06);
  491. SPI_OFF();
  492. /* The status register will be polled to check the write enable latch "WREN" */
  493. start = get_timer(0);
  494. while (get_timer(0) - start < TIMEOUT) {
  495. if (read_status_register() & 0x02)
  496. return 0;
  497. if (ctrlc()) {
  498. puts("\nAbort\n");
  499. return -1;
  500. }
  501. }
  502. puts("Timeout\n");
  503. return -1;
  504. }
  505. static long address_to_sector(unsigned long address)
  506. {
  507. if (address > (flash.num_sectors * flash.sector_size) - 1)
  508. return -1;
  509. return address / flash.sector_size;
  510. }
  511. static int erase_sector(int address)
  512. {
  513. /* sector gets checked in higher function, so assume it's valid
  514. * here and figure out the offset of the sector in flash
  515. */
  516. if (enable_writing())
  517. return -1;
  518. /*
  519. * Send the erase block command to the flash followed by the 24 address
  520. * to point to the start of a sector
  521. */
  522. SPI_ON();
  523. spi_write_read_byte(flash.ops->erase);
  524. transmit_address(address);
  525. SPI_OFF();
  526. return wait_for_ready_status();
  527. }
  528. /* Write [count] bytes out of [buffer] into the given SPI [address] */
  529. static long write_flash(unsigned long address, long count, uchar *buffer)
  530. {
  531. long i, write_buffer_size;
  532. if (enable_writing())
  533. return -1;
  534. /* Send write command followed by the 24 bit address */
  535. SPI_ON();
  536. spi_write_read_byte(flash.ops->write);
  537. transmit_address(address);
  538. /* Shoot out a single write buffer */
  539. write_buffer_size = min(count, flash.write_length);
  540. for (i = 0; i < write_buffer_size; ++i)
  541. spi_write_read_byte(buffer[i]);
  542. SPI_OFF();
  543. /* Wait for the flash to do its thing */
  544. if (wait_for_ready_status()) {
  545. puts("SPI Program Time out! ");
  546. return -1;
  547. }
  548. return i;
  549. }
  550. /* Write [count] bytes out of [buffer] into the given SPI [address] */
  551. static int write_sector(unsigned long address, long count, uchar *buffer)
  552. {
  553. long write_cnt;
  554. while (count != 0) {
  555. write_cnt = write_flash(address, count, buffer);
  556. if (write_cnt == -1)
  557. return -1;
  558. /* Now that we've sent some bytes out to the flash, update
  559. * our counters a bit
  560. */
  561. count -= write_cnt;
  562. address += write_cnt;
  563. buffer += write_cnt;
  564. }
  565. /* return the appropriate error code */
  566. return 0;
  567. }
  568. /*
  569. * Function: spi_write
  570. */
  571. ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
  572. {
  573. unsigned long offset;
  574. int start_sector, end_sector;
  575. int start_byte, end_byte;
  576. uchar *temp = NULL;
  577. int num, ret = 0;
  578. SPI_INIT();
  579. if (spi_detect_part())
  580. goto out;
  581. offset = addr[0] << 16 | addr[1] << 8 | addr[2];
  582. /* Get the start block number */
  583. start_sector = address_to_sector(offset);
  584. if (start_sector == -1) {
  585. puts("Invalid sector! ");
  586. goto out;
  587. }
  588. end_sector = address_to_sector(offset + len - 1);
  589. if (end_sector == -1) {
  590. puts("Invalid sector! ");
  591. goto out;
  592. }
  593. /* Since flashes operate in sector units but the eeprom command
  594. * operates as a continuous stream of bytes, we need to emulate
  595. * the eeprom behavior. So here we read in the sector, overlay
  596. * any bytes we're actually modifying, erase the sector, and
  597. * then write back out the new sector.
  598. */
  599. temp = malloc(flash.sector_size);
  600. if (!temp) {
  601. puts("Malloc for sector failed! ");
  602. goto out;
  603. }
  604. for (num = start_sector; num <= end_sector; num++) {
  605. unsigned long address = num * flash.sector_size;
  606. /* XXX: should add an optimization when spanning sectors:
  607. * No point in reading in a sector if we're going to be
  608. * clobbering the whole thing. Need to also add a test
  609. * case to make sure the optimization is correct.
  610. */
  611. if (read_flash(address, flash.sector_size, temp)) {
  612. puts("Read sector failed! ");
  613. len = 0;
  614. break;
  615. }
  616. start_byte = max(address, offset);
  617. end_byte = address + flash.sector_size - 1;
  618. if (end_byte > (offset + len))
  619. end_byte = (offset + len - 1);
  620. memcpy(temp + start_byte - address,
  621. buffer + start_byte - offset,
  622. end_byte - start_byte + 1);
  623. if (erase_sector(address)) {
  624. puts("Erase sector failed! ");
  625. goto out;
  626. }
  627. if (write_sector(address, flash.sector_size, temp)) {
  628. puts("Write sector failed! ");
  629. goto out;
  630. }
  631. puts(".");
  632. }
  633. ret = len;
  634. out:
  635. free(temp);
  636. SPI_DEINIT();
  637. return ret;
  638. }
  639. /*
  640. * Function: spi_read
  641. */
  642. ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
  643. {
  644. unsigned long offset;
  645. SPI_INIT();
  646. if (spi_detect_part())
  647. len = 0;
  648. else {
  649. offset = addr[0] << 16 | addr[1] << 8 | addr[2];
  650. read_flash(offset, len, buffer);
  651. }
  652. SPI_DEINIT();
  653. return len;
  654. }
  655. /*
  656. * Spit out some useful information about the SPI eeprom
  657. */
  658. int eeprom_info(void)
  659. {
  660. int ret = 0;
  661. SPI_INIT();
  662. if (spi_detect_part())
  663. ret = 1;
  664. else
  665. printf("SPI Device: %s 0x%02X (%s) 0x%02X 0x%02X\n"
  666. "Parameters: num sectors = %lu, sector size = %lu, write size = %i\n"
  667. "Flash Size: %lu mbit (%lu mbyte)\n"
  668. "Status: 0x%02X\n",
  669. flash.flash->name, flash.manufacturer_id, flash.manufacturer->name,
  670. flash.device_id1, flash.device_id2, flash.num_sectors,
  671. flash.sector_size, flash.write_length,
  672. (flash.num_sectors * flash.sector_size) >> 17,
  673. (flash.num_sectors * flash.sector_size) >> 20,
  674. read_status_register());
  675. SPI_DEINIT();
  676. return ret;
  677. }
  678. #endif