spi_flash.c 13 KB

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  1. /*
  2. * SPI flash interface
  3. *
  4. * Copyright (C) 2008 Atmel Corporation
  5. * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <common.h>
  10. #include <fdtdec.h>
  11. #include <malloc.h>
  12. #include <spi.h>
  13. #include <spi_flash.h>
  14. #include <watchdog.h>
  15. #include "spi_flash_internal.h"
  16. DECLARE_GLOBAL_DATA_PTR;
  17. static void spi_flash_addr(u32 addr, u8 *cmd)
  18. {
  19. /* cmd[0] is actual command */
  20. cmd[1] = addr >> 16;
  21. cmd[2] = addr >> 8;
  22. cmd[3] = addr >> 0;
  23. }
  24. static int spi_flash_read_write(struct spi_slave *spi,
  25. const u8 *cmd, size_t cmd_len,
  26. const u8 *data_out, u8 *data_in,
  27. size_t data_len)
  28. {
  29. unsigned long flags = SPI_XFER_BEGIN;
  30. int ret;
  31. if (data_len == 0)
  32. flags |= SPI_XFER_END;
  33. ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
  34. if (ret) {
  35. debug("SF: Failed to send command (%zu bytes): %d\n",
  36. cmd_len, ret);
  37. } else if (data_len != 0) {
  38. ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END);
  39. if (ret)
  40. debug("SF: Failed to transfer %zu bytes of data: %d\n",
  41. data_len, ret);
  42. }
  43. return ret;
  44. }
  45. int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
  46. {
  47. return spi_flash_cmd_read(spi, &cmd, 1, response, len);
  48. }
  49. int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
  50. size_t cmd_len, void *data, size_t data_len)
  51. {
  52. return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
  53. }
  54. int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
  55. const void *data, size_t data_len)
  56. {
  57. return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
  58. }
  59. int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
  60. size_t len, const void *buf)
  61. {
  62. unsigned long byte_addr, page_size;
  63. size_t chunk_len, actual;
  64. int ret;
  65. u8 cmd[4];
  66. page_size = flash->page_size;
  67. ret = spi_claim_bus(flash->spi);
  68. if (ret) {
  69. debug("SF: unable to claim SPI bus\n");
  70. return ret;
  71. }
  72. cmd[0] = CMD_PAGE_PROGRAM;
  73. for (actual = 0; actual < len; actual += chunk_len) {
  74. #ifdef CONFIG_SPI_FLASH_BAR
  75. u8 bank_sel;
  76. bank_sel = offset / SPI_FLASH_16MB_BOUN;
  77. ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
  78. if (ret) {
  79. debug("SF: fail to set bank%d\n", bank_sel);
  80. return ret;
  81. }
  82. #endif
  83. byte_addr = offset % page_size;
  84. chunk_len = min(len - actual, page_size - byte_addr);
  85. if (flash->spi->max_write_size)
  86. chunk_len = min(chunk_len, flash->spi->max_write_size);
  87. spi_flash_addr(offset, cmd);
  88. debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
  89. buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
  90. ret = spi_flash_cmd_write_enable(flash);
  91. if (ret < 0) {
  92. debug("SF: enabling write failed\n");
  93. break;
  94. }
  95. ret = spi_flash_cmd_write(flash->spi, cmd, 4,
  96. buf + actual, chunk_len);
  97. if (ret < 0) {
  98. debug("SF: write failed\n");
  99. break;
  100. }
  101. ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
  102. if (ret)
  103. break;
  104. offset += chunk_len;
  105. }
  106. spi_release_bus(flash->spi);
  107. return ret;
  108. }
  109. int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
  110. size_t cmd_len, void *data, size_t data_len)
  111. {
  112. struct spi_slave *spi = flash->spi;
  113. int ret;
  114. spi_claim_bus(spi);
  115. ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
  116. spi_release_bus(spi);
  117. return ret;
  118. }
  119. int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
  120. size_t len, void *data)
  121. {
  122. u8 cmd[5], bank_sel = 0;
  123. u32 remain_len, read_len;
  124. int ret = -1;
  125. /* Handle memory-mapped SPI */
  126. if (flash->memory_map) {
  127. memcpy(data, flash->memory_map + offset, len);
  128. return 0;
  129. }
  130. cmd[0] = CMD_READ_ARRAY_FAST;
  131. cmd[4] = 0x00;
  132. while (len) {
  133. #ifdef CONFIG_SPI_FLASH_BAR
  134. bank_sel = offset / SPI_FLASH_16MB_BOUN;
  135. ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
  136. if (ret) {
  137. debug("SF: fail to set bank%d\n", bank_sel);
  138. return ret;
  139. }
  140. #endif
  141. remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
  142. if (len < remain_len)
  143. read_len = len;
  144. else
  145. read_len = remain_len;
  146. spi_flash_addr(offset, cmd);
  147. ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
  148. data, read_len);
  149. if (ret < 0) {
  150. debug("SF: read failed\n");
  151. break;
  152. }
  153. offset += read_len;
  154. len -= read_len;
  155. data += read_len;
  156. }
  157. return ret;
  158. }
  159. int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
  160. u8 cmd, u8 poll_bit)
  161. {
  162. struct spi_slave *spi = flash->spi;
  163. unsigned long timebase;
  164. int ret;
  165. u8 status;
  166. ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
  167. if (ret) {
  168. debug("SF: Failed to send command %02x: %d\n", cmd, ret);
  169. return ret;
  170. }
  171. timebase = get_timer(0);
  172. do {
  173. WATCHDOG_RESET();
  174. ret = spi_xfer(spi, 8, NULL, &status, 0);
  175. if (ret)
  176. return -1;
  177. if ((status & poll_bit) == 0)
  178. break;
  179. } while (get_timer(timebase) < timeout);
  180. spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
  181. if ((status & poll_bit) == 0)
  182. return 0;
  183. /* Timed out */
  184. debug("SF: time out!\n");
  185. return -1;
  186. }
  187. int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
  188. {
  189. return spi_flash_cmd_poll_bit(flash, timeout,
  190. CMD_READ_STATUS, STATUS_WIP);
  191. }
  192. int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
  193. {
  194. u32 erase_size;
  195. int ret;
  196. u8 cmd[4];
  197. erase_size = flash->sector_size;
  198. if (offset % erase_size || len % erase_size) {
  199. debug("SF: Erase offset/length not multiple of erase size\n");
  200. return -1;
  201. }
  202. ret = spi_claim_bus(flash->spi);
  203. if (ret) {
  204. debug("SF: Unable to claim SPI bus\n");
  205. return ret;
  206. }
  207. if (erase_size == 4096)
  208. cmd[0] = CMD_ERASE_4K;
  209. else
  210. cmd[0] = CMD_ERASE_64K;
  211. while (len) {
  212. #ifdef CONFIG_SPI_FLASH_BAR
  213. u8 bank_sel;
  214. bank_sel = offset / SPI_FLASH_16MB_BOUN;
  215. ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
  216. if (ret) {
  217. debug("SF: fail to set bank%d\n", bank_sel);
  218. return ret;
  219. }
  220. #endif
  221. spi_flash_addr(offset, cmd);
  222. debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
  223. cmd[2], cmd[3], offset);
  224. ret = spi_flash_cmd_write_enable(flash);
  225. if (ret)
  226. goto out;
  227. ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0);
  228. if (ret)
  229. goto out;
  230. ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
  231. if (ret)
  232. goto out;
  233. offset += erase_size;
  234. len -= erase_size;
  235. }
  236. out:
  237. spi_release_bus(flash->spi);
  238. return ret;
  239. }
  240. int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
  241. {
  242. u8 cmd;
  243. int ret;
  244. ret = spi_flash_cmd_write_enable(flash);
  245. if (ret < 0) {
  246. debug("SF: enabling write failed\n");
  247. return ret;
  248. }
  249. cmd = CMD_WRITE_STATUS;
  250. ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1);
  251. if (ret) {
  252. debug("SF: fail to write status register\n");
  253. return ret;
  254. }
  255. ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
  256. if (ret < 0) {
  257. debug("SF: write status register timed out\n");
  258. return ret;
  259. }
  260. return 0;
  261. }
  262. #ifdef CONFIG_SPI_FLASH_BAR
  263. int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
  264. {
  265. u8 cmd;
  266. int ret;
  267. if (flash->bank_curr == bank_sel) {
  268. debug("SF: not require to enable bank%d\n", bank_sel);
  269. return 0;
  270. }
  271. cmd = flash->bank_write_cmd;
  272. ret = spi_flash_cmd_write_enable(flash);
  273. if (ret < 0) {
  274. debug("SF: enabling write failed\n");
  275. return ret;
  276. }
  277. ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1);
  278. if (ret) {
  279. debug("SF: fail to write bank addr register\n");
  280. return ret;
  281. }
  282. flash->bank_curr = bank_sel;
  283. ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
  284. if (ret < 0) {
  285. debug("SF: write bank addr register timed out\n");
  286. return ret;
  287. }
  288. return 0;
  289. }
  290. int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
  291. {
  292. u8 cmd;
  293. u8 curr_bank = 0;
  294. /* discover bank cmds */
  295. switch (idcode0) {
  296. case SPI_FLASH_SPANSION_IDCODE0:
  297. flash->bank_read_cmd = CMD_BANKADDR_BRRD;
  298. flash->bank_write_cmd = CMD_BANKADDR_BRWR;
  299. break;
  300. case SPI_FLASH_STMICRO_IDCODE0:
  301. case SPI_FLASH_WINBOND_IDCODE0:
  302. flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
  303. flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
  304. break;
  305. default:
  306. printf("SF: Unsupported bank commands %02x\n", idcode0);
  307. return -1;
  308. }
  309. /* read the bank reg - on which bank the flash is in currently */
  310. cmd = flash->bank_read_cmd;
  311. if (flash->size > SPI_FLASH_16MB_BOUN) {
  312. if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
  313. debug("SF: fail to read bank addr register\n");
  314. return -1;
  315. }
  316. flash->bank_curr = curr_bank;
  317. } else {
  318. flash->bank_curr = curr_bank;
  319. }
  320. return 0;
  321. }
  322. #endif
  323. #ifdef CONFIG_OF_CONTROL
  324. int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
  325. {
  326. fdt_addr_t addr;
  327. fdt_size_t size;
  328. int node;
  329. /* If there is no node, do nothing */
  330. node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
  331. if (node < 0)
  332. return 0;
  333. addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
  334. if (addr == FDT_ADDR_T_NONE) {
  335. debug("%s: Cannot decode address\n", __func__);
  336. return 0;
  337. }
  338. if (flash->size != size) {
  339. debug("%s: Memory map must cover entire device\n", __func__);
  340. return -1;
  341. }
  342. flash->memory_map = (void *)addr;
  343. return 0;
  344. }
  345. #endif /* CONFIG_OF_CONTROL */
  346. /*
  347. * The following table holds all device probe functions
  348. *
  349. * shift: number of continuation bytes before the ID
  350. * idcode: the expected IDCODE or 0xff for non JEDEC devices
  351. * probe: the function to call
  352. *
  353. * Non JEDEC devices should be ordered in the table such that
  354. * the probe functions with best detection algorithms come first.
  355. *
  356. * Several matching entries are permitted, they will be tried
  357. * in sequence until a probe function returns non NULL.
  358. *
  359. * IDCODE_CONT_LEN may be redefined if a device needs to declare a
  360. * larger "shift" value. IDCODE_PART_LEN generally shouldn't be
  361. * changed. This is the max number of bytes probe functions may
  362. * examine when looking up part-specific identification info.
  363. *
  364. * Probe functions will be given the idcode buffer starting at their
  365. * manu id byte (the "idcode" in the table below). In other words,
  366. * all of the continuation bytes will be skipped (the "shift" below).
  367. */
  368. #define IDCODE_CONT_LEN 0
  369. #define IDCODE_PART_LEN 5
  370. static const struct {
  371. const u8 shift;
  372. const u8 idcode;
  373. struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
  374. } flashes[] = {
  375. /* Keep it sorted by define name */
  376. #ifdef CONFIG_SPI_FLASH_ATMEL
  377. { 0, 0x1f, spi_flash_probe_atmel, },
  378. #endif
  379. #ifdef CONFIG_SPI_FLASH_EON
  380. { 0, 0x1c, spi_flash_probe_eon, },
  381. #endif
  382. #ifdef CONFIG_SPI_FLASH_MACRONIX
  383. { 0, 0xc2, spi_flash_probe_macronix, },
  384. #endif
  385. #ifdef CONFIG_SPI_FLASH_SPANSION
  386. { 0, 0x01, spi_flash_probe_spansion, },
  387. #endif
  388. #ifdef CONFIG_SPI_FLASH_SST
  389. { 0, 0xbf, spi_flash_probe_sst, },
  390. #endif
  391. #ifdef CONFIG_SPI_FLASH_STMICRO
  392. { 0, 0x20, spi_flash_probe_stmicro, },
  393. #endif
  394. #ifdef CONFIG_SPI_FLASH_WINBOND
  395. { 0, 0xef, spi_flash_probe_winbond, },
  396. #endif
  397. #ifdef CONFIG_SPI_FRAM_RAMTRON
  398. { 6, 0xc2, spi_fram_probe_ramtron, },
  399. # undef IDCODE_CONT_LEN
  400. # define IDCODE_CONT_LEN 6
  401. #endif
  402. /* Keep it sorted by best detection */
  403. #ifdef CONFIG_SPI_FLASH_STMICRO
  404. { 0, 0xff, spi_flash_probe_stmicro, },
  405. #endif
  406. #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
  407. { 0, 0xff, spi_fram_probe_ramtron, },
  408. #endif
  409. };
  410. #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
  411. struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
  412. unsigned int max_hz, unsigned int spi_mode)
  413. {
  414. struct spi_slave *spi;
  415. struct spi_flash *flash = NULL;
  416. int ret, i, shift;
  417. u8 idcode[IDCODE_LEN], *idp;
  418. spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
  419. if (!spi) {
  420. printf("SF: Failed to set up slave\n");
  421. return NULL;
  422. }
  423. ret = spi_claim_bus(spi);
  424. if (ret) {
  425. debug("SF: Failed to claim SPI bus: %d\n", ret);
  426. goto err_claim_bus;
  427. }
  428. /* Read the ID codes */
  429. ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
  430. if (ret)
  431. goto err_read_id;
  432. #ifdef DEBUG
  433. printf("SF: Got idcodes\n");
  434. print_buffer(0, idcode, 1, sizeof(idcode), 0);
  435. #endif
  436. /* count the number of continuation bytes */
  437. for (shift = 0, idp = idcode;
  438. shift < IDCODE_CONT_LEN && *idp == 0x7f;
  439. ++shift, ++idp)
  440. continue;
  441. /* search the table for matches in shift and id */
  442. for (i = 0; i < ARRAY_SIZE(flashes); ++i)
  443. if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
  444. /* we have a match, call probe */
  445. flash = flashes[i].probe(spi, idp);
  446. if (flash)
  447. break;
  448. }
  449. if (!flash) {
  450. printf("SF: Unsupported manufacturer %02x\n", *idp);
  451. goto err_manufacturer_probe;
  452. }
  453. #ifdef CONFIG_SPI_FLASH_BAR
  454. /* Configure the BAR - disover bank cmds and read current bank */
  455. ret = spi_flash_bank_config(flash, *idp);
  456. if (ret < 0)
  457. goto err_manufacturer_probe;
  458. #endif
  459. #ifdef CONFIG_OF_CONTROL
  460. if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
  461. debug("SF: FDT decode error\n");
  462. goto err_manufacturer_probe;
  463. }
  464. #endif
  465. printf("SF: Detected %s with page size ", flash->name);
  466. print_size(flash->sector_size, ", total ");
  467. print_size(flash->size, "");
  468. if (flash->memory_map)
  469. printf(", mapped at %p", flash->memory_map);
  470. puts("\n");
  471. spi_release_bus(spi);
  472. return flash;
  473. err_manufacturer_probe:
  474. err_read_id:
  475. spi_release_bus(spi);
  476. err_claim_bus:
  477. spi_free_slave(spi);
  478. return NULL;
  479. }
  480. void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
  481. const char *name)
  482. {
  483. struct spi_flash *flash;
  484. void *ptr;
  485. ptr = malloc(size);
  486. if (!ptr) {
  487. debug("SF: Failed to allocate memory\n");
  488. return NULL;
  489. }
  490. memset(ptr, '\0', size);
  491. flash = (struct spi_flash *)(ptr + offset);
  492. /* Set up some basic fields - caller will sort out sizes */
  493. flash->spi = spi;
  494. flash->name = name;
  495. flash->read = spi_flash_cmd_read_fast;
  496. flash->write = spi_flash_cmd_write_multi;
  497. flash->erase = spi_flash_cmd_erase;
  498. return flash;
  499. }
  500. void spi_flash_free(struct spi_flash *flash)
  501. {
  502. spi_free_slave(flash->spi);
  503. free(flash);
  504. }