4xx_i2c.h 4.0 KB

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  1. /*
  2. * (C) Copyright 2007
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef _4xx_i2c_h_
  24. #define _4xx_i2c_h_
  25. #define IIC_OK 0
  26. #define IIC_NOK 1
  27. #define IIC_NOK_LA 2 /* Lost arbitration */
  28. #define IIC_NOK_ICT 3 /* Incomplete transfer */
  29. #define IIC_NOK_XFRA 4 /* Transfer aborted */
  30. #define IIC_NOK_DATA 5 /* No data in buffer */
  31. #define IIC_NOK_TOUT 6 /* Transfer timeout */
  32. #define IIC_TIMEOUT 1 /* 1 second */
  33. #if defined(CONFIG_I2C_MULTI_BUS)
  34. #define I2C_BUS_OFFS (i2c_bus_num * 0x100)
  35. #else
  36. #define I2C_BUS_OFFS (0x000)
  37. #endif /* CONFIG_I2C_MULTI_BUS */
  38. #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
  39. defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
  40. #define I2C_BASE_ADDR (CFG_PERIPHERAL_BASE + 0x00000700 + I2C_BUS_OFFS)
  41. #elif defined(CONFIG_440)
  42. /* all remaining 440 variants */
  43. #define I2C_BASE_ADDR (CFG_PERIPHERAL_BASE + 0x00000400 + I2C_BUS_OFFS)
  44. #else
  45. /* all 405 variants */
  46. #define I2C_BASE_ADDR (0xEF600500 + I2C_BUS_OFFS)
  47. #endif
  48. #define I2C_REGISTERS_BASE_ADDRESS I2C_BASE_ADDR
  49. #define IIC_MDBUF (I2C_REGISTERS_BASE_ADDRESS+IICMDBUF)
  50. #define IIC_SDBUF (I2C_REGISTERS_BASE_ADDRESS+IICSDBUF)
  51. #define IIC_LMADR (I2C_REGISTERS_BASE_ADDRESS+IICLMADR)
  52. #define IIC_HMADR (I2C_REGISTERS_BASE_ADDRESS+IICHMADR)
  53. #define IIC_CNTL (I2C_REGISTERS_BASE_ADDRESS+IICCNTL)
  54. #define IIC_MDCNTL (I2C_REGISTERS_BASE_ADDRESS+IICMDCNTL)
  55. #define IIC_STS (I2C_REGISTERS_BASE_ADDRESS+IICSTS)
  56. #define IIC_EXTSTS (I2C_REGISTERS_BASE_ADDRESS+IICEXTSTS)
  57. #define IIC_LSADR (I2C_REGISTERS_BASE_ADDRESS+IICLSADR)
  58. #define IIC_HSADR (I2C_REGISTERS_BASE_ADDRESS+IICHSADR)
  59. #define IIC_CLKDIV (I2C_REGISTERS_BASE_ADDRESS+IICCLKDIV)
  60. #define IIC_INTRMSK (I2C_REGISTERS_BASE_ADDRESS+IICINTRMSK)
  61. #define IIC_XFRCNT (I2C_REGISTERS_BASE_ADDRESS+IICXFRCNT)
  62. #define IIC_XTCNTLSS (I2C_REGISTERS_BASE_ADDRESS+IICXTCNTLSS)
  63. #define IIC_DIRECTCNTL (I2C_REGISTERS_BASE_ADDRESS+IICDIRECTCNTL)
  64. /* MDCNTL Register Bit definition */
  65. #define IIC_MDCNTL_HSCL 0x01
  66. #define IIC_MDCNTL_EUBS 0x02
  67. #define IIC_MDCNTL_EINT 0x04
  68. #define IIC_MDCNTL_ESM 0x08
  69. #define IIC_MDCNTL_FSM 0x10
  70. #define IIC_MDCNTL_EGC 0x20
  71. #define IIC_MDCNTL_FMDB 0x40
  72. #define IIC_MDCNTL_FSDB 0x80
  73. /* CNTL Register Bit definition */
  74. #define IIC_CNTL_PT 0x01
  75. #define IIC_CNTL_READ 0x02
  76. #define IIC_CNTL_CHT 0x04
  77. #define IIC_CNTL_RPST 0x08
  78. /* bit 2/3 for Transfer count*/
  79. #define IIC_CNTL_AMD 0x40
  80. #define IIC_CNTL_HMT 0x80
  81. /* STS Register Bit definition */
  82. #define IIC_STS_PT 0x01
  83. #define IIC_STS_IRQA 0x02
  84. #define IIC_STS_ERR 0x04
  85. #define IIC_STS_SCMP 0x08
  86. #define IIC_STS_MDBF 0x10
  87. #define IIC_STS_MDBS 0x20
  88. #define IIC_STS_SLPR 0x40
  89. #define IIC_STS_SSS 0x80
  90. /* EXTSTS Register Bit definition */
  91. #define IIC_EXTSTS_XFRA 0x01
  92. #define IIC_EXTSTS_ICT 0x02
  93. #define IIC_EXTSTS_LA 0x04
  94. /* XTCNTLSS Register Bit definition */
  95. #define IIC_XTCNTLSS_SRST 0x01
  96. #define IIC_XTCNTLSS_EPI 0x02
  97. #define IIC_XTCNTLSS_SDBF 0x04
  98. #define IIC_XTCNTLSS_SBDD 0x08
  99. #define IIC_XTCNTLSS_SWS 0x10
  100. #define IIC_XTCNTLSS_SWC 0x20
  101. #define IIC_XTCNTLSS_SRS 0x40
  102. #define IIC_XTCNTLSS_SRC 0x80
  103. /* IICx_DIRECTCNTL register */
  104. #define IIC_DIRCNTL_SDAC 0x08
  105. #define IIC_DIRCNTL_SCC 0x04
  106. #define IIC_DIRCNTL_MSDA 0x02
  107. #define IIC_DIRCNTL_MSC 0x01
  108. #define DIRCTNL_FREE(v) (((v) & 0x0f) == 0x0f)
  109. #endif