interrupts.c 4.5 KB

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  1. /*
  2. * (C) Copyright 2000-2002
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2002 (440 port)
  6. * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
  7. *
  8. * (C) Copyright 2003 Motorola Inc. (MPC85xx port)
  9. * Xianghua Xiao (X.Xiao@motorola.com)
  10. *
  11. * See file CREDITS for list of people who contributed to this
  12. * project.
  13. *
  14. * This program is free software; you can redistribute it and/or
  15. * modify it under the terms of the GNU General Public License as
  16. * published by the Free Software Foundation; either version 2 of
  17. * the License, or (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27. * MA 02111-1307 USA
  28. */
  29. #include <common.h>
  30. #include <watchdog.h>
  31. #include <command.h>
  32. #include <asm/processor.h>
  33. #include <ppc_asm.tmpl>
  34. unsigned decrementer_count; /* count value for 1e6/HZ microseconds */
  35. static __inline__ unsigned long get_msr(void)
  36. {
  37. unsigned long msr;
  38. asm volatile("mfmsr %0" : "=r" (msr) :);
  39. return msr;
  40. }
  41. static __inline__ void set_msr(unsigned long msr)
  42. {
  43. asm volatile("mtmsr %0" : : "r" (msr));
  44. asm volatile("isync");
  45. }
  46. static __inline__ unsigned long get_dec (void)
  47. {
  48. unsigned long val;
  49. asm volatile ("mfdec %0":"=r" (val):);
  50. return val;
  51. }
  52. static __inline__ void set_dec (unsigned long val)
  53. {
  54. if (val)
  55. asm volatile ("mtdec %0"::"r" (val));
  56. }
  57. void enable_interrupts (void)
  58. {
  59. set_msr (get_msr() | MSR_EE);
  60. }
  61. /* returns flag if MSR_EE was set before */
  62. int disable_interrupts (void)
  63. {
  64. ulong msr = get_msr();
  65. set_msr (msr & ~MSR_EE);
  66. return ((msr & MSR_EE) != 0);
  67. }
  68. int interrupt_init (void)
  69. {
  70. volatile immap_t *immr = (immap_t *)CFG_IMMR;
  71. immr->im_pic.gcr = MPC85xx_PICGCR_RST;
  72. while (immr->im_pic.gcr & MPC85xx_PICGCR_RST);
  73. immr->im_pic.gcr = MPC85xx_PICGCR_M;
  74. decrementer_count = get_tbclk() / CFG_HZ;
  75. mtspr(SPRN_TCR, TCR_PIE);
  76. set_dec (decrementer_count);
  77. set_msr (get_msr () | MSR_EE);
  78. #ifdef CONFIG_INTERRUPTS
  79. volatile ccsr_pic_t *pic = &immr->im_pic;
  80. pic->iivpr1 = 0x810002; /* 50220 enable ecm interrupts */
  81. debug("iivpr1@%x = %x\n",&pic->iivpr1, pic->iivpr1);
  82. pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
  83. debug("iivpr2@%x = %x\n",&pic->iivpr2, pic->iivpr2);
  84. pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
  85. debug("iivpr3@%x = %x\n",&pic->iivpr3, pic->iivpr3);
  86. #ifdef CONFIG_PCI1
  87. pic->iivpr8 = 0x810008; /* enable pci1 interrupts */
  88. debug("iivpr8@%x = %x\n",&pic->iivpr8, pic->iivpr8);
  89. #endif
  90. #if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
  91. pic->iivpr9 = 0x810009; /* enable pci1 interrupts */
  92. debug("iivpr9@%x = %x\n",&pic->iivpr9, pic->iivpr9);
  93. #endif
  94. #ifdef CONFIG_PCIE1
  95. pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */
  96. debug("iivpr10@%x = %x\n",&pic->iivpr10, pic->iivpr10);
  97. #endif
  98. #ifdef CONFIG_PCIE3
  99. pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */
  100. debug("iivpr11@%x = %x\n",&pic->iivpr11, pic->iivpr11);
  101. #endif
  102. pic->ctpr=0; /* 40080 clear current task priority register */
  103. #endif
  104. return (0);
  105. }
  106. /*
  107. * Install and free a interrupt handler. Not implemented yet.
  108. */
  109. void
  110. irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
  111. {
  112. return;
  113. }
  114. void
  115. irq_free_handler(int vec)
  116. {
  117. return;
  118. }
  119. /****************************************************************************/
  120. volatile ulong timestamp = 0;
  121. /*
  122. * timer_interrupt - gets called when the decrementer overflows,
  123. * with interrupts disabled.
  124. * Trivial implementation - no need to be really accurate.
  125. */
  126. void timer_interrupt(struct pt_regs *regs)
  127. {
  128. timestamp++;
  129. set_dec (decrementer_count);
  130. mtspr(SPRN_TSR, TSR_PIS);
  131. #if defined(CONFIG_WATCHDOG)
  132. if ((timestamp % 1000) == 0)
  133. reset_85xx_watchdog();
  134. #endif /* CONFIG_WATCHDOG */
  135. }
  136. void reset_timer (void)
  137. {
  138. timestamp = 0;
  139. }
  140. ulong get_timer (ulong base)
  141. {
  142. return (timestamp - base);
  143. }
  144. void set_timer (ulong t)
  145. {
  146. timestamp = t;
  147. }
  148. #if defined(CONFIG_CMD_IRQ)
  149. /*******************************************************************************
  150. *
  151. * irqinfo - print information about PCI devices,not implemented.
  152. *
  153. */
  154. int
  155. do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  156. {
  157. printf ("\nInterrupt-unsupported:\n");
  158. return 0;
  159. }
  160. #endif