ds3231.c 4.8 KB

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  1. /*
  2. * (C) Copyright 2006
  3. * Markus Klotzbuecher, mk@denx.de
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
  25. * Extremly Accurate DS3231 Real Time Clock (RTC).
  26. *
  27. * copied from ds1337.c
  28. */
  29. #include <common.h>
  30. #include <command.h>
  31. #include <rtc.h>
  32. #include <i2c.h>
  33. #if defined(CONFIG_CMD_DATE)
  34. /*
  35. * RTC register addresses
  36. */
  37. #define RTC_SEC_REG_ADDR 0x0
  38. #define RTC_MIN_REG_ADDR 0x1
  39. #define RTC_HR_REG_ADDR 0x2
  40. #define RTC_DAY_REG_ADDR 0x3
  41. #define RTC_DATE_REG_ADDR 0x4
  42. #define RTC_MON_REG_ADDR 0x5
  43. #define RTC_YR_REG_ADDR 0x6
  44. #define RTC_CTL_REG_ADDR 0x0e
  45. #define RTC_STAT_REG_ADDR 0x0f
  46. /*
  47. * RTC control register bits
  48. */
  49. #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
  50. #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
  51. #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
  52. #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
  53. #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
  54. #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
  55. /*
  56. * RTC status register bits
  57. */
  58. #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
  59. #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
  60. #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
  61. static uchar rtc_read (uchar reg);
  62. static void rtc_write (uchar reg, uchar val);
  63. /*
  64. * Get the current time from the RTC
  65. */
  66. int rtc_get (struct rtc_time *tmp)
  67. {
  68. int rel = 0;
  69. uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
  70. control = rtc_read (RTC_CTL_REG_ADDR);
  71. status = rtc_read (RTC_STAT_REG_ADDR);
  72. sec = rtc_read (RTC_SEC_REG_ADDR);
  73. min = rtc_read (RTC_MIN_REG_ADDR);
  74. hour = rtc_read (RTC_HR_REG_ADDR);
  75. wday = rtc_read (RTC_DAY_REG_ADDR);
  76. mday = rtc_read (RTC_DATE_REG_ADDR);
  77. mon_cent = rtc_read (RTC_MON_REG_ADDR);
  78. year = rtc_read (RTC_YR_REG_ADDR);
  79. debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
  80. "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
  81. year, mon_cent, mday, wday, hour, min, sec, control, status);
  82. if (status & RTC_STAT_BIT_OSF) {
  83. printf ("### Warning: RTC oscillator has stopped\n");
  84. /* clear the OSF flag */
  85. rtc_write (RTC_STAT_REG_ADDR,
  86. rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
  87. rel = -1;
  88. }
  89. tmp->tm_sec = bcd2bin (sec & 0x7F);
  90. tmp->tm_min = bcd2bin (min & 0x7F);
  91. tmp->tm_hour = bcd2bin (hour & 0x3F);
  92. tmp->tm_mday = bcd2bin (mday & 0x3F);
  93. tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
  94. tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
  95. tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
  96. tmp->tm_yday = 0;
  97. tmp->tm_isdst= 0;
  98. debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  99. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  100. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  101. return rel;
  102. }
  103. /*
  104. * Set the RTC
  105. */
  106. int rtc_set (struct rtc_time *tmp)
  107. {
  108. uchar century;
  109. debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  110. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  111. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  112. rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
  113. century = (tmp->tm_year >= 2000) ? 0x80 : 0;
  114. rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
  115. rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
  116. rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
  117. rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
  118. rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
  119. rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
  120. return 0;
  121. }
  122. /*
  123. * Reset the RTC. We also enable the oscillator output on the
  124. * SQW/INTB* pin and program it for 32,768 Hz output. Note that
  125. * according to the datasheet, turning on the square wave output
  126. * increases the current drain on the backup battery from about
  127. * 600 nA to 2uA.
  128. */
  129. void rtc_reset (void)
  130. {
  131. rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
  132. }
  133. /*
  134. * Helper functions
  135. */
  136. static
  137. uchar rtc_read (uchar reg)
  138. {
  139. return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
  140. }
  141. static void rtc_write (uchar reg, uchar val)
  142. {
  143. i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
  144. }
  145. #endif