interrupts.c 6.6 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Alex Zuepke <azu@sysgo.de>
  9. *
  10. * (C) Copyright 2002
  11. * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  12. *
  13. * See file CREDITS for list of people who contributed to this
  14. * project.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation; either version 2 of
  19. * the License, or (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29. * MA 02111-1307 USA
  30. */
  31. #include <common.h>
  32. #include <arm920t.h>
  33. #include <lh7a40x.h>
  34. #include <asm/proc-armv/ptrace.h>
  35. extern void reset_cpu(ulong addr);
  36. static ulong timer_load_val = 0;
  37. /* macro to read the 16 bit timer */
  38. static inline ulong READ_TIMER(void)
  39. {
  40. LH7A40X_TIMERS_PTR(timers);
  41. lh7a40x_timer_t* timer = &timers->timer1;
  42. return (timer->value & 0x0000ffff);
  43. }
  44. #ifdef CONFIG_USE_IRQ
  45. /* enable IRQ interrupts */
  46. void enable_interrupts (void)
  47. {
  48. unsigned long temp;
  49. __asm__ __volatile__("mrs %0, cpsr\n"
  50. "bic %0, %0, #0x80\n"
  51. "msr cpsr_c, %0"
  52. : "=r" (temp)
  53. :
  54. : "memory");
  55. }
  56. /*
  57. * disable IRQ/FIQ interrupts
  58. * returns true if interrupts had been enabled before we disabled them
  59. */
  60. int disable_interrupts (void)
  61. {
  62. unsigned long old,temp;
  63. __asm__ __volatile__("mrs %0, cpsr\n"
  64. "orr %1, %0, #0xc0\n"
  65. "msr cpsr_c, %1"
  66. : "=r" (old), "=r" (temp)
  67. :
  68. : "memory");
  69. return (old & 0x80) == 0;
  70. }
  71. #else
  72. void enable_interrupts (void)
  73. {
  74. return;
  75. }
  76. int disable_interrupts (void)
  77. {
  78. return 0;
  79. }
  80. #endif
  81. void bad_mode (void)
  82. {
  83. panic ("Resetting CPU ...\n");
  84. reset_cpu (0);
  85. }
  86. void show_regs (struct pt_regs *regs)
  87. {
  88. unsigned long flags;
  89. const char *processor_modes[] = {
  90. "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
  91. "UK4_26", "UK5_26", "UK6_26", "UK7_26",
  92. "UK8_26", "UK9_26", "UK10_26", "UK11_26",
  93. "UK12_26", "UK13_26", "UK14_26", "UK15_26",
  94. "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
  95. "UK4_32", "UK5_32", "UK6_32", "ABT_32",
  96. "UK8_32", "UK9_32", "UK10_32", "UND_32",
  97. "UK12_32", "UK13_32", "UK14_32", "SYS_32",
  98. };
  99. flags = condition_codes (regs);
  100. printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
  101. "sp : %08lx ip : %08lx fp : %08lx\n",
  102. instruction_pointer (regs),
  103. regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
  104. printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
  105. regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
  106. printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
  107. regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
  108. printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
  109. regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
  110. printf ("Flags: %c%c%c%c",
  111. flags & CC_N_BIT ? 'N' : 'n',
  112. flags & CC_Z_BIT ? 'Z' : 'z',
  113. flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
  114. printf (" IRQs %s FIQs %s Mode %s%s\n",
  115. interrupts_enabled (regs) ? "on" : "off",
  116. fast_interrupts_enabled (regs) ? "on" : "off",
  117. processor_modes[processor_mode (regs)],
  118. thumb_mode (regs) ? " (T)" : "");
  119. }
  120. void do_undefined_instruction (struct pt_regs *pt_regs)
  121. {
  122. printf ("undefined instruction\n");
  123. show_regs (pt_regs);
  124. bad_mode ();
  125. }
  126. void do_software_interrupt (struct pt_regs *pt_regs)
  127. {
  128. printf ("software interrupt\n");
  129. show_regs (pt_regs);
  130. bad_mode ();
  131. }
  132. void do_prefetch_abort (struct pt_regs *pt_regs)
  133. {
  134. printf ("prefetch abort\n");
  135. show_regs (pt_regs);
  136. bad_mode ();
  137. }
  138. void do_data_abort (struct pt_regs *pt_regs)
  139. {
  140. printf ("data abort\n");
  141. show_regs (pt_regs);
  142. bad_mode ();
  143. }
  144. void do_not_used (struct pt_regs *pt_regs)
  145. {
  146. printf ("not used\n");
  147. show_regs (pt_regs);
  148. bad_mode ();
  149. }
  150. void do_fiq (struct pt_regs *pt_regs)
  151. {
  152. printf ("fast interrupt request\n");
  153. show_regs (pt_regs);
  154. bad_mode ();
  155. }
  156. void do_irq (struct pt_regs *pt_regs)
  157. {
  158. printf ("interrupt request\n");
  159. show_regs (pt_regs);
  160. bad_mode ();
  161. }
  162. static ulong timestamp;
  163. static ulong lastdec;
  164. int interrupt_init (void)
  165. {
  166. LH7A40X_TIMERS_PTR(timers);
  167. lh7a40x_timer_t* timer = &timers->timer1;
  168. /* a periodic timer using the 508kHz source */
  169. timer->control = (TIMER_PER | TIMER_CLK508K);
  170. if (timer_load_val == 0) {
  171. /*
  172. * 10ms period with 508.469kHz clock = 5084
  173. */
  174. timer_load_val = CFG_HZ/100;
  175. }
  176. /* load value for 10 ms timeout */
  177. lastdec = timer->load = timer_load_val;
  178. /* auto load, start timer */
  179. timer->control = timer->control | TIMER_EN;
  180. timestamp = 0;
  181. return (0);
  182. }
  183. /*
  184. * timer without interrupts
  185. */
  186. void reset_timer (void)
  187. {
  188. reset_timer_masked ();
  189. }
  190. ulong get_timer (ulong base)
  191. {
  192. return (get_timer_masked() - base);
  193. }
  194. void set_timer (ulong t)
  195. {
  196. timestamp = t;
  197. }
  198. void udelay (unsigned long usec)
  199. {
  200. ulong tmo,tmp;
  201. /* normalize */
  202. if (usec >= 1000) {
  203. tmo = usec / 1000;
  204. tmo *= CFG_HZ;
  205. tmo /= 1000;
  206. }
  207. else {
  208. if (usec > 1) {
  209. tmo = usec * CFG_HZ;
  210. tmo /= (1000*1000);
  211. }
  212. else
  213. tmo = 1;
  214. }
  215. /* check for rollover during this delay */
  216. tmp = get_timer (0);
  217. if ((tmp + tmo) < tmp )
  218. reset_timer_masked(); /* timer would roll over */
  219. else
  220. tmo += tmp;
  221. while (get_timer_masked () < tmo);
  222. }
  223. void reset_timer_masked (void)
  224. {
  225. /* reset time */
  226. lastdec = READ_TIMER();
  227. timestamp = 0;
  228. }
  229. ulong get_timer_masked (void)
  230. {
  231. ulong now = READ_TIMER();
  232. if (lastdec >= now) {
  233. /* normal mode */
  234. timestamp += (lastdec - now);
  235. } else {
  236. /* we have an overflow ... */
  237. timestamp += ((lastdec + timer_load_val) - now);
  238. }
  239. lastdec = now;
  240. return timestamp;
  241. }
  242. void udelay_masked (unsigned long usec)
  243. {
  244. ulong tmo;
  245. /* normalize */
  246. if (usec >= 1000) {
  247. tmo = usec / 1000;
  248. tmo *= CFG_HZ;
  249. tmo /= 1000;
  250. }
  251. else {
  252. if (usec > 1) {
  253. tmo = usec * CFG_HZ;
  254. tmo /= (1000*1000);
  255. }
  256. else
  257. tmo = 1;
  258. }
  259. reset_timer_masked ();
  260. while (get_timer_masked () < tmo);
  261. }
  262. /*
  263. * This function is derived from PowerPC code (read timebase as long long).
  264. * On ARM it just returns the timer value.
  265. */
  266. unsigned long long get_ticks(void)
  267. {
  268. return get_timer(0);
  269. }
  270. /*
  271. * This function is derived from PowerPC code (timebase clock frequency).
  272. * On ARM it returns the number of timer ticks per second.
  273. */
  274. ulong get_tbclk (void)
  275. {
  276. ulong tbclk;
  277. tbclk = timer_load_val * 100;
  278. return tbclk;
  279. }