seaboard.c 1.7 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152
  1. /*
  2. * (C) Copyright 2010,2011
  3. * NVIDIA Corporation <www.nvidia.com>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/io.h>
  25. #include <asm/arch/tegra2.h>
  26. #include <asm/arch/gpio.h>
  27. /*
  28. * Routine: gpio_config_uart
  29. * Description: Force GPIO_PI3 low on Seaboard so UART4 works.
  30. */
  31. void gpio_config_uart(void)
  32. {
  33. int gp = GPIO_PI3;
  34. struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
  35. struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
  36. u32 val;
  37. /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
  38. val = readl(&bank->gpio_config[GPIO_PORT(gp)]);
  39. val |= 1 << GPIO_BIT(gp);
  40. writel(val, &bank->gpio_config[GPIO_PORT(gp)]);
  41. val = readl(&bank->gpio_out[GPIO_PORT(gp)]);
  42. val &= ~(1 << GPIO_BIT(gp));
  43. writel(val, &bank->gpio_out[GPIO_PORT(gp)]);
  44. val = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
  45. val |= 1 << GPIO_BIT(gp);
  46. writel(val, &bank->gpio_dir_out[GPIO_PORT(gp)]);
  47. }