cm5200.h 10 KB

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  1. /*
  2. * (C) Copyright 2003-2007
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef __CONFIG_H
  24. #define __CONFIG_H
  25. /*
  26. * High Level Configuration Options
  27. */
  28. #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
  29. #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
  30. #define CONFIG_CM5200 1 /* ... on CM5200 platform */
  31. #define CONFIG_SYS_TEXT_BASE 0xfc000000
  32. #define CONFIG_HIGH_BATS 1 /* High BATs supported */
  33. /*
  34. * Supported commands
  35. */
  36. #include <config_cmd_default.h>
  37. #define CONFIG_CMD_ASKENV
  38. #define CONFIG_CMD_BSP
  39. #define CONFIG_CMD_DATE
  40. #define CONFIG_CMD_DHCP
  41. #define CONFIG_CMD_DIAG
  42. #define CONFIG_CMD_FAT
  43. #define CONFIG_CMD_I2C
  44. #define CONFIG_CMD_JFFS2
  45. #define CONFIG_CMD_MII
  46. #define CONFIG_CMD_NFS
  47. #define CONFIG_CMD_PING
  48. #define CONFIG_CMD_REGINFO
  49. #define CONFIG_CMD_SNTP
  50. #define CONFIG_CMD_USB
  51. /*
  52. * Serial console configuration
  53. */
  54. #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
  55. #define CONFIG_BAUDRATE 57600 /* ... at 57600 bps */
  56. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
  57. #define CONFIG_SILENT_CONSOLE 1 /* needed to silence i2c_init() */
  58. /*
  59. * Ethernet configuration
  60. */
  61. #define CONFIG_MPC5xxx_FEC 1
  62. #define CONFIG_MPC5xxx_FEC_MII100
  63. #define CONFIG_PHY_ADDR 0x00
  64. #define CONFIG_ENV_OVERWRITE 1 /* allow overwriting of ethaddr */
  65. /* use misc_init_r() to read ethaddr from I2C EEPROM (see CONFIG_SYS_I2C_EEPROM) */
  66. #define CONFIG_MISC_INIT_R 1
  67. #define CONFIG_MAC_OFFSET 0x35 /* MAC address offset in I2C EEPROM */
  68. /*
  69. * POST support
  70. */
  71. #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU | CONFIG_SYS_POST_I2C)
  72. #define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
  73. /* List of I2C addresses to be verified by POST */
  74. #define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_SLAVE, \
  75. CONFIG_SYS_I2C_IO, \
  76. CONFIG_SYS_I2C_EEPROM}
  77. /* display image timestamps */
  78. #define CONFIG_TIMESTAMP 1
  79. /*
  80. * Autobooting
  81. */
  82. #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
  83. #define CONFIG_PREBOOT "echo;" \
  84. "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
  85. "echo"
  86. #undef CONFIG_BOOTARGS
  87. /*
  88. * Default environment settings
  89. */
  90. #define CONFIG_EXTRA_ENV_SETTINGS \
  91. "netdev=eth0\0" \
  92. "netmask=255.255.0.0\0" \
  93. "ipaddr=192.168.160.33\0" \
  94. "serverip=192.168.1.1\0" \
  95. "gatewayip=192.168.1.1\0" \
  96. "console=ttyPSC0\0" \
  97. "u-boot_addr=100000\0" \
  98. "kernel_addr=200000\0" \
  99. "kernel_addr_flash=fc0c0000\0" \
  100. "fdt_addr=400000\0" \
  101. "fdt_addr_flash=fc0a0000\0" \
  102. "ramdisk_addr=500000\0" \
  103. "rootpath=/opt/eldk-4.1/ppc_6xx\0" \
  104. "u-boot=/tftpboot/cm5200/u-boot.bin\0" \
  105. "bootfile_fdt=/tftpboot/cm5200/uImage\0" \
  106. "fdt_file=/tftpboot/cm5200/cm5200.dtb\0" \
  107. "load=tftp ${u-boot_addr} ${u-boot}\0" \
  108. "update=prot off fc000000 +${filesize}; " \
  109. "era fc000000 +${filesize}; " \
  110. "cp.b ${u-boot_addr} fc000000 ${filesize}; " \
  111. "prot on fc000000 +${filesize}\0" \
  112. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  113. "nfsroot=${serverip}:${rootpath}\0" \
  114. "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0" \
  115. "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  116. "addinit=setenv bootargs ${bootargs} init=/linuxrc\0" \
  117. "addcons=setenv bootargs ${bootargs} " \
  118. "console=${console},${baudrate}\0" \
  119. "addip=setenv bootargs ${bootargs} " \
  120. "ip=${ipaddr}:${serverip}:${gatewayip}:" \
  121. "${netmask}:${hostname}:${netdev}:off panic=1\0" \
  122. "flash_flash=run flashargs addinit addip addcons;" \
  123. "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0" \
  124. "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; " \
  125. "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip " \
  126. "addcons; bootm ${kernel_addr} - ${fdt_addr}\0" \
  127. ""
  128. #define CONFIG_BOOTCOMMAND "run flash_flash"
  129. /*
  130. * Low level configuration
  131. */
  132. /*
  133. * Clock configuration
  134. */
  135. #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* SYS_XTAL_IN = 33MHz */
  136. #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK 1 /* IPB = 133MHz */
  137. /*
  138. * Memory map
  139. */
  140. #define CONFIG_SYS_MBAR 0xF0000000
  141. #define CONFIG_SYS_SDRAM_BASE 0x00000000
  142. #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
  143. #define CONFIG_SYS_LOWBOOT 1
  144. /* Use ON-Chip SRAM until RAM will be available */
  145. #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
  146. #ifdef CONFIG_POST
  147. /* preserve space for the post_word at end of on-chip SRAM */
  148. #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
  149. #else
  150. #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
  151. #endif
  152. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes for initial data */
  153. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
  154. #define CONFIG_BOARD_TYPES 1 /* we use board_type */
  155. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  156. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  157. #define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */
  158. #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */
  159. #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
  160. /*
  161. * Flash configuration
  162. */
  163. #define CONFIG_SYS_FLASH_CFI 1
  164. #define CONFIG_FLASH_CFI_DRIVER 1
  165. #define CONFIG_SYS_FLASH_BASE 0xfc000000
  166. /* we need these despite using CFI */
  167. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
  168. #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sectors on one chip */
  169. #define CONFIG_SYS_FLASH_SIZE 0x02000000 /* 32 MiB */
  170. #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
  171. #define CONFIG_SYS_RAMBOOT 1
  172. #undef CONFIG_SYS_LOWBOOT
  173. #endif
  174. /*
  175. * Chip selects configuration
  176. */
  177. /* Boot Chipselect */
  178. #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
  179. #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
  180. #define CONFIG_SYS_BOOTCS_CFG 0x00087D31 /* for pci_clk = 33 MHz */
  181. /* use board_early_init_r to enable flash write in CS_BOOT */
  182. #define CONFIG_BOARD_EARLY_INIT_R
  183. /* Flash memory addressing */
  184. #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
  185. #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
  186. /* No burst, dead cycle = 1 for CS0 (Flash) */
  187. #define CONFIG_SYS_CS_BURST 0x00000000
  188. #define CONFIG_SYS_CS_DEADCYCLE 0x00000001
  189. /*
  190. * SDRAM configuration
  191. * settings for k4s561632E-xx75, assuming XLB = 132 MHz
  192. */
  193. #define SDRAM_MODE 0x00CD0000 /* CASL 3, burst length 8 */
  194. #define SDRAM_CONTROL 0x514F0000
  195. #define SDRAM_CONFIG1 0xE2333900
  196. #define SDRAM_CONFIG2 0x8EE70000
  197. /*
  198. * MTD configuration
  199. */
  200. #define CONFIG_CMD_MTDPARTS 1
  201. #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
  202. #define CONFIG_FLASH_CFI_MTD
  203. #define MTDIDS_DEFAULT "nor0=cm5200-0"
  204. #define MTDPARTS_DEFAULT "mtdparts=cm5200-0:" \
  205. "384k(uboot),128k(env)," \
  206. "128k(redund_env),128k(dtb)," \
  207. "2m(kernel),27904k(rootfs)," \
  208. "-(config)"
  209. /*
  210. * I2C configuration
  211. */
  212. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  213. #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 */
  214. #define CONFIG_SYS_I2C_SPEED 40000 /* 40 kHz */
  215. #define CONFIG_SYS_I2C_SLAVE 0x0
  216. #define CONFIG_SYS_I2C_IO 0x38 /* PCA9554AD I2C I/O port address */
  217. #define CONFIG_SYS_I2C_EEPROM 0x53 /* I2C EEPROM device address */
  218. /*
  219. * RTC configuration
  220. */
  221. #define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
  222. /*
  223. * USB configuration
  224. */
  225. #define CONFIG_USB_OHCI 1
  226. #define CONFIG_USB_STORAGE 1
  227. #define CONFIG_USB_CLOCK 0x0001BBBB
  228. #define CONFIG_USB_CONFIG 0x00001000
  229. /* Partitions (for USB) */
  230. #define CONFIG_MAC_PARTITION 1
  231. #define CONFIG_DOS_PARTITION 1
  232. #define CONFIG_ISO_PARTITION 1
  233. /*
  234. * Invoke our last_stage_init function - needed by fwupdate
  235. */
  236. #define CONFIG_LAST_STAGE_INIT 1
  237. /*
  238. * Environment settings
  239. */
  240. #define CONFIG_ENV_IS_IN_FLASH 1
  241. #define CONFIG_ENV_SIZE 0x10000
  242. #define CONFIG_ENV_SECT_SIZE 0x20000
  243. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
  244. /* Configuration of redundant environment */
  245. #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
  246. #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
  247. /*
  248. * Pin multiplexing configuration
  249. */
  250. /*
  251. * CS1/GPIO_WKUP_6: GPIO (default)
  252. * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
  253. * IRDA/PSC6: UART
  254. * Ether: Ethernet 100Mbit with MD
  255. * PCI_DIS: PCI controller disabled
  256. * USB: USB
  257. * PSC3: SPI with UART3
  258. * PSC2: UART
  259. * PSC1: UART
  260. */
  261. #define CONFIG_SYS_GPS_PORT_CONFIG 0x10559C44
  262. /*
  263. * Miscellaneous configurable options
  264. */
  265. #define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
  266. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  267. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  268. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  269. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  270. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  271. #define CONFIG_SYS_ALT_MEMTEST 1
  272. #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
  273. #define CONFIG_SYS_MEMTEST_END 0x03f00000 /* 1 .. 63 MiB in SDRAM */
  274. #define CONFIG_LOOPW 1
  275. #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
  276. #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
  277. /*
  278. * Various low-level settings
  279. */
  280. #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
  281. #define CONFIG_SYS_HID0_FINAL HID0_ICE
  282. #define CONFIG_SYS_XLB_PIPELINING 1 /* enable transaction pipeling */
  283. /*
  284. * Cache Configuration
  285. */
  286. #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
  287. #ifdef CONFIG_CMD_KGDB
  288. #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  289. #endif
  290. /*
  291. * Flat Device Tree support
  292. */
  293. #define CONFIG_OF_LIBFDT 1
  294. #define CONFIG_OF_BOARD_SETUP 1
  295. #define OF_CPU "PowerPC,5200@0"
  296. #define OF_SOC "soc5200@f0000000"
  297. #define OF_TBCLK (bd->bi_busfreq / 4)
  298. #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
  299. #endif /* __CONFIG_H */