atngw100.c 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116
  1. /*
  2. * Copyright (C) 2006 Atmel Corporation
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #include <common.h>
  23. #include <asm/io.h>
  24. #include <asm/sdram.h>
  25. #include <asm/arch/clk.h>
  26. #include <asm/arch/gpio.h>
  27. #include <asm/arch/hmatrix.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. static const struct sdram_config sdram_config = {
  30. .data_bits = SDRAM_DATA_16BIT,
  31. .row_bits = 13,
  32. .col_bits = 9,
  33. .bank_bits = 2,
  34. .cas = 3,
  35. .twr = 2,
  36. .trc = 7,
  37. .trp = 2,
  38. .trcd = 2,
  39. .tras = 5,
  40. .txsr = 5,
  41. /* 7.81 us */
  42. .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
  43. };
  44. int board_early_init_f(void)
  45. {
  46. /* Enable SDRAM in the EBI mux */
  47. hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
  48. gpio_enable_ebi();
  49. gpio_enable_usart1();
  50. #if defined(CONFIG_MACB)
  51. gpio_enable_macb0();
  52. gpio_enable_macb1();
  53. #endif
  54. #if defined(CONFIG_MMC)
  55. gpio_enable_mmci();
  56. #endif
  57. #if defined(CONFIG_ATMEL_SPI)
  58. gpio_enable_spi0(1 << 0);
  59. #endif
  60. return 0;
  61. }
  62. phys_size_t initdram(int board_type)
  63. {
  64. unsigned long expected_size;
  65. unsigned long actual_size;
  66. void *sdram_base;
  67. sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
  68. expected_size = sdram_init(sdram_base, &sdram_config);
  69. actual_size = get_ram_size(sdram_base, expected_size);
  70. unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
  71. if (expected_size != actual_size)
  72. printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
  73. actual_size >> 20, expected_size >> 20);
  74. return actual_size;
  75. }
  76. void board_init_info(void)
  77. {
  78. gd->bd->bi_phy_id[0] = 0x01;
  79. gd->bd->bi_phy_id[1] = 0x03;
  80. }
  81. /* SPI chip select control */
  82. #ifdef CONFIG_ATMEL_SPI
  83. #include <spi.h>
  84. #define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA3
  85. int spi_cs_is_valid(unsigned int bus, unsigned int cs)
  86. {
  87. return bus == 0 && cs == 0;
  88. }
  89. void spi_cs_activate(struct spi_slave *slave)
  90. {
  91. gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
  92. }
  93. void spi_cs_deactivate(struct spi_slave *slave)
  94. {
  95. gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
  96. }
  97. #endif /* CONFIG_ATMEL_SPI */