cardhu.c.mmc 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151
  1. /*
  2. * (C) Copyright 2010-2012
  3. * NVIDIA Corporation <www.nvidia.com>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/io.h>
  25. #include <asm/arch/pinmux.h>
  26. #include "pinmux-config-cardhu.h"
  27. #include <asm/arch/clock.h>
  28. #include <asm/arch/gp_padctrl.h>
  29. #include <asm/arch/pmu.h>
  30. #include <asm/arch/sdmmc.h>
  31. #include <asm/arch-tegra/mmc.h>
  32. #include <asm/arch-tegra/tegra_mmc.h>
  33. #include <mmc.h>
  34. #include <i2c.h>
  35. /*
  36. * Routine: pinmux_init
  37. * Description: Do individual peripheral pinmux configs
  38. */
  39. void pinmux_init(void)
  40. {
  41. pinmux_config_table(tegra3_pinmux_common,
  42. ARRAY_SIZE(tegra3_pinmux_common));
  43. pinmux_config_table(unused_pins_lowpower,
  44. ARRAY_SIZE(unused_pins_lowpower));
  45. }
  46. #if defined(CONFIG_MMC)
  47. /*
  48. * Routine: pin_mux_mmc
  49. * Description: setup the pin muxes/tristate values for the SDMMC(s)
  50. */
  51. static void pin_mux_mmc(void)
  52. {
  53. }
  54. /* Do I2C/PMU writes to bring up SD card bus power */
  55. static void board_sdmmc_voltage_init(void)
  56. {
  57. uchar reg, data_buffer[1];
  58. int i;
  59. i2c_set_bus_num(0); /* PMU is on bus 0 */
  60. data_buffer[0] = 0x65;
  61. reg = 0x32;
  62. for (i = 0; i < MAX_I2C_RETRY; ++i) {
  63. if (i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1))
  64. udelay(100);
  65. }
  66. data_buffer[0] = 0x09;
  67. reg = 0x67;
  68. for (i = 0; i < MAX_I2C_RETRY; ++i) {
  69. if (i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1))
  70. udelay(100);
  71. }
  72. }
  73. static void pad_init_mmc(struct tegra_mmc *reg)
  74. {
  75. struct apb_misc_gp_ctlr *const gpc =
  76. (struct apb_misc_gp_ctlr *)NV_PA_APB_MISC_GP_BASE;
  77. struct sdmmc_ctlr *const sdmmc = (struct sdmmc_ctlr *)reg;
  78. u32 val, offset = (unsigned int)reg;
  79. u32 padcfg, padmask;
  80. debug("%s: sdmmc address = %08x\n", __func__, (unsigned int)sdmmc);
  81. /* Set the pad drive strength for SDMMC1 or 3 only */
  82. if (offset != TEGRA_SDMMC1_BASE && offset != TEGRA_SDMMC3_BASE) {
  83. debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
  84. __func__);
  85. return;
  86. }
  87. /* Set pads as per T30 TRM, section 24.6.1.2 */
  88. padcfg = (GP_SDIOCFG_DRVUP_SLWF | GP_SDIOCFG_DRVDN_SLWR | \
  89. GP_SDIOCFG_DRVUP | GP_SDIOCFG_DRVDN);
  90. padmask = 0x00000FFF;
  91. if (offset == TEGRA_SDMMC1_BASE) {
  92. val = readl(&gpc->sdio1cfg);
  93. val &= padmask;
  94. val |= padcfg;
  95. writel(val, &gpc->sdio1cfg);
  96. } else { /* SDMMC3 */
  97. val = readl(&gpc->sdio3cfg);
  98. val &= padmask;
  99. val |= padcfg;
  100. writel(val, &gpc->sdio3cfg);
  101. }
  102. val = readl(&sdmmc->sdmmc_sdmemcomp_pad_ctrl);
  103. val &= 0xFFFFFFF0;
  104. val |= MEMCOMP_PADCTRL_VREF;
  105. writel(val, &sdmmc->sdmmc_sdmemcomp_pad_ctrl);
  106. val = readl(&sdmmc->sdmmc_auto_cal_config);
  107. val &= 0xFFFF0000;
  108. val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
  109. writel(val, &sdmmc->sdmmc_auto_cal_config);
  110. }
  111. /* this is a weak define that we are overriding */
  112. int board_mmc_init(bd_t *bd)
  113. {
  114. debug("board_mmc_init called\n");
  115. /* Turn on SD-card bus power */
  116. board_sdmmc_voltage_init();
  117. /* Set up the SDMMC pads as per the TRM */
  118. pad_init_mmc((struct tegra_mmc *)TEGRA_SDMMC1_BASE);
  119. /* Enable muxes, etc. for SDMMC controllers */
  120. pin_mux_mmc();
  121. /* init dev 0 (SDMMC4), ("HSMMC") with 8-bit bus */
  122. tegra_mmc_init(0, 8, -1, -1);
  123. /* init dev 1 (SDMMC0), ("SDIO") with 8-bit bus */
  124. tegra_mmc_init(1, 8, -1, -1);
  125. return 0;
  126. }
  127. #endif /* MMC */