modnet50.h 6.0 KB

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  1. /*
  2. * (C) Copyright 2004
  3. * IMMS, gGmbH <www.imms.de>
  4. * Thomas Elste <info@elste.org>
  5. *
  6. * Configuation settings for ModNET50 board.
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #ifndef __CONFIG_H
  27. #define __CONFIG_H
  28. /*
  29. * If we are developing, we might want to start u-boot from ram
  30. * so we MUST NOT initialize critical regs like mem-timing ...
  31. */
  32. #define CONFIG_INIT_CRITICAL /* undef for developing */
  33. /*
  34. * High Level Configuration Options
  35. * (easy to change)
  36. */
  37. #define CONFIG_ARM7 1 /* This is a ARM7 CPU */
  38. #define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
  39. #define CONFIG_NETARM /* it's a Netsiclicon NET+ARM */
  40. #undef CONFIG_NETARM_NET40_REV2 /* it's a Net+40 Rev. 2 */
  41. #undef CONFIG_NETARM_NET40_REV4 /* it's a Net+40 Rev. 4 */
  42. #define CONFIG_NETARM_NET50 /* it's a Net+50 */
  43. #define CONFIG_MODNET50 1 /* on an ModNET50 Board */
  44. #undef CONFIG_USE_IRQ /* don't need them anymore */
  45. /*
  46. * Size of malloc() pool
  47. */
  48. #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
  49. #define CFG_GBL_DATA_SIZE 128
  50. /*
  51. * Hardware drivers
  52. */
  53. #define CONFIG_DRIVER_NETARMETH 1
  54. /*
  55. * select serial console configuration
  56. */
  57. #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
  58. /* allow to overwrite serial and ethaddr */
  59. #define CONFIG_ENV_OVERWRITE
  60. #define CONFIG_BAUDRATE 38400
  61. #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
  62. #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_JFFS2))
  63. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  64. #include <cmd_confdefs.h>
  65. #define CONFIG_NETMASK 255.255.255.0
  66. #define CONFIG_IPADDR 192.168.30.2
  67. #define CONFIG_SERVERIP 192.168.30.122
  68. #define CFG_ETH_PHY_ADDR 0x100
  69. #define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */
  70. /*#define CONFIG_BOOTDELAY 10*/
  71. /* args and cmd for uClinux-image @ 0x10020000, ramdisk-image @ 0x100a0000 */
  72. #define CONFIG_BOOTCOMMAND "bootm 0x10020000 0x100a0000"
  73. #define CONFIG_BOOTARGS "console=ttyS0,38400 initrd=0x100a0040,530K root=/dev/ram keepinitrd"
  74. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  75. #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
  76. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  77. #endif
  78. /*
  79. * Miscellaneous configurable options
  80. */
  81. #define CFG_LONGHELP /* undef to save memory */
  82. #define CFG_PROMPT "modnet50 # " /* Monitor Command Prompt */
  83. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  84. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  85. #define CFG_MAXARGS 16 /* max number of command args */
  86. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  87. #define CFG_MEMTEST_START 0x00400000 /* memtest works on */
  88. #define CFG_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
  89. #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
  90. #define CFG_LOAD_ADDR 0x00500000 /* default load address */
  91. #define CFG_HZ 900 /* decrementer freq: 2 kHz */
  92. /* valid baudrates */
  93. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  94. /*-----------------------------------------------------------------------
  95. * Stack sizes
  96. *
  97. * The stack sizes are set up in start.S using the settings below
  98. */
  99. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  100. #ifdef CONFIG_USE_IRQ
  101. #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
  102. #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
  103. #endif
  104. /*-----------------------------------------------------------------------
  105. * Physical Memory Map
  106. */
  107. #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
  108. #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
  109. #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
  110. #define PHYS_SDRAM_2 0x01000000 /* SDRAM Bank #1 */
  111. #define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
  112. #define PHYS_FLASH_1 0x10000000 /* Flash Bank #1 */
  113. #define PHYS_FLASH_1_SIZE 0x00200000 /* 2 MB (one chip only, 16bit access) */
  114. #define PHYS_FLASH_2 0x10200001
  115. #define PHYS_FLASH_2_SIZE 0x00200000
  116. #define CONFIG_NETARM_EEPROM
  117. /* #ifdef CONFIG_NETARM_EEPROM */
  118. #define PHYS_NVRAM_1 0x20000000 /* EEPROM Bank #1 */
  119. #define PHYS_NVRAM_SIZE 0x00002000 /* 8 KB */
  120. /* #endif */
  121. #define PHYS_EXT_1 0x30000000 /* Extensions Bank #1 */
  122. #define PHYS_EXT_SIZE 0x01000000 /* 32 MB memory mapped I/O */
  123. #define CFG_FLASH_BASE PHYS_FLASH_1
  124. #define CFG_FLASH_SIZE PHYS_FLASH_1_SIZE
  125. /*-----------------------------------------------------------------------
  126. * FLASH and environment organization
  127. */
  128. #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  129. #define CFG_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
  130. #define CFG_MAIN_SECT_SIZE 0x00010000 /* main size of sectors on one chip */
  131. /* timeout values are in ticks */
  132. #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
  133. #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
  134. /* environment settings */
  135. #define CFG_ENV_IS_IN_FLASH
  136. #undef CFG_ENV_IS_NOWHERE
  137. #define CFG_ENV_ADDR 0x1001C000 /* environment start address */
  138. #define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
  139. #define CFG_ENV_SIZE 0x4000 /* max size for environment */
  140. /* Flash banks JFFS2 should use */
  141. #define CFG_JFFS2_FIRST_BANK 0
  142. #define CFG_JFFS2_FIRST_SECTOR 8
  143. #define CFG_JFFS2_NUM_BANKS 2
  144. #endif /* __CONFIG_H */