cmd_ace.c 6.4 KB

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  1. /*
  2. * Copyright (c) 2004 Picture Elements, Inc.
  3. * Stephen Williams (XXXXXXXXXXXXXXXX)
  4. *
  5. * This source code is free software; you can redistribute it
  6. * and/or modify it in source code form under the terms of the GNU
  7. * General Public License as published by the Free Software
  8. * Foundation; either version 2 of the License, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  19. */
  20. #ident "$Id:$"
  21. /*
  22. * The Xilinx SystemACE chip support is activated by defining
  23. * CONFIG_SYSTEMACE to turn on support, and CFG_SYSTEMACE_BASE
  24. * to set the base address of the device. This code currently
  25. * assumes that the chip is connected via a byte-wide bus.
  26. *
  27. * The CONFIG_SYSTEMACE also adds to fat support the device class
  28. * "ace" that allows the user to execute "fatls ace 0" and the
  29. * like. This works by making the systemace_get_dev function
  30. * available to cmd_fat.c:get_dev and filling in a block device
  31. * description that has all the bits needed for FAT support to
  32. * read sectors.
  33. */
  34. # include <common.h>
  35. # include <command.h>
  36. # include <systemace.h>
  37. # include <part.h>
  38. # include <asm/io.h>
  39. #ifdef CONFIG_SYSTEMACE
  40. /*
  41. * The ace_readw and writew functions read/write 16bit words, but the
  42. * offset value is the BYTE offset as most used in the Xilinx
  43. * datasheet for the SystemACE chip. The CFG_SYSTEMACE_BASE is defined
  44. * to be the base address for the chip, usually in the local
  45. * peripheral bus.
  46. */
  47. static unsigned ace_readw(unsigned offset)
  48. {
  49. #if (CFG_SYSTEMACE_WIDTH == 8)
  50. u16 temp;
  51. #if !defined(__BIG_ENDIAN)
  52. temp =((u16)readb(CFG_SYSTEMACE_BASE+offset) << 8);
  53. temp |= (u16)readb(CFG_SYSTEMACE_BASE+offset+1);
  54. #else
  55. temp = (u16)readb(CFG_SYSTEMACE_BASE+offset);
  56. temp |=((u16)readb(CFG_SYSTEMACE_BASE+offset+1) << 8);
  57. #endif
  58. return temp;
  59. #else
  60. return readw(CFG_SYSTEMACE_BASE+offset);
  61. #endif
  62. }
  63. static void ace_writew(unsigned val, unsigned offset)
  64. {
  65. #if (CFG_SYSTEMACE_WIDTH == 8)
  66. #if !defined(__BIG_ENDIAN)
  67. writeb((u8)(val>>8), CFG_SYSTEMACE_BASE+offset);
  68. writeb((u8)val, CFG_SYSTEMACE_BASE+offset+1);
  69. #else
  70. writeb((u8)val, CFG_SYSTEMACE_BASE+offset);
  71. writeb((u8)(val>>8), CFG_SYSTEMACE_BASE+offset+1);
  72. #endif
  73. #else
  74. writew(val, CFG_SYSTEMACE_BASE+offset);
  75. #endif
  76. }
  77. /* */
  78. static unsigned long systemace_read(int dev,
  79. unsigned long start,
  80. unsigned long blkcnt,
  81. unsigned long *buffer);
  82. static block_dev_desc_t systemace_dev = {0};
  83. static int get_cf_lock(void)
  84. {
  85. int retry = 10;
  86. /* CONTROLREG = LOCKREG */
  87. ace_writew(0x0002, 0x18);
  88. /* Wait for MPULOCK in STATUSREG[15:0] */
  89. while (! (ace_readw(0x04) & 0x0002)) {
  90. if (retry < 0)
  91. return -1;
  92. udelay(100000);
  93. retry -= 1;
  94. }
  95. return 0;
  96. }
  97. static void release_cf_lock(void)
  98. {
  99. /* CONTROLREG = none */
  100. ace_writew(0x0000, 0x18);
  101. }
  102. block_dev_desc_t * systemace_get_dev(int dev)
  103. {
  104. /* The first time through this, the systemace_dev object is
  105. not yet initialized. In that case, fill it in. */
  106. if (systemace_dev.blksz == 0) {
  107. systemace_dev.if_type = IF_TYPE_UNKNOWN;
  108. systemace_dev.part_type = PART_TYPE_UNKNOWN;
  109. systemace_dev.type = DEV_TYPE_HARDDISK;
  110. systemace_dev.blksz = 512;
  111. systemace_dev.removable = 1;
  112. systemace_dev.block_read = systemace_read;
  113. }
  114. return &systemace_dev;
  115. }
  116. /*
  117. * This function is called (by dereferencing the block_read pointer in
  118. * the dev_desc) to read blocks of data. The return value is the
  119. * number of blocks read. A zero return indicates an error.
  120. */
  121. static unsigned long systemace_read(int dev,
  122. unsigned long start,
  123. unsigned long blkcnt,
  124. unsigned long *buffer)
  125. {
  126. int retry;
  127. unsigned blk_countdown;
  128. unsigned char*dp = (unsigned char*)buffer;
  129. if (get_cf_lock() < 0) {
  130. unsigned status = ace_readw(0x04);
  131. /* If CFDETECT is false, card is missing. */
  132. if (! (status&0x0010)) {
  133. printf("** CompactFlash card not present. **\n");
  134. return 0;
  135. }
  136. printf("**** ACE locked away from me (STATUSREG=%04x)\n", status);
  137. return 0;
  138. }
  139. #ifdef DEBUG_SYSTEMACE
  140. printf("... systemace read %lu sectors at %lu\n", blkcnt, start);
  141. #endif
  142. retry = 2000;
  143. for (;;) {
  144. unsigned val = ace_readw(0x04);
  145. /* If CFDETECT is false, card is missing. */
  146. if (! (val & 0x0010)) {
  147. printf("**** ACE CompactFlash not found.\n");
  148. release_cf_lock();
  149. return 0;
  150. }
  151. /* If RDYFORCMD, then we are ready to go. */
  152. if (val & 0x0100)
  153. break;
  154. if (retry < 0) {
  155. printf("**** SystemACE not ready.\n");
  156. release_cf_lock();
  157. return 0;
  158. }
  159. udelay(1000);
  160. retry -= 1;
  161. }
  162. /* The SystemACE can only transfer 256 sectors at a time, so
  163. limit the current chunk of sectors. The blk_countdown
  164. variable is the number of sectors left to transfer. */
  165. blk_countdown = blkcnt;
  166. while (blk_countdown > 0) {
  167. unsigned trans = blk_countdown;
  168. if (trans > 256) trans = 256;
  169. #ifdef DEBUG_SYSTEMACE
  170. printf("... transfer %lu sector in a chunk\n", trans);
  171. #endif
  172. /* Write LBA block address */
  173. ace_writew((start>> 0) & 0xffff, 0x10);
  174. ace_writew((start>>16) & 0x00ff, 0x12);
  175. /* NOTE: in the Write Sector count below, a count of 0
  176. causes a transfer of 256, so &0xff gives the right
  177. value for whatever transfer count we want. */
  178. /* Write sector count | ReadMemCardData. */
  179. ace_writew((trans&0xff) | 0x0300, 0x14);
  180. retry = trans * 16;
  181. while (retry > 0) {
  182. int idx;
  183. /* Wait for buffer to become ready. */
  184. while (! (ace_readw(0x04) & 0x0020)) {
  185. udelay(100);
  186. }
  187. /* Read 16 words of 2bytes from the sector buffer. */
  188. for (idx = 0 ; idx < 16 ; idx += 1) {
  189. unsigned short val = ace_readw(0x40);
  190. *dp++ = val & 0xff;
  191. *dp++ = (val>>8) & 0xff;
  192. }
  193. retry -= 1;
  194. }
  195. /* Count the blocks we transfer this time. */
  196. start += trans;
  197. blk_countdown -= trans;
  198. }
  199. release_cf_lock();
  200. return blkcnt;
  201. }
  202. #endif /* CONFIG_SYSTEMACE */