flash.c 11 KB

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  1. /*
  2. * (C) Copyright 2003-2004
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2004
  6. * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  28. /*
  29. * CPU to flash interface is 8-bit, so make declaration accordingly
  30. */
  31. typedef unsigned char FLASH_PORT_WIDTH;
  32. typedef volatile unsigned char FLASH_PORT_WIDTHV;
  33. #define FPW FLASH_PORT_WIDTH
  34. #define FPWV FLASH_PORT_WIDTHV
  35. #define FLASH_CYCLE1 0x0555
  36. #define FLASH_CYCLE2 0x02aa
  37. /*-----------------------------------------------------------------------
  38. * Functions
  39. */
  40. static ulong flash_get_size(FPWV *addr, flash_info_t *info);
  41. static void flash_reset(flash_info_t *info);
  42. static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
  43. static flash_info_t *flash_get_info(ulong base);
  44. /*-----------------------------------------------------------------------
  45. * flash_init()
  46. *
  47. * sets up flash_info and returns size of FLASH (bytes)
  48. */
  49. unsigned long flash_init (void)
  50. {
  51. unsigned long size = 0;
  52. extern void flash_preinit(void);
  53. ulong flashbase = CFG_FLASH_BASE;
  54. flash_preinit();
  55. /* Init: no FLASHes known */
  56. memset(&flash_info[0], 0, sizeof(flash_info_t));
  57. flash_info[0].size =
  58. flash_get_size((FPW *)flashbase, &flash_info[0]);
  59. size = flash_info[0].size;
  60. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  61. /* monitor protection ON by default */
  62. flash_protect(FLAG_PROTECT_SET,
  63. CFG_MONITOR_BASE,
  64. CFG_MONITOR_BASE+monitor_flash_len-1,
  65. flash_get_info(CFG_MONITOR_BASE));
  66. #endif
  67. #ifdef CFG_ENV_IS_IN_FLASH
  68. /* ENV protection ON by default */
  69. flash_protect(FLAG_PROTECT_SET,
  70. CFG_ENV_ADDR,
  71. CFG_ENV_ADDR+CFG_ENV_SIZE-1,
  72. flash_get_info(CFG_ENV_ADDR));
  73. #endif
  74. return size ? size : 1;
  75. }
  76. /*-----------------------------------------------------------------------
  77. */
  78. static void flash_reset(flash_info_t *info)
  79. {
  80. FPWV *base = (FPWV *)(info->start[0]);
  81. /* Put FLASH back in read mode */
  82. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  83. *base = (FPW)0x00FF00FF; /* Intel Read Mode */
  84. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
  85. *base = (FPW)0x00F000F0; /* AMD Read Mode */
  86. }
  87. /*-----------------------------------------------------------------------
  88. */
  89. static flash_info_t *flash_get_info(ulong base)
  90. {
  91. int i;
  92. flash_info_t * info;
  93. for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
  94. info = & flash_info[i];
  95. if (info->size && info->start[0] <= base &&
  96. base <= info->start[0] + info->size - 1)
  97. break;
  98. }
  99. return i == CFG_MAX_FLASH_BANKS ? 0 : info;
  100. }
  101. /*-----------------------------------------------------------------------
  102. */
  103. void flash_print_info (flash_info_t *info)
  104. {
  105. int i;
  106. if (info->flash_id == FLASH_UNKNOWN) {
  107. printf ("missing or unknown FLASH type\n");
  108. return;
  109. }
  110. switch (info->flash_id & FLASH_VENDMASK) {
  111. case FLASH_MAN_AMD: printf ("AMD "); break;
  112. case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
  113. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  114. case FLASH_MAN_SST: printf ("SST "); break;
  115. case FLASH_MAN_STM: printf ("STM "); break;
  116. case FLASH_MAN_INTEL: printf ("INTEL "); break;
  117. default: printf ("Unknown Vendor "); break;
  118. }
  119. switch (info->flash_id & FLASH_TYPEMASK) {
  120. case FLASH_AM116DB:
  121. printf ("AM29LV116DB (16Mbit, bottom boot sect)\n");
  122. break;
  123. case FLASH_AMLV128U:
  124. printf ("AM29LV128ML (128Mbit, uniform sector size)\n");
  125. break;
  126. case FLASH_AM160B:
  127. printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
  128. break;
  129. default:
  130. printf ("Unknown Chip Type\n");
  131. break;
  132. }
  133. printf (" Size: %ld MB in %d Sectors\n",
  134. info->size >> 20,
  135. info->sector_count);
  136. printf (" Sector Start Addresses:");
  137. for (i=0; i<info->sector_count; ++i) {
  138. if ((i % 5) == 0) {
  139. printf ("\n ");
  140. }
  141. printf (" %08lX%s",
  142. info->start[i],
  143. info->protect[i] ? " (RO)" : " ");
  144. }
  145. printf ("\n");
  146. return;
  147. }
  148. /*-----------------------------------------------------------------------
  149. */
  150. /*
  151. * The following code cannot be run from FLASH!
  152. */
  153. ulong flash_get_size (FPWV *addr, flash_info_t *info)
  154. {
  155. int i;
  156. ulong base = (ulong)addr;
  157. /* Write auto select command: read Manufacturer ID */
  158. /* Write auto select command sequence and test FLASH answer */
  159. addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
  160. addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
  161. addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
  162. /* The manufacturer codes are only 1 byte, so just use 1 byte.
  163. * This works for any bus width and any FLASH device width.
  164. */
  165. udelay(100);
  166. switch (addr[0] & 0xff) {
  167. case (uchar)AMD_MANUFACT:
  168. debug ("Manufacturer: AMD (Spansion)\n");
  169. info->flash_id = FLASH_MAN_AMD;
  170. break;
  171. case (uchar)INTEL_MANUFACT:
  172. debug ("Manufacturer: Intel (not supported yet)\n");
  173. info->flash_id = FLASH_MAN_INTEL;
  174. break;
  175. default:
  176. info->flash_id = FLASH_UNKNOWN;
  177. info->sector_count = 0;
  178. info->size = 0;
  179. break;
  180. }
  181. /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
  182. if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[1]) {
  183. case (uchar)AMD_ID_LV116DB:
  184. debug ("Chip: AM29LV116DB\n");
  185. info->flash_id += FLASH_AM116DB;
  186. info->sector_count = 35;
  187. info->size = 0x00200000;
  188. /*
  189. * The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all
  190. * the other ones are 64 kB
  191. */
  192. info->start[0] = base + 0x00000000;
  193. info->start[1] = base + 0x00004000;
  194. info->start[2] = base + 0x00006000;
  195. info->start[3] = base + 0x00008000;
  196. for( i = 4; i < info->sector_count; i++ )
  197. info->start[i] =
  198. base + (i * (64 << 10)) - 0x00030000;
  199. break; /* => 2 MB */
  200. case (FPW)AMD_ID_LV160B:
  201. debug ("Chip: AM29LV160MB\n");
  202. info->flash_id += FLASH_AM160B;
  203. info->sector_count = 35;
  204. info->size = 0x00400000;
  205. /*
  206. * The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all
  207. * the other ones are 64 kB
  208. */
  209. info->start[0] = base + 0x00000000;
  210. info->start[1] = base + 0x00008000;
  211. info->start[2] = base + 0x0000C000;
  212. info->start[3] = base + 0x00010000;
  213. for( i = 4; i < info->sector_count; i++ )
  214. info->start[i] =
  215. base + (i * 2 * (64 << 10)) - 0x00060000;
  216. break; /* => 4 MB */
  217. default:
  218. info->flash_id = FLASH_UNKNOWN;
  219. info->sector_count = 0;
  220. info->size = 0;
  221. }
  222. /* Put FLASH back in read mode */
  223. flash_reset(info);
  224. return (info->size);
  225. }
  226. /*-----------------------------------------------------------------------
  227. */
  228. int flash_erase (flash_info_t *info, int s_first, int s_last)
  229. {
  230. FPWV *addr = (FPWV*)(info->start[0]);
  231. int flag, prot, sect, l_sect;
  232. ulong start, now, last;
  233. debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
  234. if ((s_first < 0) || (s_first > s_last)) {
  235. if (info->flash_id == FLASH_UNKNOWN) {
  236. printf ("- missing\n");
  237. } else {
  238. printf ("- no sectors to erase\n");
  239. }
  240. return 1;
  241. }
  242. if ((info->flash_id == FLASH_UNKNOWN) ||
  243. (info->flash_id > FLASH_AMD_COMP)) {
  244. printf ("Can't erase unknown flash type %08lx - aborted\n",
  245. info->flash_id);
  246. return 1;
  247. }
  248. prot = 0;
  249. for (sect=s_first; sect<=s_last; ++sect) {
  250. if (info->protect[sect]) {
  251. prot++;
  252. }
  253. }
  254. if (prot) {
  255. printf ("- Warning: %d protected sectors will not be erased!\n",
  256. prot);
  257. } else {
  258. printf ("\n");
  259. }
  260. l_sect = -1;
  261. /* Disable interrupts which might cause a timeout here */
  262. flag = disable_interrupts();
  263. addr[0x0555] = (FPW)0x00AA00AA;
  264. addr[0x02AA] = (FPW)0x00550055;
  265. addr[0x0555] = (FPW)0x00800080;
  266. addr[0x0555] = (FPW)0x00AA00AA;
  267. addr[0x02AA] = (FPW)0x00550055;
  268. /* Start erase on unprotected sectors */
  269. for (sect = s_first; sect<=s_last; sect++) {
  270. if (info->protect[sect] == 0) { /* not protected */
  271. addr = (FPWV*)(info->start[sect]);
  272. addr[0] = (FPW)0x00300030;
  273. l_sect = sect;
  274. }
  275. }
  276. /* re-enable interrupts if necessary */
  277. if (flag)
  278. enable_interrupts();
  279. /* wait at least 80us - let's wait 1 ms */
  280. udelay (1000);
  281. /*
  282. * We wait for the last triggered sector
  283. */
  284. if (l_sect < 0)
  285. goto DONE;
  286. start = get_timer (0);
  287. last = start;
  288. addr = (FPWV*)(info->start[l_sect]);
  289. while ((addr[0] & (FPW)0x00800080) != (FPW)0x00800080) {
  290. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  291. printf ("Timeout\n");
  292. return 1;
  293. }
  294. /* show that we're waiting */
  295. if ((now - last) > 1000) { /* every second */
  296. putc ('.');
  297. last = now;
  298. }
  299. }
  300. DONE:
  301. /* reset to read mode */
  302. addr = (FPWV*)info->start[0];
  303. addr[0] = (FPW)0x00F000F0; /* reset bank */
  304. printf (" done\n");
  305. return 0;
  306. }
  307. /*-----------------------------------------------------------------------
  308. * Copy memory to flash, returns:
  309. * 0 - OK
  310. * 1 - write timeout
  311. * 2 - Flash not erased
  312. */
  313. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  314. {
  315. int i, rc = 0;
  316. for (i = 0; i < cnt; i++)
  317. if ((rc = write_word_amd(info, (FPW *)(addr+i), src[i])) != 0) {
  318. return (rc);
  319. }
  320. return rc;
  321. }
  322. /*-----------------------------------------------------------------------
  323. * Write a word to Flash for AMD FLASH
  324. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  325. * (not an individual chip) is.
  326. *
  327. * returns:
  328. * 0 - OK
  329. * 1 - write timeout
  330. * 2 - Flash not erased
  331. */
  332. static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
  333. {
  334. ulong start;
  335. int flag;
  336. FPWV *base; /* first address in flash bank */
  337. /* Check if Flash is (sufficiently) erased */
  338. if ((*dest & data) != data) {
  339. return (2);
  340. }
  341. base = (FPWV *)(info->start[0]);
  342. /* Disable interrupts which might cause a timeout here */
  343. flag = disable_interrupts();
  344. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  345. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  346. base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
  347. *dest = data; /* start programming the data */
  348. /* re-enable interrupts if necessary */
  349. if (flag)
  350. enable_interrupts();
  351. start = get_timer (0);
  352. /* data polling for D7 */
  353. while ((*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
  354. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  355. *dest = (FPW)0x00F000F0; /* reset bank */
  356. return (1);
  357. }
  358. }
  359. return (0);
  360. }