tasreg.c 9.2 KB

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  1. /*
  2. * (C) Copyright 2004
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <command.h>
  25. #include <malloc.h>
  26. #include <asm/m5249.h>
  27. /* Prototypes */
  28. int gunzip(void *, int, unsigned char *, unsigned long *);
  29. int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
  30. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
  31. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
  32. #if 0
  33. #define FPGA_DEBUG
  34. #endif
  35. /* predefine these here for FPGA programming (before including fpga.c) */
  36. #define SET_FPGA(data) mbar2_writeLong(MCFSIM_GPIO1_OUT, data)
  37. #define FPGA_DONE_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CFG_FPGA_DONE)
  38. #define FPGA_INIT_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CFG_FPGA_INIT)
  39. #define FPGA_PROG_ACTIVE_HIGH /* on this platform is PROG active high! */
  40. #define out32(a,b) /* nothing to do (gpio already configured) */
  41. /* fpga configuration data - generated by bin2cc */
  42. const unsigned char fpgadata[] =
  43. {
  44. #include "fpgadata.c"
  45. };
  46. /*
  47. * include common fpga code (for esd boards)
  48. */
  49. #include "../common/fpga.c"
  50. int checkboard (void) {
  51. ulong val;
  52. uchar val8;
  53. puts ("Board: ");
  54. puts("esd TASREG");
  55. val8 = ((uchar)~((uchar)mbar2_readLong(MCFSIM_GPIO1_READ) >> 4)) & 0xf;
  56. printf(" (Switch=%1X)\n", val8);
  57. /*
  58. * Set LED on
  59. */
  60. val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CFG_GPIO1_LED;
  61. mbar2_writeLong(MCFSIM_GPIO1_OUT, val); /* Set LED on */
  62. return 0;
  63. };
  64. long int initdram (int board_type) {
  65. unsigned long junk = 0xa5a59696;
  66. /*
  67. * Note:
  68. * RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1
  69. */
  70. #ifdef CFG_FAST_CLK
  71. /*
  72. * Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K)
  73. * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39
  74. */
  75. mbar_writeShort(MCFSIM_DCR, 0x8239);
  76. #elif CFG_PLL_BYPASS
  77. /*
  78. * Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K)
  79. * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02
  80. */
  81. mbar_writeShort(MCFSIM_DCR, 0x8202);
  82. #else
  83. /*
  84. * Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K)
  85. * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles)
  86. */
  87. mbar_writeShort(MCFSIM_DCR, 0x8222);
  88. #endif
  89. /*
  90. * SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port),
  91. * PM=1 (continuous page mode)
  92. */
  93. /* RE=0 (keep auto-refresh disabled while setting up registers) */
  94. mbar_writeLong(MCFSIM_DACR0, 0x00003324);
  95. /* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */
  96. mbar_writeLong(MCFSIM_DMR0, 0x01fc0001);
  97. /** Precharge sequence **/
  98. mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */
  99. *((volatile unsigned long *) 0x00) = junk; /* write to a memory location to init. precharge */
  100. udelay(0x10); /* Allow several Precharge cycles */
  101. /** Refresh Sequence **/
  102. mbar_writeLong(MCFSIM_DACR0, 0x0000b324); /* Enable the refresh bit, DACR0[RE] (bit 15) */
  103. udelay(0x7d0); /* Allow gobs of refresh cycles */
  104. /** Mode Register initialization **/
  105. mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
  106. *((volatile unsigned long *) 0x800) = junk; /* Access RAM to initialize the mode register */
  107. return CFG_SDRAM_SIZE * 1024 * 1024;
  108. };
  109. int testdram (void) {
  110. /* TODO: XXX XXX XXX */
  111. printf ("DRAM test not implemented!\n");
  112. return (0);
  113. }
  114. int misc_init_r (void)
  115. {
  116. unsigned char *dst;
  117. ulong len = sizeof(fpgadata);
  118. int status;
  119. int index;
  120. int i;
  121. uchar buf[8];
  122. dst = malloc(CFG_FPGA_MAX_SIZE);
  123. if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
  124. printf ("GUNZIP ERROR - must RESET board to recover\n");
  125. do_reset (NULL, 0, 0, NULL);
  126. }
  127. status = fpga_boot(dst, len);
  128. if (status != 0) {
  129. printf("\nFPGA: Booting failed ");
  130. switch (status) {
  131. case ERROR_FPGA_PRG_INIT_LOW:
  132. printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
  133. break;
  134. case ERROR_FPGA_PRG_INIT_HIGH:
  135. printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
  136. break;
  137. case ERROR_FPGA_PRG_DONE:
  138. printf("(Timeout: DONE not high after programming FPGA)\n ");
  139. break;
  140. }
  141. /* display infos on fpgaimage */
  142. index = 15;
  143. for (i=0; i<4; i++) {
  144. len = dst[index];
  145. printf("FPGA: %s\n", &(dst[index+1]));
  146. index += len+3;
  147. }
  148. putc ('\n');
  149. /* delayed reboot */
  150. for (i=20; i>0; i--) {
  151. printf("Rebooting in %2d seconds \r",i);
  152. for (index=0;index<1000;index++)
  153. udelay(1000);
  154. }
  155. putc ('\n');
  156. do_reset(NULL, 0, 0, NULL);
  157. }
  158. puts("FPGA: ");
  159. /* display infos on fpgaimage */
  160. index = 15;
  161. for (i=0; i<4; i++) {
  162. len = dst[index];
  163. printf("%s ", &(dst[index+1]));
  164. index += len+3;
  165. }
  166. putc ('\n');
  167. free(dst);
  168. /*
  169. *
  170. */
  171. buf[0] = 0x00;
  172. buf[1] = 0x32;
  173. buf[2] = 0x3f;
  174. i2c_write(0x38, 0, 0, buf, 3);
  175. return (0);
  176. }
  177. #if 1 /* test-only: board specific test commands */
  178. int i2c_probe(uchar addr);
  179. /*
  180. */
  181. int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  182. {
  183. ulong addr;
  184. if (argc < 2) {
  185. puts("ERROR!\n");
  186. return -1;
  187. }
  188. addr = simple_strtol (argv[1], NULL, 16);
  189. printf("iprobe looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
  190. for (;;) {
  191. i2c_probe(addr);
  192. /* Abort if ctrl-c was pressed */
  193. if (ctrlc()) {
  194. puts("\nAbort\n");
  195. return 0;
  196. }
  197. udelay(1000);
  198. }
  199. return 0;
  200. }
  201. U_BOOT_CMD(
  202. iploop, 2, 1, do_iploop,
  203. "iploop - iprobe loop <addr>\n",
  204. NULL
  205. );
  206. /*
  207. */
  208. int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  209. {
  210. uchar buf[8];
  211. *(volatile ushort *)0xe0000000 = 0x4000;
  212. udelay(5000); /* wait for 5ms */
  213. buf[0] = 0x10;
  214. buf[1] = 0x07;
  215. buf[2] = 0x03;
  216. i2c_write(0x10, 0, 0, buf, 3);
  217. buf[0] = 0x10;
  218. buf[1] = 0x01;
  219. buf[2] = 0x80;
  220. i2c_write(0x10, 0, 0, buf, 3);
  221. buf[0] = 0x10;
  222. buf[1] = 0x02;
  223. buf[2] = 0x03;
  224. i2c_write(0x10, 0, 0, buf, 3);
  225. buf[0] = 0x10;
  226. buf[1] = 0x03;
  227. buf[2] = 0x29;
  228. i2c_write(0x10, 0, 0, buf, 3);
  229. buf[0] = 0x10;
  230. buf[1] = 0x04;
  231. buf[2] = 0x00;
  232. i2c_write(0x10, 0, 0, buf, 3);
  233. buf[0] = 0x10;
  234. buf[1] = 0x05;
  235. buf[2] = 0x00;
  236. i2c_write(0x10, 0, 0, buf, 3);
  237. buf[0] = 0x10;
  238. buf[1] = 0x07;
  239. buf[2] = 0x02;
  240. i2c_write(0x10, 0, 0, buf, 3);
  241. return 0;
  242. }
  243. U_BOOT_CMD(
  244. codec, 1, 1, do_codec,
  245. "codec - Enable codec\n",
  246. NULL
  247. );
  248. /*
  249. */
  250. int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  251. {
  252. ulong addr;
  253. ulong instr;
  254. ulong cntrl;
  255. ulong data;
  256. uchar buf[8];
  257. if (argc < 5) {
  258. puts("ERROR!\n");
  259. return -1;
  260. }
  261. addr = simple_strtol (argv[1], NULL, 16);
  262. instr = simple_strtol (argv[2], NULL, 16);
  263. cntrl = simple_strtol (argv[3], NULL, 16);
  264. data = simple_strtol (argv[4], NULL, 16);
  265. buf[0] = (uchar)instr;
  266. buf[1] = (uchar)cntrl;
  267. buf[2] = (uchar)data;
  268. i2c_write(addr, 0, 0, buf, 3);
  269. return 0;
  270. }
  271. U_BOOT_CMD(
  272. saa, 5, 1, do_saa,
  273. "saa - Write to SAA1064 <addr> <instr> <cntrl> <data>\n",
  274. NULL
  275. );
  276. /*
  277. */
  278. int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  279. {
  280. ulong addr;
  281. ulong data0;
  282. ulong data1;
  283. ulong data2;
  284. ulong data3;
  285. uchar buf[8];
  286. int cnt;
  287. if (argc < 3) {
  288. puts("ERROR!\n");
  289. return -1;
  290. }
  291. addr = simple_strtol (argv[1], NULL, 16);
  292. cnt = simple_strtol (argv[2], NULL, 16);
  293. data0 = simple_strtol (argv[3], NULL, 16);
  294. data1 = simple_strtol (argv[4], NULL, 16);
  295. data2 = simple_strtol (argv[5], NULL, 16);
  296. data3 = simple_strtol (argv[6], NULL, 16);
  297. printf("Writing %d bytes to device %lx!\n", cnt, addr);
  298. buf[0] = (uchar)data0;
  299. buf[1] = (uchar)data1;
  300. buf[2] = (uchar)data2;
  301. buf[3] = (uchar)data3;
  302. i2c_write(addr, 0, 0, buf, cnt);
  303. return 0;
  304. }
  305. U_BOOT_CMD(
  306. iwrite, 6, 1, do_iwrite,
  307. "iwrite - Write n bytes to I2C-device\n",
  308. "addr cnt data0 ... datan\n"
  309. );
  310. /*
  311. */
  312. int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  313. {
  314. ulong addr;
  315. ulong cnt;
  316. uchar buf[32];
  317. int i;
  318. if (argc < 3) {
  319. puts("ERROR!\n");
  320. return -1;
  321. }
  322. addr = simple_strtol (argv[1], NULL, 16);
  323. cnt = simple_strtol (argv[2], NULL, 16);
  324. i2c_read(addr, 0, 0, buf, cnt);
  325. printf("I2C Data:");
  326. for (i=0; i<cnt; i++) {
  327. printf(" %02X", buf[i]);
  328. }
  329. printf("\n");
  330. return 0;
  331. }
  332. U_BOOT_CMD(
  333. iread, 3, 1, do_iread,
  334. "iread - Read from I2C <addr> <cnt>\n",
  335. NULL
  336. );
  337. /*
  338. */
  339. int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  340. {
  341. ulong addr;
  342. uchar buf[32];
  343. int cnt;
  344. if (argc < 2) {
  345. puts("ERROR!\n");
  346. return -1;
  347. }
  348. addr = simple_strtol (argv[1], NULL, 16);
  349. cnt = 1;
  350. printf("iread looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
  351. for (;;) {
  352. i2c_read(addr, 0, 0, buf, cnt);
  353. /* Abort if ctrl-c was pressed */
  354. if (ctrlc()) {
  355. puts("\nAbort\n");
  356. return 0;
  357. }
  358. udelay(3000);
  359. }
  360. return 0;
  361. }
  362. U_BOOT_CMD(
  363. ireadl, 2, 1, do_ireadl,
  364. "ireadl - Read-loop from I2C <addr>\n",
  365. NULL
  366. );
  367. #endif