colibri_pxa270.c 2.6 KB

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  1. /*
  2. * Toradex Colibri PXA270 Support
  3. *
  4. * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation; either version 2 of
  9. * the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19. * MA 02111-1307 USA
  20. */
  21. #include <common.h>
  22. #include <asm/arch/hardware.h>
  23. #include <asm/arch/regs-mmc.h>
  24. #include <asm/arch/pxa.h>
  25. #include <netdev.h>
  26. #include <asm/io.h>
  27. #include <serial.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. struct serial_device *default_serial_console(void)
  30. {
  31. return &serial_ffuart_device;
  32. }
  33. int board_init(void)
  34. {
  35. /* We have RAM, disable cache */
  36. dcache_disable();
  37. icache_disable();
  38. /* arch number of vpac270 */
  39. gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
  40. /* adress of boot parameters */
  41. gd->bd->bi_boot_params = 0xa0000100;
  42. return 0;
  43. }
  44. int dram_init(void)
  45. {
  46. pxa2xx_dram_init();
  47. gd->ram_size = PHYS_SDRAM_1_SIZE;
  48. return 0;
  49. }
  50. #ifdef CONFIG_CMD_USB
  51. int usb_board_init(void)
  52. {
  53. writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
  54. ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
  55. UHCHR);
  56. writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
  57. while (UHCHR & UHCHR_FSBIR)
  58. ;
  59. writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
  60. writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
  61. /* Clear any OTG Pin Hold */
  62. if (readl(PSSR) & PSSR_OTGPH)
  63. writel(readl(PSSR) | PSSR_OTGPH, PSSR);
  64. writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
  65. writel(readl(UHCRHDA) | 0x100, UHCRHDA);
  66. /* Set port power control mask bits, only 3 ports. */
  67. writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
  68. /* enable port 2 */
  69. writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
  70. UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
  71. return 0;
  72. }
  73. void usb_board_init_fail(void)
  74. {
  75. return;
  76. }
  77. void usb_board_stop(void)
  78. {
  79. writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
  80. udelay(11);
  81. writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
  82. writel(readl(UHCCOMS) | 1, UHCCOMS);
  83. udelay(10);
  84. writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
  85. return;
  86. }
  87. #endif
  88. #ifdef CONFIG_DRIVER_DM9000
  89. int board_eth_init(bd_t *bis)
  90. {
  91. return dm9000_initialize(bis);
  92. }
  93. #endif
  94. #ifdef CONFIG_CMD_MMC
  95. int board_mmc_init(bd_t *bis)
  96. {
  97. pxa_mmc_register(0);
  98. return 0;
  99. }
  100. #endif