pci405.c 6.1 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/processor.h>
  25. #include <command.h>
  26. #include <malloc.h>
  27. #include <pci.h>
  28. #include <405gp_pci.h>
  29. #include "pci405.h"
  30. /* ------------------------------------------------------------------------- */
  31. extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);/*cmd_boot.c*/
  32. #if 0
  33. #define FPGA_DEBUG
  34. #endif
  35. /* fpga configuration data - generated by bin2cc */
  36. const unsigned char fpgadata[] =
  37. {
  38. #include "fpgadata.c"
  39. };
  40. /*
  41. * include common fpga code (for esd boards)
  42. */
  43. #include "../common/fpga.c"
  44. /* Prototypes */
  45. int gunzip(void *, int, unsigned char *, unsigned long *);
  46. int board_early_init_f (void)
  47. {
  48. unsigned long cntrl0Reg;
  49. /*
  50. * IRQ 0-15 405GP internally generated; active high; level sensitive
  51. * IRQ 16 405GP internally generated; active low; level sensitive
  52. * IRQ 17-24 RESERVED
  53. * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  54. * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
  55. * IRQ 27 (EXT IRQ 2) CAN2; active low; level sensitive
  56. * IRQ 28 (EXT IRQ 3) CAN3; active low; level sensitive
  57. * IRQ 29 (EXT IRQ 4) unused; active low; level sensitive
  58. * IRQ 30 (EXT IRQ 5) FPGA Timestamp; active low; level sensitive
  59. * IRQ 31 (EXT IRQ 6) PCI Reset; active low; level sensitive
  60. */
  61. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  62. mtdcr(uicer, 0x00000000); /* disable all ints */
  63. mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
  64. mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
  65. mtdcr(uictr, 0x10000000); /* set int trigger levels */
  66. mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
  67. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  68. /*
  69. * Setup GPIO pins (IRQ4/GPIO21 as GPIO)
  70. */
  71. cntrl0Reg = mfdcr(cntrl0);
  72. mtdcr(cntrl0, cntrl0Reg | 0x00008000);
  73. /*
  74. * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 25 us
  75. */
  76. mtebc (epcr, 0xa8400000); /* ebc always driven */
  77. return 0;
  78. }
  79. /* ------------------------------------------------------------------------- */
  80. int misc_init_f (void)
  81. {
  82. return 0; /* dummy implementation */
  83. }
  84. int misc_init_r (void)
  85. {
  86. unsigned char *dst;
  87. ulong len = sizeof(fpgadata);
  88. int status;
  89. int index;
  90. int i;
  91. unsigned int *ptr;
  92. unsigned int *magic;
  93. /*
  94. * On PCI-405 the environment is saved in eeprom!
  95. * FPGA can be gzip compressed (malloc) and booted this late.
  96. */
  97. dst = malloc(CFG_FPGA_MAX_SIZE);
  98. if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
  99. printf ("GUNZIP ERROR - must RESET board to recover\n");
  100. do_reset (NULL, 0, 0, NULL);
  101. }
  102. status = fpga_boot(dst, len);
  103. if (status != 0) {
  104. printf("\nFPGA: Booting failed ");
  105. switch (status) {
  106. case ERROR_FPGA_PRG_INIT_LOW:
  107. printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
  108. break;
  109. case ERROR_FPGA_PRG_INIT_HIGH:
  110. printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
  111. break;
  112. case ERROR_FPGA_PRG_DONE:
  113. printf("(Timeout: DONE not high after programming FPGA)\n ");
  114. break;
  115. }
  116. /* display infos on fpgaimage */
  117. index = 15;
  118. for (i=0; i<4; i++) {
  119. len = dst[index];
  120. printf("FPGA: %s\n", &(dst[index+1]));
  121. index += len+3;
  122. }
  123. putc ('\n');
  124. /* delayed reboot */
  125. for (i=20; i>0; i--) {
  126. printf("Rebooting in %2d seconds \r",i);
  127. for (index=0;index<1000;index++)
  128. udelay(1000);
  129. }
  130. putc ('\n');
  131. do_reset(NULL, 0, 0, NULL);
  132. }
  133. puts("FPGA: ");
  134. /* display infos on fpgaimage */
  135. index = 15;
  136. for (i=0; i<4; i++) {
  137. len = dst[index];
  138. printf("%s ", &(dst[index+1]));
  139. index += len+3;
  140. }
  141. putc ('\n');
  142. /*
  143. * Reset FPGA via FPGA_DATA pin
  144. */
  145. SET_FPGA(FPGA_PRG | FPGA_CLK);
  146. udelay(1000); /* wait 1ms */
  147. SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
  148. udelay(1000); /* wait 1ms */
  149. /*
  150. * Check if magic for pci reconfig is written
  151. */
  152. magic = (unsigned int *)0x00000004;
  153. if (*magic == PCI_RECONFIG_MAGIC) {
  154. /*
  155. * Rewrite pci config regs (only after soft-reset with magic set)
  156. */
  157. ptr = (unsigned int *)PCI_REGS_ADDR;
  158. if (crc32(0, (char *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4) == *ptr) {
  159. puts("Restoring PCI Configurations Regs!\n");
  160. ptr = (unsigned int *)PCI_REGS_ADDR + 1;
  161. for (i=0; i<0x40; i+=4) {
  162. pci_write_config_dword(PCIDEVID_405GP, i, *ptr++);
  163. }
  164. }
  165. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  166. *magic = 0; /* clear pci reconfig magic again */
  167. }
  168. free(dst);
  169. return (0);
  170. }
  171. /*
  172. * Check Board Identity:
  173. */
  174. int checkboard (void)
  175. {
  176. unsigned char str[64];
  177. int i = getenv_r ("serial#", str, sizeof(str));
  178. puts ("Board: ");
  179. if (i == -1) {
  180. puts ("### No HW ID - assuming PCI405");
  181. } else {
  182. puts (str);
  183. }
  184. putc ('\n');
  185. return 0;
  186. }
  187. /* ------------------------------------------------------------------------- */
  188. long int initdram (int board_type)
  189. {
  190. unsigned long val;
  191. mtdcr(memcfga, mem_mb0cf);
  192. val = mfdcr(memcfgd);
  193. #if 0
  194. printf("\nmb0cf=%x\n", val); /* test-only */
  195. printf("strap=%x\n", mfdcr(strap)); /* test-only */
  196. #endif
  197. #if 0 /* test-only: all PCI405 version must report 16mb */
  198. return (4*1024*1024 << ((val & 0x000e0000) >> 17));
  199. #else
  200. return (16*1024*1024);
  201. #endif
  202. }
  203. /* ------------------------------------------------------------------------- */
  204. int testdram (void)
  205. {
  206. /* TODO: XXX XXX XXX */
  207. printf ("test: 16 MB - ok\n");
  208. return (0);
  209. }
  210. /* ------------------------------------------------------------------------- */