cfi_flash.c 55 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. #include <mtd/cfi_flash.h>
  41. /*
  42. * This file implements a Common Flash Interface (CFI) driver for
  43. * U-Boot.
  44. *
  45. * The width of the port and the width of the chips are determined at
  46. * initialization. These widths are used to calculate the address for
  47. * access CFI data structures.
  48. *
  49. * References
  50. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  51. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  52. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  53. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  54. * AMD CFI Specification, Release 2.0 December 1, 2001
  55. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  56. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  57. *
  58. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  59. * reading and writing ... (yes there is such a Hardware).
  60. */
  61. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  62. static uint flash_verbose = 1;
  63. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  64. /*
  65. * Check if chip width is defined. If not, start detecting with 8bit.
  66. */
  67. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  68. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  69. #endif
  70. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  71. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  72. #endif
  73. static phys_addr_t __cfi_flash_bank_addr(int i)
  74. {
  75. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  76. }
  77. phys_addr_t cfi_flash_bank_addr(int i)
  78. __attribute__((weak, alias("__cfi_flash_bank_addr")));
  79. static unsigned long __cfi_flash_bank_size(int i)
  80. {
  81. #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
  82. return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
  83. #else
  84. return 0;
  85. #endif
  86. }
  87. unsigned long cfi_flash_bank_size(int i)
  88. __attribute__((weak, alias("__cfi_flash_bank_size")));
  89. static void __flash_write8(u8 value, void *addr)
  90. {
  91. __raw_writeb(value, addr);
  92. }
  93. static void __flash_write16(u16 value, void *addr)
  94. {
  95. __raw_writew(value, addr);
  96. }
  97. static void __flash_write32(u32 value, void *addr)
  98. {
  99. __raw_writel(value, addr);
  100. }
  101. static void __flash_write64(u64 value, void *addr)
  102. {
  103. /* No architectures currently implement __raw_writeq() */
  104. *(volatile u64 *)addr = value;
  105. }
  106. static u8 __flash_read8(void *addr)
  107. {
  108. return __raw_readb(addr);
  109. }
  110. static u16 __flash_read16(void *addr)
  111. {
  112. return __raw_readw(addr);
  113. }
  114. static u32 __flash_read32(void *addr)
  115. {
  116. return __raw_readl(addr);
  117. }
  118. static u64 __flash_read64(void *addr)
  119. {
  120. /* No architectures currently implement __raw_readq() */
  121. return *(volatile u64 *)addr;
  122. }
  123. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  124. void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
  125. void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
  126. void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
  127. void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
  128. u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
  129. u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
  130. u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
  131. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  132. #else
  133. #define flash_write8 __flash_write8
  134. #define flash_write16 __flash_write16
  135. #define flash_write32 __flash_write32
  136. #define flash_write64 __flash_write64
  137. #define flash_read8 __flash_read8
  138. #define flash_read16 __flash_read16
  139. #define flash_read32 __flash_read32
  140. #define flash_read64 __flash_read64
  141. #endif
  142. /*-----------------------------------------------------------------------
  143. */
  144. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  145. flash_info_t *flash_get_info(ulong base)
  146. {
  147. int i;
  148. flash_info_t *info = NULL;
  149. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  150. info = & flash_info[i];
  151. if (info->size && info->start[0] <= base &&
  152. base <= info->start[0] + info->size - 1)
  153. break;
  154. }
  155. return info;
  156. }
  157. #endif
  158. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  159. {
  160. if (sect != (info->sector_count - 1))
  161. return info->start[sect + 1] - info->start[sect];
  162. else
  163. return info->start[0] + info->size - info->start[sect];
  164. }
  165. /*-----------------------------------------------------------------------
  166. * create an address based on the offset and the port width
  167. */
  168. static inline void *
  169. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  170. {
  171. unsigned int byte_offset = offset * info->portwidth;
  172. return (void *)(info->start[sect] + byte_offset);
  173. }
  174. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  175. unsigned int offset, void *addr)
  176. {
  177. }
  178. /*-----------------------------------------------------------------------
  179. * make a proper sized command based on the port and chip widths
  180. */
  181. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  182. {
  183. int i;
  184. int cword_offset;
  185. int cp_offset;
  186. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  187. u32 cmd_le = cpu_to_le32(cmd);
  188. #endif
  189. uchar val;
  190. uchar *cp = (uchar *) cmdbuf;
  191. for (i = info->portwidth; i > 0; i--){
  192. cword_offset = (info->portwidth-i)%info->chipwidth;
  193. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  194. cp_offset = info->portwidth - i;
  195. val = *((uchar*)&cmd_le + cword_offset);
  196. #else
  197. cp_offset = i - 1;
  198. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  199. #endif
  200. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  201. }
  202. }
  203. #ifdef DEBUG
  204. /*-----------------------------------------------------------------------
  205. * Debug support
  206. */
  207. static void print_longlong (char *str, unsigned long long data)
  208. {
  209. int i;
  210. char *cp;
  211. cp = (char *) &data;
  212. for (i = 0; i < 8; i++)
  213. sprintf (&str[i * 2], "%2.2x", *cp++);
  214. }
  215. static void flash_printqry (struct cfi_qry *qry)
  216. {
  217. u8 *p = (u8 *)qry;
  218. int x, y;
  219. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  220. debug("%02x : ", x);
  221. for (y = 0; y < 16; y++)
  222. debug("%2.2x ", p[x + y]);
  223. debug(" ");
  224. for (y = 0; y < 16; y++) {
  225. unsigned char c = p[x + y];
  226. if (c >= 0x20 && c <= 0x7e)
  227. debug("%c", c);
  228. else
  229. debug(".");
  230. }
  231. debug("\n");
  232. }
  233. }
  234. #endif
  235. /*-----------------------------------------------------------------------
  236. * read a character at a port width address
  237. */
  238. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  239. {
  240. uchar *cp;
  241. uchar retval;
  242. cp = flash_map (info, 0, offset);
  243. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  244. retval = flash_read8(cp);
  245. #else
  246. retval = flash_read8(cp + info->portwidth - 1);
  247. #endif
  248. flash_unmap (info, 0, offset, cp);
  249. return retval;
  250. }
  251. /*-----------------------------------------------------------------------
  252. * read a word at a port width address, assume 16bit bus
  253. */
  254. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  255. {
  256. ushort *addr, retval;
  257. addr = flash_map (info, 0, offset);
  258. retval = flash_read16 (addr);
  259. flash_unmap (info, 0, offset, addr);
  260. return retval;
  261. }
  262. /*-----------------------------------------------------------------------
  263. * read a long word by picking the least significant byte of each maximum
  264. * port size word. Swap for ppc format.
  265. */
  266. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  267. uint offset)
  268. {
  269. uchar *addr;
  270. ulong retval;
  271. #ifdef DEBUG
  272. int x;
  273. #endif
  274. addr = flash_map (info, sect, offset);
  275. #ifdef DEBUG
  276. debug ("long addr is at %p info->portwidth = %d\n", addr,
  277. info->portwidth);
  278. for (x = 0; x < 4 * info->portwidth; x++) {
  279. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  280. }
  281. #endif
  282. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  283. retval = ((flash_read8(addr) << 16) |
  284. (flash_read8(addr + info->portwidth) << 24) |
  285. (flash_read8(addr + 2 * info->portwidth)) |
  286. (flash_read8(addr + 3 * info->portwidth) << 8));
  287. #else
  288. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  289. (flash_read8(addr + info->portwidth - 1) << 16) |
  290. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  291. (flash_read8(addr + 3 * info->portwidth - 1)));
  292. #endif
  293. flash_unmap(info, sect, offset, addr);
  294. return retval;
  295. }
  296. /*
  297. * Write a proper sized command to the correct address
  298. */
  299. void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  300. uint offset, u32 cmd)
  301. {
  302. void *addr;
  303. cfiword_t cword;
  304. addr = flash_map (info, sect, offset);
  305. flash_make_cmd (info, cmd, &cword);
  306. switch (info->portwidth) {
  307. case FLASH_CFI_8BIT:
  308. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  309. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  310. flash_write8(cword.c, addr);
  311. break;
  312. case FLASH_CFI_16BIT:
  313. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  314. cmd, cword.w,
  315. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  316. flash_write16(cword.w, addr);
  317. break;
  318. case FLASH_CFI_32BIT:
  319. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  320. cmd, cword.l,
  321. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  322. flash_write32(cword.l, addr);
  323. break;
  324. case FLASH_CFI_64BIT:
  325. #ifdef DEBUG
  326. {
  327. char str[20];
  328. print_longlong (str, cword.ll);
  329. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  330. addr, cmd, str,
  331. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  332. }
  333. #endif
  334. flash_write64(cword.ll, addr);
  335. break;
  336. }
  337. /* Ensure all the instructions are fully finished */
  338. sync();
  339. flash_unmap(info, sect, offset, addr);
  340. }
  341. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  342. {
  343. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  344. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  345. }
  346. /*-----------------------------------------------------------------------
  347. */
  348. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  349. uint offset, uchar cmd)
  350. {
  351. void *addr;
  352. cfiword_t cword;
  353. int retval;
  354. addr = flash_map (info, sect, offset);
  355. flash_make_cmd (info, cmd, &cword);
  356. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  357. switch (info->portwidth) {
  358. case FLASH_CFI_8BIT:
  359. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  360. retval = (flash_read8(addr) == cword.c);
  361. break;
  362. case FLASH_CFI_16BIT:
  363. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  364. retval = (flash_read16(addr) == cword.w);
  365. break;
  366. case FLASH_CFI_32BIT:
  367. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  368. retval = (flash_read32(addr) == cword.l);
  369. break;
  370. case FLASH_CFI_64BIT:
  371. #ifdef DEBUG
  372. {
  373. char str1[20];
  374. char str2[20];
  375. print_longlong (str1, flash_read64(addr));
  376. print_longlong (str2, cword.ll);
  377. debug ("is= %s %s\n", str1, str2);
  378. }
  379. #endif
  380. retval = (flash_read64(addr) == cword.ll);
  381. break;
  382. default:
  383. retval = 0;
  384. break;
  385. }
  386. flash_unmap(info, sect, offset, addr);
  387. return retval;
  388. }
  389. /*-----------------------------------------------------------------------
  390. */
  391. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  392. uint offset, uchar cmd)
  393. {
  394. void *addr;
  395. cfiword_t cword;
  396. int retval;
  397. addr = flash_map (info, sect, offset);
  398. flash_make_cmd (info, cmd, &cword);
  399. switch (info->portwidth) {
  400. case FLASH_CFI_8BIT:
  401. retval = ((flash_read8(addr) & cword.c) == cword.c);
  402. break;
  403. case FLASH_CFI_16BIT:
  404. retval = ((flash_read16(addr) & cword.w) == cword.w);
  405. break;
  406. case FLASH_CFI_32BIT:
  407. retval = ((flash_read32(addr) & cword.l) == cword.l);
  408. break;
  409. case FLASH_CFI_64BIT:
  410. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  411. break;
  412. default:
  413. retval = 0;
  414. break;
  415. }
  416. flash_unmap(info, sect, offset, addr);
  417. return retval;
  418. }
  419. /*-----------------------------------------------------------------------
  420. */
  421. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  422. uint offset, uchar cmd)
  423. {
  424. void *addr;
  425. cfiword_t cword;
  426. int retval;
  427. addr = flash_map (info, sect, offset);
  428. flash_make_cmd (info, cmd, &cword);
  429. switch (info->portwidth) {
  430. case FLASH_CFI_8BIT:
  431. retval = flash_read8(addr) != flash_read8(addr);
  432. break;
  433. case FLASH_CFI_16BIT:
  434. retval = flash_read16(addr) != flash_read16(addr);
  435. break;
  436. case FLASH_CFI_32BIT:
  437. retval = flash_read32(addr) != flash_read32(addr);
  438. break;
  439. case FLASH_CFI_64BIT:
  440. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  441. (flash_read32(addr+4) != flash_read32(addr+4)) );
  442. break;
  443. default:
  444. retval = 0;
  445. break;
  446. }
  447. flash_unmap(info, sect, offset, addr);
  448. return retval;
  449. }
  450. /*
  451. * flash_is_busy - check to see if the flash is busy
  452. *
  453. * This routine checks the status of the chip and returns true if the
  454. * chip is busy.
  455. */
  456. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  457. {
  458. int retval;
  459. switch (info->vendor) {
  460. case CFI_CMDSET_INTEL_PROG_REGIONS:
  461. case CFI_CMDSET_INTEL_STANDARD:
  462. case CFI_CMDSET_INTEL_EXTENDED:
  463. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  464. break;
  465. case CFI_CMDSET_AMD_STANDARD:
  466. case CFI_CMDSET_AMD_EXTENDED:
  467. #ifdef CONFIG_FLASH_CFI_LEGACY
  468. case CFI_CMDSET_AMD_LEGACY:
  469. #endif
  470. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  471. break;
  472. default:
  473. retval = 0;
  474. }
  475. debug ("flash_is_busy: %d\n", retval);
  476. return retval;
  477. }
  478. /*-----------------------------------------------------------------------
  479. * wait for XSR.7 to be set. Time out with an error if it does not.
  480. * This routine does not set the flash to read-array mode.
  481. */
  482. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  483. ulong tout, char *prompt)
  484. {
  485. ulong start;
  486. #if CONFIG_SYS_HZ != 1000
  487. if ((ulong)CONFIG_SYS_HZ > 100000)
  488. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  489. else
  490. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  491. #endif
  492. /* Wait for command completion */
  493. reset_timer();
  494. start = get_timer (0);
  495. while (flash_is_busy (info, sector)) {
  496. if (get_timer (start) > tout) {
  497. printf ("Flash %s timeout at address %lx data %lx\n",
  498. prompt, info->start[sector],
  499. flash_read_long (info, sector, 0));
  500. flash_write_cmd (info, sector, 0, info->cmd_reset);
  501. return ERR_TIMOUT;
  502. }
  503. udelay (1); /* also triggers watchdog */
  504. }
  505. return ERR_OK;
  506. }
  507. /*-----------------------------------------------------------------------
  508. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  509. * do a full status check.
  510. *
  511. * This routine sets the flash to read-array mode.
  512. */
  513. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  514. ulong tout, char *prompt)
  515. {
  516. int retcode;
  517. retcode = flash_status_check (info, sector, tout, prompt);
  518. switch (info->vendor) {
  519. case CFI_CMDSET_INTEL_PROG_REGIONS:
  520. case CFI_CMDSET_INTEL_EXTENDED:
  521. case CFI_CMDSET_INTEL_STANDARD:
  522. if ((retcode != ERR_OK)
  523. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  524. retcode = ERR_INVAL;
  525. printf ("Flash %s error at address %lx\n", prompt,
  526. info->start[sector]);
  527. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  528. FLASH_STATUS_PSLBS)) {
  529. puts ("Command Sequence Error.\n");
  530. } else if (flash_isset (info, sector, 0,
  531. FLASH_STATUS_ECLBS)) {
  532. puts ("Block Erase Error.\n");
  533. retcode = ERR_NOT_ERASED;
  534. } else if (flash_isset (info, sector, 0,
  535. FLASH_STATUS_PSLBS)) {
  536. puts ("Locking Error\n");
  537. }
  538. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  539. puts ("Block locked.\n");
  540. retcode = ERR_PROTECTED;
  541. }
  542. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  543. puts ("Vpp Low Error.\n");
  544. }
  545. flash_write_cmd (info, sector, 0, info->cmd_reset);
  546. break;
  547. default:
  548. break;
  549. }
  550. return retcode;
  551. }
  552. static int use_flash_status_poll(flash_info_t *info)
  553. {
  554. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  555. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  556. info->vendor == CFI_CMDSET_AMD_STANDARD)
  557. return 1;
  558. #endif
  559. return 0;
  560. }
  561. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  562. ulong tout, char *prompt)
  563. {
  564. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  565. ulong start;
  566. int ready;
  567. #if CONFIG_SYS_HZ != 1000
  568. if ((ulong)CONFIG_SYS_HZ > 100000)
  569. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  570. else
  571. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  572. #endif
  573. /* Wait for command completion */
  574. reset_timer();
  575. start = get_timer(0);
  576. while (1) {
  577. switch (info->portwidth) {
  578. case FLASH_CFI_8BIT:
  579. ready = flash_read8(dst) == flash_read8(src);
  580. break;
  581. case FLASH_CFI_16BIT:
  582. ready = flash_read16(dst) == flash_read16(src);
  583. break;
  584. case FLASH_CFI_32BIT:
  585. ready = flash_read32(dst) == flash_read32(src);
  586. break;
  587. case FLASH_CFI_64BIT:
  588. ready = flash_read64(dst) == flash_read64(src);
  589. break;
  590. default:
  591. ready = 0;
  592. break;
  593. }
  594. if (ready)
  595. break;
  596. if (get_timer(start) > tout) {
  597. printf("Flash %s timeout at address %lx data %lx\n",
  598. prompt, (ulong)dst, (ulong)flash_read8(dst));
  599. return ERR_TIMOUT;
  600. }
  601. udelay(1); /* also triggers watchdog */
  602. }
  603. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  604. return ERR_OK;
  605. }
  606. /*-----------------------------------------------------------------------
  607. */
  608. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  609. {
  610. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  611. unsigned short w;
  612. unsigned int l;
  613. unsigned long long ll;
  614. #endif
  615. switch (info->portwidth) {
  616. case FLASH_CFI_8BIT:
  617. cword->c = c;
  618. break;
  619. case FLASH_CFI_16BIT:
  620. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  621. w = c;
  622. w <<= 8;
  623. cword->w = (cword->w >> 8) | w;
  624. #else
  625. cword->w = (cword->w << 8) | c;
  626. #endif
  627. break;
  628. case FLASH_CFI_32BIT:
  629. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  630. l = c;
  631. l <<= 24;
  632. cword->l = (cword->l >> 8) | l;
  633. #else
  634. cword->l = (cword->l << 8) | c;
  635. #endif
  636. break;
  637. case FLASH_CFI_64BIT:
  638. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  639. ll = c;
  640. ll <<= 56;
  641. cword->ll = (cword->ll >> 8) | ll;
  642. #else
  643. cword->ll = (cword->ll << 8) | c;
  644. #endif
  645. break;
  646. }
  647. }
  648. /*
  649. * Loop through the sector table starting from the previously found sector.
  650. * Searches forwards or backwards, dependent on the passed address.
  651. */
  652. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  653. {
  654. static flash_sect_t saved_sector = 0; /* previously found sector */
  655. flash_sect_t sector = saved_sector;
  656. while ((info->start[sector] < addr)
  657. && (sector < info->sector_count - 1))
  658. sector++;
  659. while ((info->start[sector] > addr) && (sector > 0))
  660. /*
  661. * also decrements the sector in case of an overshot
  662. * in the first loop
  663. */
  664. sector--;
  665. saved_sector = sector;
  666. return sector;
  667. }
  668. /*-----------------------------------------------------------------------
  669. */
  670. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  671. cfiword_t cword)
  672. {
  673. void *dstaddr = (void *)dest;
  674. int flag;
  675. flash_sect_t sect = 0;
  676. char sect_found = 0;
  677. /* Check if Flash is (sufficiently) erased */
  678. switch (info->portwidth) {
  679. case FLASH_CFI_8BIT:
  680. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  681. break;
  682. case FLASH_CFI_16BIT:
  683. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  684. break;
  685. case FLASH_CFI_32BIT:
  686. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  687. break;
  688. case FLASH_CFI_64BIT:
  689. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  690. break;
  691. default:
  692. flag = 0;
  693. break;
  694. }
  695. if (!flag)
  696. return ERR_NOT_ERASED;
  697. /* Disable interrupts which might cause a timeout here */
  698. flag = disable_interrupts ();
  699. switch (info->vendor) {
  700. case CFI_CMDSET_INTEL_PROG_REGIONS:
  701. case CFI_CMDSET_INTEL_EXTENDED:
  702. case CFI_CMDSET_INTEL_STANDARD:
  703. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  704. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  705. break;
  706. case CFI_CMDSET_AMD_EXTENDED:
  707. case CFI_CMDSET_AMD_STANDARD:
  708. sect = find_sector(info, dest);
  709. flash_unlock_seq (info, sect);
  710. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  711. sect_found = 1;
  712. break;
  713. #ifdef CONFIG_FLASH_CFI_LEGACY
  714. case CFI_CMDSET_AMD_LEGACY:
  715. sect = find_sector(info, dest);
  716. flash_unlock_seq (info, 0);
  717. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  718. sect_found = 1;
  719. break;
  720. #endif
  721. }
  722. switch (info->portwidth) {
  723. case FLASH_CFI_8BIT:
  724. flash_write8(cword.c, dstaddr);
  725. break;
  726. case FLASH_CFI_16BIT:
  727. flash_write16(cword.w, dstaddr);
  728. break;
  729. case FLASH_CFI_32BIT:
  730. flash_write32(cword.l, dstaddr);
  731. break;
  732. case FLASH_CFI_64BIT:
  733. flash_write64(cword.ll, dstaddr);
  734. break;
  735. }
  736. /* re-enable interrupts if necessary */
  737. if (flag)
  738. enable_interrupts ();
  739. if (!sect_found)
  740. sect = find_sector (info, dest);
  741. if (use_flash_status_poll(info))
  742. return flash_status_poll(info, &cword, dstaddr,
  743. info->write_tout, "write");
  744. else
  745. return flash_full_status_check(info, sect,
  746. info->write_tout, "write");
  747. }
  748. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  749. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  750. int len)
  751. {
  752. flash_sect_t sector;
  753. int cnt;
  754. int retcode;
  755. void *src = cp;
  756. void *dst = (void *)dest;
  757. void *dst2 = dst;
  758. int flag = 0;
  759. uint offset = 0;
  760. unsigned int shift;
  761. uchar write_cmd;
  762. switch (info->portwidth) {
  763. case FLASH_CFI_8BIT:
  764. shift = 0;
  765. break;
  766. case FLASH_CFI_16BIT:
  767. shift = 1;
  768. break;
  769. case FLASH_CFI_32BIT:
  770. shift = 2;
  771. break;
  772. case FLASH_CFI_64BIT:
  773. shift = 3;
  774. break;
  775. default:
  776. retcode = ERR_INVAL;
  777. goto out_unmap;
  778. }
  779. cnt = len >> shift;
  780. while ((cnt-- > 0) && (flag == 0)) {
  781. switch (info->portwidth) {
  782. case FLASH_CFI_8BIT:
  783. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  784. flash_read8(src));
  785. src += 1, dst2 += 1;
  786. break;
  787. case FLASH_CFI_16BIT:
  788. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  789. flash_read16(src));
  790. src += 2, dst2 += 2;
  791. break;
  792. case FLASH_CFI_32BIT:
  793. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  794. flash_read32(src));
  795. src += 4, dst2 += 4;
  796. break;
  797. case FLASH_CFI_64BIT:
  798. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  799. flash_read64(src));
  800. src += 8, dst2 += 8;
  801. break;
  802. }
  803. }
  804. if (!flag) {
  805. retcode = ERR_NOT_ERASED;
  806. goto out_unmap;
  807. }
  808. src = cp;
  809. sector = find_sector (info, dest);
  810. switch (info->vendor) {
  811. case CFI_CMDSET_INTEL_PROG_REGIONS:
  812. case CFI_CMDSET_INTEL_STANDARD:
  813. case CFI_CMDSET_INTEL_EXTENDED:
  814. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  815. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  816. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  817. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  818. flash_write_cmd (info, sector, 0, write_cmd);
  819. retcode = flash_status_check (info, sector,
  820. info->buffer_write_tout,
  821. "write to buffer");
  822. if (retcode == ERR_OK) {
  823. /* reduce the number of loops by the width of
  824. * the port */
  825. cnt = len >> shift;
  826. flash_write_cmd (info, sector, 0, cnt - 1);
  827. while (cnt-- > 0) {
  828. switch (info->portwidth) {
  829. case FLASH_CFI_8BIT:
  830. flash_write8(flash_read8(src), dst);
  831. src += 1, dst += 1;
  832. break;
  833. case FLASH_CFI_16BIT:
  834. flash_write16(flash_read16(src), dst);
  835. src += 2, dst += 2;
  836. break;
  837. case FLASH_CFI_32BIT:
  838. flash_write32(flash_read32(src), dst);
  839. src += 4, dst += 4;
  840. break;
  841. case FLASH_CFI_64BIT:
  842. flash_write64(flash_read64(src), dst);
  843. src += 8, dst += 8;
  844. break;
  845. default:
  846. retcode = ERR_INVAL;
  847. goto out_unmap;
  848. }
  849. }
  850. flash_write_cmd (info, sector, 0,
  851. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  852. retcode = flash_full_status_check (
  853. info, sector, info->buffer_write_tout,
  854. "buffer write");
  855. }
  856. break;
  857. case CFI_CMDSET_AMD_STANDARD:
  858. case CFI_CMDSET_AMD_EXTENDED:
  859. flash_unlock_seq(info,0);
  860. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  861. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  862. #endif
  863. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  864. cnt = len >> shift;
  865. flash_write_cmd(info, sector, offset, cnt - 1);
  866. switch (info->portwidth) {
  867. case FLASH_CFI_8BIT:
  868. while (cnt-- > 0) {
  869. flash_write8(flash_read8(src), dst);
  870. src += 1, dst += 1;
  871. }
  872. break;
  873. case FLASH_CFI_16BIT:
  874. while (cnt-- > 0) {
  875. flash_write16(flash_read16(src), dst);
  876. src += 2, dst += 2;
  877. }
  878. break;
  879. case FLASH_CFI_32BIT:
  880. while (cnt-- > 0) {
  881. flash_write32(flash_read32(src), dst);
  882. src += 4, dst += 4;
  883. }
  884. break;
  885. case FLASH_CFI_64BIT:
  886. while (cnt-- > 0) {
  887. flash_write64(flash_read64(src), dst);
  888. src += 8, dst += 8;
  889. }
  890. break;
  891. default:
  892. retcode = ERR_INVAL;
  893. goto out_unmap;
  894. }
  895. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  896. if (use_flash_status_poll(info))
  897. retcode = flash_status_poll(info, src - (1 << shift),
  898. dst - (1 << shift),
  899. info->buffer_write_tout,
  900. "buffer write");
  901. else
  902. retcode = flash_full_status_check(info, sector,
  903. info->buffer_write_tout,
  904. "buffer write");
  905. break;
  906. default:
  907. debug ("Unknown Command Set\n");
  908. retcode = ERR_INVAL;
  909. break;
  910. }
  911. out_unmap:
  912. return retcode;
  913. }
  914. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  915. /*-----------------------------------------------------------------------
  916. */
  917. int flash_erase (flash_info_t * info, int s_first, int s_last)
  918. {
  919. int rcode = 0;
  920. int prot;
  921. flash_sect_t sect;
  922. int st;
  923. if (info->flash_id != FLASH_MAN_CFI) {
  924. puts ("Can't erase unknown flash type - aborted\n");
  925. return 1;
  926. }
  927. if ((s_first < 0) || (s_first > s_last)) {
  928. puts ("- no sectors to erase\n");
  929. return 1;
  930. }
  931. prot = 0;
  932. for (sect = s_first; sect <= s_last; ++sect) {
  933. if (info->protect[sect]) {
  934. prot++;
  935. }
  936. }
  937. if (prot) {
  938. printf ("- Warning: %d protected sectors will not be erased!\n",
  939. prot);
  940. } else if (flash_verbose) {
  941. putc ('\n');
  942. }
  943. for (sect = s_first; sect <= s_last; sect++) {
  944. if (info->protect[sect] == 0) { /* not protected */
  945. switch (info->vendor) {
  946. case CFI_CMDSET_INTEL_PROG_REGIONS:
  947. case CFI_CMDSET_INTEL_STANDARD:
  948. case CFI_CMDSET_INTEL_EXTENDED:
  949. flash_write_cmd (info, sect, 0,
  950. FLASH_CMD_CLEAR_STATUS);
  951. flash_write_cmd (info, sect, 0,
  952. FLASH_CMD_BLOCK_ERASE);
  953. flash_write_cmd (info, sect, 0,
  954. FLASH_CMD_ERASE_CONFIRM);
  955. break;
  956. case CFI_CMDSET_AMD_STANDARD:
  957. case CFI_CMDSET_AMD_EXTENDED:
  958. flash_unlock_seq (info, sect);
  959. flash_write_cmd (info, sect,
  960. info->addr_unlock1,
  961. AMD_CMD_ERASE_START);
  962. flash_unlock_seq (info, sect);
  963. flash_write_cmd (info, sect, 0,
  964. AMD_CMD_ERASE_SECTOR);
  965. break;
  966. #ifdef CONFIG_FLASH_CFI_LEGACY
  967. case CFI_CMDSET_AMD_LEGACY:
  968. flash_unlock_seq (info, 0);
  969. flash_write_cmd (info, 0, info->addr_unlock1,
  970. AMD_CMD_ERASE_START);
  971. flash_unlock_seq (info, 0);
  972. flash_write_cmd (info, sect, 0,
  973. AMD_CMD_ERASE_SECTOR);
  974. break;
  975. #endif
  976. default:
  977. debug ("Unkown flash vendor %d\n",
  978. info->vendor);
  979. break;
  980. }
  981. if (use_flash_status_poll(info)) {
  982. cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
  983. void *dest;
  984. dest = flash_map(info, sect, 0);
  985. st = flash_status_poll(info, &cword, dest,
  986. info->erase_blk_tout, "erase");
  987. flash_unmap(info, sect, 0, dest);
  988. } else
  989. st = flash_full_status_check(info, sect,
  990. info->erase_blk_tout,
  991. "erase");
  992. if (st)
  993. rcode = 1;
  994. else if (flash_verbose)
  995. putc ('.');
  996. }
  997. }
  998. if (flash_verbose)
  999. puts (" done\n");
  1000. return rcode;
  1001. }
  1002. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1003. static int sector_erased(flash_info_t *info, int i)
  1004. {
  1005. int k;
  1006. int size;
  1007. volatile unsigned long *flash;
  1008. /*
  1009. * Check if whole sector is erased
  1010. */
  1011. size = flash_sector_size(info, i);
  1012. flash = (volatile unsigned long *) info->start[i];
  1013. /* divide by 4 for longword access */
  1014. size = size >> 2;
  1015. for (k = 0; k < size; k++) {
  1016. if (*flash++ != 0xffffffff)
  1017. return 0; /* not erased */
  1018. }
  1019. return 1; /* erased */
  1020. }
  1021. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1022. void flash_print_info (flash_info_t * info)
  1023. {
  1024. int i;
  1025. if (info->flash_id != FLASH_MAN_CFI) {
  1026. puts ("missing or unknown FLASH type\n");
  1027. return;
  1028. }
  1029. printf ("%s FLASH (%d x %d)",
  1030. info->name,
  1031. (info->portwidth << 3), (info->chipwidth << 3));
  1032. if (info->size < 1024*1024)
  1033. printf (" Size: %ld kB in %d Sectors\n",
  1034. info->size >> 10, info->sector_count);
  1035. else
  1036. printf (" Size: %ld MB in %d Sectors\n",
  1037. info->size >> 20, info->sector_count);
  1038. printf (" ");
  1039. switch (info->vendor) {
  1040. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1041. printf ("Intel Prog Regions");
  1042. break;
  1043. case CFI_CMDSET_INTEL_STANDARD:
  1044. printf ("Intel Standard");
  1045. break;
  1046. case CFI_CMDSET_INTEL_EXTENDED:
  1047. printf ("Intel Extended");
  1048. break;
  1049. case CFI_CMDSET_AMD_STANDARD:
  1050. printf ("AMD Standard");
  1051. break;
  1052. case CFI_CMDSET_AMD_EXTENDED:
  1053. printf ("AMD Extended");
  1054. break;
  1055. #ifdef CONFIG_FLASH_CFI_LEGACY
  1056. case CFI_CMDSET_AMD_LEGACY:
  1057. printf ("AMD Legacy");
  1058. break;
  1059. #endif
  1060. default:
  1061. printf ("Unknown (%d)", info->vendor);
  1062. break;
  1063. }
  1064. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1065. info->manufacturer_id);
  1066. printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1067. info->device_id);
  1068. if (info->device_id == 0x7E) {
  1069. printf("%04X", info->device_id2);
  1070. }
  1071. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1072. info->erase_blk_tout,
  1073. info->write_tout);
  1074. if (info->buffer_size > 1) {
  1075. printf (" Buffer write timeout: %ld ms, "
  1076. "buffer size: %d bytes\n",
  1077. info->buffer_write_tout,
  1078. info->buffer_size);
  1079. }
  1080. puts ("\n Sector Start Addresses:");
  1081. for (i = 0; i < info->sector_count; ++i) {
  1082. if (ctrlc())
  1083. break;
  1084. if ((i % 5) == 0)
  1085. putc('\n');
  1086. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1087. /* print empty and read-only info */
  1088. printf (" %08lX %c %s ",
  1089. info->start[i],
  1090. sector_erased(info, i) ? 'E' : ' ',
  1091. info->protect[i] ? "RO" : " ");
  1092. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1093. printf (" %08lX %s ",
  1094. info->start[i],
  1095. info->protect[i] ? "RO" : " ");
  1096. #endif
  1097. }
  1098. putc ('\n');
  1099. return;
  1100. }
  1101. /*-----------------------------------------------------------------------
  1102. * This is used in a few places in write_buf() to show programming
  1103. * progress. Making it a function is nasty because it needs to do side
  1104. * effect updates to digit and dots. Repeated code is nasty too, so
  1105. * we define it once here.
  1106. */
  1107. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1108. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1109. if (flash_verbose) { \
  1110. dots -= dots_sub; \
  1111. if ((scale > 0) && (dots <= 0)) { \
  1112. if ((digit % 5) == 0) \
  1113. printf ("%d", digit / 5); \
  1114. else \
  1115. putc ('.'); \
  1116. digit--; \
  1117. dots += scale; \
  1118. } \
  1119. }
  1120. #else
  1121. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1122. #endif
  1123. /*-----------------------------------------------------------------------
  1124. * Copy memory to flash, returns:
  1125. * 0 - OK
  1126. * 1 - write timeout
  1127. * 2 - Flash not erased
  1128. */
  1129. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1130. {
  1131. ulong wp;
  1132. uchar *p;
  1133. int aln;
  1134. cfiword_t cword;
  1135. int i, rc;
  1136. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1137. int buffered_size;
  1138. #endif
  1139. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1140. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1141. int scale = 0;
  1142. int dots = 0;
  1143. /*
  1144. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1145. */
  1146. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1147. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1148. CONFIG_FLASH_SHOW_PROGRESS);
  1149. }
  1150. #endif
  1151. /* get lower aligned address */
  1152. wp = (addr & ~(info->portwidth - 1));
  1153. /* handle unaligned start */
  1154. if ((aln = addr - wp) != 0) {
  1155. cword.l = 0;
  1156. p = (uchar *)wp;
  1157. for (i = 0; i < aln; ++i)
  1158. flash_add_byte (info, &cword, flash_read8(p + i));
  1159. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1160. flash_add_byte (info, &cword, *src++);
  1161. cnt--;
  1162. }
  1163. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1164. flash_add_byte (info, &cword, flash_read8(p + i));
  1165. rc = flash_write_cfiword (info, wp, cword);
  1166. if (rc != 0)
  1167. return rc;
  1168. wp += i;
  1169. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1170. }
  1171. /* handle the aligned part */
  1172. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1173. buffered_size = (info->portwidth / info->chipwidth);
  1174. buffered_size *= info->buffer_size;
  1175. while (cnt >= info->portwidth) {
  1176. /* prohibit buffer write when buffer_size is 1 */
  1177. if (info->buffer_size == 1) {
  1178. cword.l = 0;
  1179. for (i = 0; i < info->portwidth; i++)
  1180. flash_add_byte (info, &cword, *src++);
  1181. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1182. return rc;
  1183. wp += info->portwidth;
  1184. cnt -= info->portwidth;
  1185. continue;
  1186. }
  1187. /* write buffer until next buffered_size aligned boundary */
  1188. i = buffered_size - (wp % buffered_size);
  1189. if (i > cnt)
  1190. i = cnt;
  1191. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1192. return rc;
  1193. i -= i & (info->portwidth - 1);
  1194. wp += i;
  1195. src += i;
  1196. cnt -= i;
  1197. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1198. }
  1199. #else
  1200. while (cnt >= info->portwidth) {
  1201. cword.l = 0;
  1202. for (i = 0; i < info->portwidth; i++) {
  1203. flash_add_byte (info, &cword, *src++);
  1204. }
  1205. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1206. return rc;
  1207. wp += info->portwidth;
  1208. cnt -= info->portwidth;
  1209. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1210. }
  1211. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1212. if (cnt == 0) {
  1213. return (0);
  1214. }
  1215. /*
  1216. * handle unaligned tail bytes
  1217. */
  1218. cword.l = 0;
  1219. p = (uchar *)wp;
  1220. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1221. flash_add_byte (info, &cword, *src++);
  1222. --cnt;
  1223. }
  1224. for (; i < info->portwidth; ++i)
  1225. flash_add_byte (info, &cword, flash_read8(p + i));
  1226. return flash_write_cfiword (info, wp, cword);
  1227. }
  1228. /*-----------------------------------------------------------------------
  1229. */
  1230. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1231. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1232. {
  1233. int retcode = 0;
  1234. switch (info->vendor) {
  1235. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1236. case CFI_CMDSET_INTEL_STANDARD:
  1237. case CFI_CMDSET_INTEL_EXTENDED:
  1238. /*
  1239. * see errata called
  1240. * "Numonyx Axcell P33/P30 Specification Update" :)
  1241. */
  1242. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
  1243. if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
  1244. prot)) {
  1245. /*
  1246. * cmd must come before FLASH_CMD_PROTECT + 20us
  1247. * Disable interrupts which might cause a timeout here.
  1248. */
  1249. int flag = disable_interrupts ();
  1250. unsigned short cmd;
  1251. if (prot)
  1252. cmd = FLASH_CMD_PROTECT_SET;
  1253. else
  1254. cmd = FLASH_CMD_PROTECT_CLEAR;
  1255. flash_write_cmd (info, sector, 0,
  1256. FLASH_CMD_PROTECT);
  1257. flash_write_cmd (info, sector, 0, cmd);
  1258. /* re-enable interrupts if necessary */
  1259. if (flag)
  1260. enable_interrupts ();
  1261. }
  1262. break;
  1263. case CFI_CMDSET_AMD_EXTENDED:
  1264. case CFI_CMDSET_AMD_STANDARD:
  1265. /* U-Boot only checks the first byte */
  1266. if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
  1267. if (prot) {
  1268. flash_unlock_seq (info, 0);
  1269. flash_write_cmd (info, 0,
  1270. info->addr_unlock1,
  1271. ATM_CMD_SOFTLOCK_START);
  1272. flash_unlock_seq (info, 0);
  1273. flash_write_cmd (info, sector, 0,
  1274. ATM_CMD_LOCK_SECT);
  1275. } else {
  1276. flash_write_cmd (info, 0,
  1277. info->addr_unlock1,
  1278. AMD_CMD_UNLOCK_START);
  1279. if (info->device_id == ATM_ID_BV6416)
  1280. flash_write_cmd (info, sector,
  1281. 0, ATM_CMD_UNLOCK_SECT);
  1282. }
  1283. }
  1284. break;
  1285. #ifdef CONFIG_FLASH_CFI_LEGACY
  1286. case CFI_CMDSET_AMD_LEGACY:
  1287. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1288. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1289. if (prot)
  1290. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1291. else
  1292. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1293. #endif
  1294. };
  1295. if ((retcode =
  1296. flash_full_status_check (info, sector, info->erase_blk_tout,
  1297. prot ? "protect" : "unprotect")) == 0) {
  1298. info->protect[sector] = prot;
  1299. /*
  1300. * On some of Intel's flash chips (marked via legacy_unlock)
  1301. * unprotect unprotects all locking.
  1302. */
  1303. if ((prot == 0) && (info->legacy_unlock)) {
  1304. flash_sect_t i;
  1305. for (i = 0; i < info->sector_count; i++) {
  1306. if (info->protect[i])
  1307. flash_real_protect (info, i, 1);
  1308. }
  1309. }
  1310. }
  1311. return retcode;
  1312. }
  1313. /*-----------------------------------------------------------------------
  1314. * flash_read_user_serial - read the OneTimeProgramming cells
  1315. */
  1316. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1317. int len)
  1318. {
  1319. uchar *src;
  1320. uchar *dst;
  1321. dst = buffer;
  1322. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1323. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1324. memcpy (dst, src + offset, len);
  1325. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1326. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1327. }
  1328. /*
  1329. * flash_read_factory_serial - read the device Id from the protection area
  1330. */
  1331. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1332. int len)
  1333. {
  1334. uchar *src;
  1335. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1336. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1337. memcpy (buffer, src + offset, len);
  1338. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1339. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1340. }
  1341. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1342. /*-----------------------------------------------------------------------
  1343. * Reverse the order of the erase regions in the CFI QRY structure.
  1344. * This is needed for chips that are either a) correctly detected as
  1345. * top-boot, or b) buggy.
  1346. */
  1347. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1348. {
  1349. unsigned int i, j;
  1350. u32 tmp;
  1351. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1352. tmp = qry->erase_region_info[i];
  1353. qry->erase_region_info[i] = qry->erase_region_info[j];
  1354. qry->erase_region_info[j] = tmp;
  1355. }
  1356. }
  1357. /*-----------------------------------------------------------------------
  1358. * read jedec ids from device and set corresponding fields in info struct
  1359. *
  1360. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1361. *
  1362. */
  1363. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1364. {
  1365. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1366. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1367. udelay(1000); /* some flash are slow to respond */
  1368. info->manufacturer_id = flash_read_uchar (info,
  1369. FLASH_OFFSET_MANUFACTURER_ID);
  1370. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1371. flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
  1372. flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
  1373. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1374. }
  1375. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1376. {
  1377. info->cmd_reset = FLASH_CMD_RESET;
  1378. cmdset_intel_read_jedec_ids(info);
  1379. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1380. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1381. /* read legacy lock/unlock bit from intel flash */
  1382. if (info->ext_addr) {
  1383. info->legacy_unlock = flash_read_uchar (info,
  1384. info->ext_addr + 5) & 0x08;
  1385. }
  1386. #endif
  1387. return 0;
  1388. }
  1389. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1390. {
  1391. ushort bankId = 0;
  1392. uchar manuId;
  1393. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1394. flash_unlock_seq(info, 0);
  1395. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1396. udelay(1000); /* some flash are slow to respond */
  1397. manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
  1398. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1399. while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
  1400. bankId += 0x100;
  1401. manuId = flash_read_uchar (info,
  1402. bankId | FLASH_OFFSET_MANUFACTURER_ID);
  1403. }
  1404. info->manufacturer_id = manuId;
  1405. switch (info->chipwidth){
  1406. case FLASH_CFI_8BIT:
  1407. info->device_id = flash_read_uchar (info,
  1408. FLASH_OFFSET_DEVICE_ID);
  1409. if (info->device_id == 0x7E) {
  1410. /* AMD 3-byte (expanded) device ids */
  1411. info->device_id2 = flash_read_uchar (info,
  1412. FLASH_OFFSET_DEVICE_ID2);
  1413. info->device_id2 <<= 8;
  1414. info->device_id2 |= flash_read_uchar (info,
  1415. FLASH_OFFSET_DEVICE_ID3);
  1416. }
  1417. break;
  1418. case FLASH_CFI_16BIT:
  1419. info->device_id = flash_read_word (info,
  1420. FLASH_OFFSET_DEVICE_ID);
  1421. break;
  1422. default:
  1423. break;
  1424. }
  1425. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1426. }
  1427. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1428. {
  1429. info->cmd_reset = AMD_CMD_RESET;
  1430. cmdset_amd_read_jedec_ids(info);
  1431. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1432. return 0;
  1433. }
  1434. #ifdef CONFIG_FLASH_CFI_LEGACY
  1435. static void flash_read_jedec_ids (flash_info_t * info)
  1436. {
  1437. info->manufacturer_id = 0;
  1438. info->device_id = 0;
  1439. info->device_id2 = 0;
  1440. switch (info->vendor) {
  1441. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1442. case CFI_CMDSET_INTEL_STANDARD:
  1443. case CFI_CMDSET_INTEL_EXTENDED:
  1444. cmdset_intel_read_jedec_ids(info);
  1445. break;
  1446. case CFI_CMDSET_AMD_STANDARD:
  1447. case CFI_CMDSET_AMD_EXTENDED:
  1448. cmdset_amd_read_jedec_ids(info);
  1449. break;
  1450. default:
  1451. break;
  1452. }
  1453. }
  1454. /*-----------------------------------------------------------------------
  1455. * Call board code to request info about non-CFI flash.
  1456. * board_flash_get_legacy needs to fill in at least:
  1457. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1458. */
  1459. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1460. {
  1461. flash_info_t *info = &flash_info[banknum];
  1462. if (board_flash_get_legacy(base, banknum, info)) {
  1463. /* board code may have filled info completely. If not, we
  1464. use JEDEC ID probing. */
  1465. if (!info->vendor) {
  1466. int modes[] = {
  1467. CFI_CMDSET_AMD_STANDARD,
  1468. CFI_CMDSET_INTEL_STANDARD
  1469. };
  1470. int i;
  1471. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1472. info->vendor = modes[i];
  1473. info->start[0] =
  1474. (ulong)map_physmem(base,
  1475. info->portwidth,
  1476. MAP_NOCACHE);
  1477. if (info->portwidth == FLASH_CFI_8BIT
  1478. && info->interface == FLASH_CFI_X8X16) {
  1479. info->addr_unlock1 = 0x2AAA;
  1480. info->addr_unlock2 = 0x5555;
  1481. } else {
  1482. info->addr_unlock1 = 0x5555;
  1483. info->addr_unlock2 = 0x2AAA;
  1484. }
  1485. flash_read_jedec_ids(info);
  1486. debug("JEDEC PROBE: ID %x %x %x\n",
  1487. info->manufacturer_id,
  1488. info->device_id,
  1489. info->device_id2);
  1490. if (jedec_flash_match(info, info->start[0]))
  1491. break;
  1492. else
  1493. unmap_physmem((void *)info->start[0],
  1494. MAP_NOCACHE);
  1495. }
  1496. }
  1497. switch(info->vendor) {
  1498. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1499. case CFI_CMDSET_INTEL_STANDARD:
  1500. case CFI_CMDSET_INTEL_EXTENDED:
  1501. info->cmd_reset = FLASH_CMD_RESET;
  1502. break;
  1503. case CFI_CMDSET_AMD_STANDARD:
  1504. case CFI_CMDSET_AMD_EXTENDED:
  1505. case CFI_CMDSET_AMD_LEGACY:
  1506. info->cmd_reset = AMD_CMD_RESET;
  1507. break;
  1508. }
  1509. info->flash_id = FLASH_MAN_CFI;
  1510. return 1;
  1511. }
  1512. return 0; /* use CFI */
  1513. }
  1514. #else
  1515. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1516. {
  1517. return 0; /* use CFI */
  1518. }
  1519. #endif
  1520. /*-----------------------------------------------------------------------
  1521. * detect if flash is compatible with the Common Flash Interface (CFI)
  1522. * http://www.jedec.org/download/search/jesd68.pdf
  1523. */
  1524. static void flash_read_cfi (flash_info_t *info, void *buf,
  1525. unsigned int start, size_t len)
  1526. {
  1527. u8 *p = buf;
  1528. unsigned int i;
  1529. for (i = 0; i < len; i++)
  1530. p[i] = flash_read_uchar(info, start + i);
  1531. }
  1532. void __flash_cmd_reset(flash_info_t *info)
  1533. {
  1534. /*
  1535. * We do not yet know what kind of commandset to use, so we issue
  1536. * the reset command in both Intel and AMD variants, in the hope
  1537. * that AMD flash roms ignore the Intel command.
  1538. */
  1539. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1540. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1541. }
  1542. void flash_cmd_reset(flash_info_t *info)
  1543. __attribute__((weak,alias("__flash_cmd_reset")));
  1544. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1545. {
  1546. int cfi_offset;
  1547. /* Issue FLASH reset command */
  1548. flash_cmd_reset(info);
  1549. for (cfi_offset=0;
  1550. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1551. cfi_offset++) {
  1552. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1553. FLASH_CMD_CFI);
  1554. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1555. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1556. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1557. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1558. sizeof(struct cfi_qry));
  1559. info->interface = le16_to_cpu(qry->interface_desc);
  1560. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1561. debug ("device interface is %d\n",
  1562. info->interface);
  1563. debug ("found port %d chip %d ",
  1564. info->portwidth, info->chipwidth);
  1565. debug ("port %d bits chip %d bits\n",
  1566. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1567. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1568. /* calculate command offsets as in the Linux driver */
  1569. info->addr_unlock1 = 0x555;
  1570. info->addr_unlock2 = 0x2aa;
  1571. /*
  1572. * modify the unlock address if we are
  1573. * in compatibility mode
  1574. */
  1575. if ( /* x8/x16 in x8 mode */
  1576. ((info->chipwidth == FLASH_CFI_BY8) &&
  1577. (info->interface == FLASH_CFI_X8X16)) ||
  1578. /* x16/x32 in x16 mode */
  1579. ((info->chipwidth == FLASH_CFI_BY16) &&
  1580. (info->interface == FLASH_CFI_X16X32)))
  1581. {
  1582. info->addr_unlock1 = 0xaaa;
  1583. info->addr_unlock2 = 0x555;
  1584. }
  1585. info->name = "CFI conformant";
  1586. return 1;
  1587. }
  1588. }
  1589. return 0;
  1590. }
  1591. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1592. {
  1593. debug ("flash detect cfi\n");
  1594. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1595. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1596. for (info->chipwidth = FLASH_CFI_BY8;
  1597. info->chipwidth <= info->portwidth;
  1598. info->chipwidth <<= 1)
  1599. if (__flash_detect_cfi(info, qry))
  1600. return 1;
  1601. }
  1602. debug ("not found\n");
  1603. return 0;
  1604. }
  1605. /*
  1606. * Manufacturer-specific quirks. Add workarounds for geometry
  1607. * reversal, etc. here.
  1608. */
  1609. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1610. {
  1611. /* check if flash geometry needs reversal */
  1612. if (qry->num_erase_regions > 1) {
  1613. /* reverse geometry if top boot part */
  1614. if (info->cfi_version < 0x3131) {
  1615. /* CFI < 1.1, try to guess from device id */
  1616. if ((info->device_id & 0x80) != 0)
  1617. cfi_reverse_geometry(qry);
  1618. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1619. /* CFI >= 1.1, deduct from top/bottom flag */
  1620. /* note: ext_addr is valid since cfi_version > 0 */
  1621. cfi_reverse_geometry(qry);
  1622. }
  1623. }
  1624. }
  1625. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1626. {
  1627. int reverse_geometry = 0;
  1628. /* Check the "top boot" bit in the PRI */
  1629. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1630. reverse_geometry = 1;
  1631. /* AT49BV6416(T) list the erase regions in the wrong order.
  1632. * However, the device ID is identical with the non-broken
  1633. * AT49BV642D they differ in the high byte.
  1634. */
  1635. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1636. reverse_geometry = !reverse_geometry;
  1637. if (reverse_geometry)
  1638. cfi_reverse_geometry(qry);
  1639. }
  1640. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1641. {
  1642. /* check if flash geometry needs reversal */
  1643. if (qry->num_erase_regions > 1) {
  1644. /* reverse geometry if top boot part */
  1645. if (info->cfi_version < 0x3131) {
  1646. /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
  1647. if (info->device_id == 0x22CA ||
  1648. info->device_id == 0x2256) {
  1649. cfi_reverse_geometry(qry);
  1650. }
  1651. }
  1652. }
  1653. }
  1654. /*
  1655. * The following code cannot be run from FLASH!
  1656. *
  1657. */
  1658. ulong flash_get_size (phys_addr_t base, int banknum, unsigned long max_size)
  1659. {
  1660. flash_info_t *info = &flash_info[banknum];
  1661. int i, j;
  1662. flash_sect_t sect_cnt;
  1663. phys_addr_t sector;
  1664. unsigned long tmp;
  1665. int size_ratio;
  1666. uchar num_erase_regions;
  1667. int erase_region_size;
  1668. int erase_region_count;
  1669. struct cfi_qry qry;
  1670. memset(&qry, 0, sizeof(qry));
  1671. info->ext_addr = 0;
  1672. info->cfi_version = 0;
  1673. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1674. info->legacy_unlock = 0;
  1675. #endif
  1676. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1677. if (flash_detect_cfi (info, &qry)) {
  1678. info->vendor = le16_to_cpu(qry.p_id);
  1679. info->ext_addr = le16_to_cpu(qry.p_adr);
  1680. num_erase_regions = qry.num_erase_regions;
  1681. if (info->ext_addr) {
  1682. info->cfi_version = (ushort) flash_read_uchar (info,
  1683. info->ext_addr + 3) << 8;
  1684. info->cfi_version |= (ushort) flash_read_uchar (info,
  1685. info->ext_addr + 4);
  1686. }
  1687. #ifdef DEBUG
  1688. flash_printqry (&qry);
  1689. #endif
  1690. switch (info->vendor) {
  1691. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1692. case CFI_CMDSET_INTEL_STANDARD:
  1693. case CFI_CMDSET_INTEL_EXTENDED:
  1694. cmdset_intel_init(info, &qry);
  1695. break;
  1696. case CFI_CMDSET_AMD_STANDARD:
  1697. case CFI_CMDSET_AMD_EXTENDED:
  1698. cmdset_amd_init(info, &qry);
  1699. break;
  1700. default:
  1701. printf("CFI: Unknown command set 0x%x\n",
  1702. info->vendor);
  1703. /*
  1704. * Unfortunately, this means we don't know how
  1705. * to get the chip back to Read mode. Might
  1706. * as well try an Intel-style reset...
  1707. */
  1708. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1709. return 0;
  1710. }
  1711. /* Do manufacturer-specific fixups */
  1712. switch (info->manufacturer_id) {
  1713. case 0x0001:
  1714. flash_fixup_amd(info, &qry);
  1715. break;
  1716. case 0x001f:
  1717. flash_fixup_atmel(info, &qry);
  1718. break;
  1719. case 0x0020:
  1720. flash_fixup_stm(info, &qry);
  1721. break;
  1722. }
  1723. debug ("manufacturer is %d\n", info->vendor);
  1724. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1725. debug ("device id is 0x%x\n", info->device_id);
  1726. debug ("device id2 is 0x%x\n", info->device_id2);
  1727. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1728. size_ratio = info->portwidth / info->chipwidth;
  1729. /* if the chip is x8/x16 reduce the ratio by half */
  1730. if ((info->interface == FLASH_CFI_X8X16)
  1731. && (info->chipwidth == FLASH_CFI_BY8)) {
  1732. size_ratio >>= 1;
  1733. }
  1734. debug ("size_ratio %d port %d bits chip %d bits\n",
  1735. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1736. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1737. info->size = 1 << qry.dev_size;
  1738. /* multiply the size by the number of chips */
  1739. info->size *= size_ratio;
  1740. if (max_size && (info->size > max_size)) {
  1741. debug("[truncated from %ldMiB]", info->size >> 20);
  1742. info->size = max_size;
  1743. }
  1744. debug ("found %d erase regions\n", num_erase_regions);
  1745. sect_cnt = 0;
  1746. sector = base;
  1747. for (i = 0; i < num_erase_regions; i++) {
  1748. if (i > NUM_ERASE_REGIONS) {
  1749. printf ("%d erase regions found, only %d used\n",
  1750. num_erase_regions, NUM_ERASE_REGIONS);
  1751. break;
  1752. }
  1753. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1754. debug("erase region %u: 0x%08lx\n", i, tmp);
  1755. erase_region_count = (tmp & 0xffff) + 1;
  1756. tmp >>= 16;
  1757. erase_region_size =
  1758. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1759. debug ("erase_region_count = %d erase_region_size = %d\n",
  1760. erase_region_count, erase_region_size);
  1761. for (j = 0; j < erase_region_count; j++) {
  1762. if (sector - base >= info->size)
  1763. break;
  1764. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1765. printf("ERROR: too many flash sectors\n");
  1766. break;
  1767. }
  1768. info->start[sect_cnt] =
  1769. (ulong)map_physmem(sector,
  1770. info->portwidth,
  1771. MAP_NOCACHE);
  1772. sector += (erase_region_size * size_ratio);
  1773. /*
  1774. * Only read protection status from
  1775. * supported devices (intel...)
  1776. */
  1777. switch (info->vendor) {
  1778. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1779. case CFI_CMDSET_INTEL_EXTENDED:
  1780. case CFI_CMDSET_INTEL_STANDARD:
  1781. info->protect[sect_cnt] =
  1782. flash_isset (info, sect_cnt,
  1783. FLASH_OFFSET_PROTECT,
  1784. FLASH_STATUS_PROTECT);
  1785. break;
  1786. default:
  1787. /* default: not protected */
  1788. info->protect[sect_cnt] = 0;
  1789. }
  1790. sect_cnt++;
  1791. }
  1792. }
  1793. info->sector_count = sect_cnt;
  1794. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  1795. tmp = 1 << qry.block_erase_timeout_typ;
  1796. info->erase_blk_tout = tmp *
  1797. (1 << qry.block_erase_timeout_max);
  1798. tmp = (1 << qry.buf_write_timeout_typ) *
  1799. (1 << qry.buf_write_timeout_max);
  1800. /* round up when converting to ms */
  1801. info->buffer_write_tout = (tmp + 999) / 1000;
  1802. tmp = (1 << qry.word_write_timeout_typ) *
  1803. (1 << qry.word_write_timeout_max);
  1804. /* round up when converting to ms */
  1805. info->write_tout = (tmp + 999) / 1000;
  1806. info->flash_id = FLASH_MAN_CFI;
  1807. if ((info->interface == FLASH_CFI_X8X16) &&
  1808. (info->chipwidth == FLASH_CFI_BY8)) {
  1809. /* XXX - Need to test on x8/x16 in parallel. */
  1810. info->portwidth >>= 1;
  1811. }
  1812. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1813. }
  1814. return (info->size);
  1815. }
  1816. void flash_set_verbose(uint v)
  1817. {
  1818. flash_verbose = v;
  1819. }
  1820. /*-----------------------------------------------------------------------
  1821. */
  1822. unsigned long flash_init (void)
  1823. {
  1824. unsigned long size = 0;
  1825. int i;
  1826. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1827. struct apl_s {
  1828. ulong start;
  1829. ulong size;
  1830. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  1831. #endif
  1832. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1833. /* read environment from EEPROM */
  1834. char s[64];
  1835. getenv_f("unlock", s, sizeof(s));
  1836. #endif
  1837. /* Init: no FLASHes known */
  1838. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  1839. flash_info[i].flash_id = FLASH_UNKNOWN;
  1840. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  1841. flash_get_size(cfi_flash_bank_addr(i), i,
  1842. cfi_flash_bank_size(i));
  1843. size += flash_info[i].size;
  1844. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  1845. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  1846. printf ("## Unknown FLASH on Bank %d "
  1847. "- Size = 0x%08lx = %ld MB\n",
  1848. i+1, flash_info[i].size,
  1849. flash_info[i].size >> 20);
  1850. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  1851. }
  1852. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1853. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  1854. /*
  1855. * Only the U-Boot image and it's environment
  1856. * is protected, all other sectors are
  1857. * unprotected (unlocked) if flash hardware
  1858. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  1859. * and the environment variable "unlock" is
  1860. * set to "yes".
  1861. */
  1862. if (flash_info[i].legacy_unlock) {
  1863. int k;
  1864. /*
  1865. * Disable legacy_unlock temporarily,
  1866. * since flash_real_protect would
  1867. * relock all other sectors again
  1868. * otherwise.
  1869. */
  1870. flash_info[i].legacy_unlock = 0;
  1871. /*
  1872. * Legacy unlocking (e.g. Intel J3) ->
  1873. * unlock only one sector. This will
  1874. * unlock all sectors.
  1875. */
  1876. flash_real_protect (&flash_info[i], 0, 0);
  1877. flash_info[i].legacy_unlock = 1;
  1878. /*
  1879. * Manually mark other sectors as
  1880. * unlocked (unprotected)
  1881. */
  1882. for (k = 1; k < flash_info[i].sector_count; k++)
  1883. flash_info[i].protect[k] = 0;
  1884. } else {
  1885. /*
  1886. * No legancy unlocking -> unlock all sectors
  1887. */
  1888. flash_protect (FLAG_PROTECT_CLEAR,
  1889. flash_info[i].start[0],
  1890. flash_info[i].start[0]
  1891. + flash_info[i].size - 1,
  1892. &flash_info[i]);
  1893. }
  1894. }
  1895. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1896. }
  1897. /* Monitor protection ON by default */
  1898. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  1899. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  1900. flash_protect (FLAG_PROTECT_SET,
  1901. CONFIG_SYS_MONITOR_BASE,
  1902. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  1903. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  1904. #endif
  1905. /* Environment protection ON by default */
  1906. #ifdef CONFIG_ENV_IS_IN_FLASH
  1907. flash_protect (FLAG_PROTECT_SET,
  1908. CONFIG_ENV_ADDR,
  1909. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  1910. flash_get_info(CONFIG_ENV_ADDR));
  1911. #endif
  1912. /* Redundant environment protection ON by default */
  1913. #ifdef CONFIG_ENV_ADDR_REDUND
  1914. flash_protect (FLAG_PROTECT_SET,
  1915. CONFIG_ENV_ADDR_REDUND,
  1916. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  1917. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  1918. #endif
  1919. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1920. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  1921. debug("autoprotecting from %08x to %08x\n",
  1922. apl[i].start, apl[i].start + apl[i].size - 1);
  1923. flash_protect (FLAG_PROTECT_SET,
  1924. apl[i].start,
  1925. apl[i].start + apl[i].size - 1,
  1926. flash_get_info(apl[i].start));
  1927. }
  1928. #endif
  1929. #ifdef CONFIG_FLASH_CFI_MTD
  1930. cfi_mtd_init();
  1931. #endif
  1932. return (size);
  1933. }