io.h 5.2 KB

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  1. /*
  2. * U-boot - io.h IO routines
  3. *
  4. * Copyright (c) 2005-2007 Analog Devices Inc.
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22. * MA 02110-1301 USA
  23. */
  24. #ifndef _BLACKFIN_IO_H
  25. #define _BLACKFIN_IO_H
  26. #ifdef __KERNEL__
  27. #include <asm/blackfin.h>
  28. static inline void sync(void)
  29. {
  30. SSYNC();
  31. }
  32. /* function prototypes for CF support */
  33. extern void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words);
  34. extern void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words);
  35. extern unsigned char cf_inb(volatile unsigned char *addr);
  36. extern void cf_outb(unsigned char val, volatile unsigned char *addr);
  37. /*
  38. * Given a physical address and a length, return a virtual address
  39. * that can be used to access the memory range with the caching
  40. * properties specified by "flags".
  41. */
  42. #define MAP_NOCACHE (0)
  43. #define MAP_WRCOMBINE (0)
  44. #define MAP_WRBACK (0)
  45. #define MAP_WRTHROUGH (0)
  46. static inline void *
  47. map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
  48. {
  49. return (void *)paddr;
  50. }
  51. /*
  52. * Take down a mapping set up by map_physmem().
  53. */
  54. static inline void unmap_physmem(void *vaddr, unsigned long flags)
  55. {
  56. }
  57. /*
  58. * These are for ISA/PCI shared memory _only_ and should never be used
  59. * on any other type of memory, including Zorro memory. They are meant to
  60. * access the bus in the bus byte order which is little-endian!.
  61. *
  62. * readX/writeX() are used to access memory mapped devices. On some
  63. * architectures the memory mapped IO stuff needs to be accessed
  64. * differently. On the m68k architecture, we just read/write the
  65. * memory location directly.
  66. */
  67. #ifndef __ASSEMBLY__
  68. static inline unsigned char readb(const volatile void *addr)
  69. {
  70. unsigned int val;
  71. int tmp;
  72. __asm__ __volatile__ ("cli %1;\n\t"
  73. "NOP; NOP; SSYNC;\n\t"
  74. "%0 = b [%2] (z);\n\t"
  75. "sti %1;\n\t"
  76. : "=d"(val), "=d"(tmp): "a"(addr));
  77. return (unsigned char) val;
  78. }
  79. static inline unsigned short readw(const volatile void *addr)
  80. {
  81. unsigned int val;
  82. int tmp;
  83. __asm__ __volatile__ ("cli %1;\n\t"
  84. "NOP; NOP; SSYNC;\n\t"
  85. "%0 = w [%2] (z);\n\t"
  86. "sti %1;\n\t"
  87. : "=d"(val), "=d"(tmp): "a"(addr));
  88. return (unsigned short) val;
  89. }
  90. static inline unsigned int readl(const volatile void *addr)
  91. {
  92. unsigned int val;
  93. int tmp;
  94. __asm__ __volatile__ ("cli %1;\n\t"
  95. "NOP; NOP; SSYNC;\n\t"
  96. "%0 = [%2];\n\t"
  97. "sti %1;\n\t"
  98. : "=d"(val), "=d"(tmp): "a"(addr));
  99. return val;
  100. }
  101. #define __raw_readb readb
  102. #define __raw_readw readw
  103. #define __raw_readl readl
  104. #endif /* __ASSEMBLY__ */
  105. #define writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))
  106. #define writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b))
  107. #define writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))
  108. #define __raw_writeb writeb
  109. #define __raw_writew writew
  110. #define __raw_writel writel
  111. #define memset_io(a, b, c) memset((void *)(a), (b), (c))
  112. #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
  113. #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
  114. #define inb(addr) cf_inb((volatile unsigned char *)(addr))
  115. #define outb(x, addr) cf_outb((unsigned char)(x), (volatile unsigned char *)(addr))
  116. #define insw(port, addr, count) cf_insw((unsigned short *)addr, (unsigned short *)(port), (count))
  117. #define outsw(port, addr, count) cf_outsw((unsigned short *)(port), (unsigned short *)addr, (count))
  118. #define IO_SPACE_LIMIT 0xffff
  119. /* Values for nocacheflag and cmode */
  120. #define IOMAP_FULL_CACHING 0
  121. #define IOMAP_NOCACHE_SER 1
  122. #define IOMAP_NOCACHE_NONSER 2
  123. #define IOMAP_WRITETHROUGH 3
  124. extern void *__ioremap(unsigned long physaddr, unsigned long size,
  125. int cacheflag);
  126. extern void __iounmap(void *addr, unsigned long size);
  127. extern inline void *ioremap(unsigned long physaddr, unsigned long size)
  128. {
  129. return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
  130. }
  131. extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
  132. {
  133. return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
  134. }
  135. extern inline void *ioremap_writethrough(unsigned long physaddr,
  136. unsigned long size)
  137. {
  138. return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
  139. }
  140. extern inline void *ioremap_fullcache(unsigned long physaddr,
  141. unsigned long size)
  142. {
  143. return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
  144. }
  145. extern void iounmap(void *addr);
  146. extern void blkfin_inv_cache_all(void);
  147. #define dma_cache_inv(_start, _size) do { blkfin_inv_cache_all(); } while (0)
  148. #define dma_cache_wback(_start, _size) do { } while (0)
  149. #define dma_cache_wback_inv(_start, _size) do { blkfin_inv_cache_all(); } while (0)
  150. #endif
  151. #endif