samsung_onenand.h 4.1 KB

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  1. /*
  2. * Copyright (C) 2005-2009 Samsung Electronics
  3. * Minkyu Kang <mk7.kang@samsung.com>
  4. * Kyungmin Park <kyungmin.park@samsung.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #ifndef __SAMSUNG_ONENAND_H__
  25. #define __SAMSUNG_ONENAND_H__
  26. /*
  27. * OneNAND Controller
  28. */
  29. #ifndef __ASSEMBLY__
  30. struct samsung_onenand {
  31. unsigned int mem_cfg; /* 0x0000 */
  32. unsigned char res1[0xc];
  33. unsigned int burst_len; /* 0x0010 */
  34. unsigned char res2[0xc];
  35. unsigned int mem_reset; /* 0x0020 */
  36. unsigned char res3[0xc];
  37. unsigned int int_err_stat; /* 0x0030 */
  38. unsigned char res4[0xc];
  39. unsigned int int_err_mask; /* 0x0040 */
  40. unsigned char res5[0xc];
  41. unsigned int int_err_ack; /* 0x0050 */
  42. unsigned char res6[0xc];
  43. unsigned int ecc_err_stat; /* 0x0060 */
  44. unsigned char res7[0xc];
  45. unsigned int manufact_id; /* 0x0070 */
  46. unsigned char res8[0xc];
  47. unsigned int device_id; /* 0x0080 */
  48. unsigned char res9[0xc];
  49. unsigned int data_buf_size; /* 0x0090 */
  50. unsigned char res10[0xc];
  51. unsigned int boot_buf_size; /* 0x00A0 */
  52. unsigned char res11[0xc];
  53. unsigned int buf_amount; /* 0x00B0 */
  54. unsigned char res12[0xc];
  55. unsigned int tech; /* 0x00C0 */
  56. unsigned char res13[0xc];
  57. unsigned int fba; /* 0x00D0 */
  58. unsigned char res14[0xc];
  59. unsigned int fpa; /* 0x00E0 */
  60. unsigned char res15[0xc];
  61. unsigned int fsa; /* 0x00F0 */
  62. unsigned char res16[0x3c];
  63. unsigned int sync_mode; /* 0x0130 */
  64. unsigned char res17[0xc];
  65. unsigned int trans_spare; /* 0x0140 */
  66. unsigned char res18[0x3c];
  67. unsigned int err_page_addr; /* 0x0180 */
  68. unsigned char res19[0x1c];
  69. unsigned int int_pin_en; /* 0x01A0 */
  70. unsigned char res20[0x1c];
  71. unsigned int acc_clock; /* 0x01C0 */
  72. unsigned char res21[0x1c];
  73. unsigned int err_blk_addr; /* 0x01E0 */
  74. unsigned char res22[0xc];
  75. unsigned int flash_ver_id; /* 0x01F0 */
  76. unsigned char res23[0x6c];
  77. unsigned int watchdog_cnt_low; /* 0x0260 */
  78. unsigned char res24[0xc];
  79. unsigned int watchdog_cnt_hi; /* 0x0270 */
  80. unsigned char res25[0xc];
  81. unsigned int sync_write; /* 0x0280 */
  82. unsigned char res26[0x1c];
  83. unsigned int cold_reset; /* 0x02A0 */
  84. unsigned char res27[0xc];
  85. unsigned int ddp_device; /* 0x02B0 */
  86. unsigned char res28[0xc];
  87. unsigned int multi_plane; /* 0x02C0 */
  88. unsigned char res29[0x1c];
  89. unsigned int trans_mode; /* 0x02E0 */
  90. unsigned char res30[0x1c];
  91. unsigned int ecc_err_stat2; /* 0x0300 */
  92. unsigned char res31[0xc];
  93. unsigned int ecc_err_stat3; /* 0x0310 */
  94. unsigned char res32[0xc];
  95. unsigned int ecc_err_stat4; /* 0x0320 */
  96. unsigned char res33[0x1c];
  97. unsigned int dev_page_size; /* 0x0340 */
  98. unsigned char res34[0x4c];
  99. unsigned int int_mon_status; /* 0x0390 */
  100. };
  101. #endif
  102. #define ONENAND_MEM_RESET_HOT 0x3
  103. #define ONENAND_MEM_RESET_COLD 0x2
  104. #define ONENAND_MEM_RESET_WARM 0x1
  105. #define INT_ERR_ALL 0x3fff
  106. #define CACHE_OP_ERR (1 << 13)
  107. #define RST_CMP (1 << 12)
  108. #define RDY_ACT (1 << 11)
  109. #define INT_ACT (1 << 10)
  110. #define UNSUP_CMD (1 << 9)
  111. #define LOCKED_BLK (1 << 8)
  112. #define BLK_RW_CMP (1 << 7)
  113. #define ERS_CMP (1 << 6)
  114. #define PGM_CMP (1 << 5)
  115. #define LOAD_CMP (1 << 4)
  116. #define ERS_FAIL (1 << 3)
  117. #define PGM_FAIL (1 << 2)
  118. #define INT_TO (1 << 1)
  119. #define LD_FAIL_ECC_ERR (1 << 0)
  120. #define TSRF (1 << 0)
  121. /* common initialize function */
  122. extern void s3c_onenand_init(struct mtd_info *);
  123. extern int s5pc110_chip_probe(struct mtd_info *);
  124. extern int s5pc210_chip_probe(struct mtd_info *);
  125. #endif