tegra20-tec.dts 948 B

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  1. /dts-v1/;
  2. /include/ ARCH_CPU_DTS
  3. / {
  4. model = "Avionic Design Tamonten Evaluation Carrier";
  5. compatible = "ad,tec", "nvidia,tegra20";
  6. aliases {
  7. usb0 = "/usb@c5008000";
  8. };
  9. memory {
  10. reg = <0x00000000 0x20000000>;
  11. };
  12. clocks {
  13. clk_32k: clk_32k {
  14. clock-frequency = <32000>;
  15. };
  16. osc {
  17. clock-frequency = <12000000>;
  18. };
  19. };
  20. clock@60006000 {
  21. clocks = <&clk_32k &osc>;
  22. };
  23. serial@70006300 {
  24. clock-frequency = <216000000>;
  25. };
  26. i2c@7000c000 {
  27. status = "disabled";
  28. };
  29. i2c@7000c400 {
  30. status = "disabled";
  31. };
  32. i2c@7000c500 {
  33. status = "disabled";
  34. };
  35. i2c@7000d000 {
  36. status = "disabled";
  37. };
  38. usb@c5000000 {
  39. status = "disabled";
  40. };
  41. usb@c5004000 {
  42. status = "disabled";
  43. };
  44. nand-controller@70008000 {
  45. nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
  46. nvidia,width = <8>;
  47. nvidia,timing = <26 100 20 80 20 10 12 10 70>;
  48. nand@0 {
  49. reg = <0>;
  50. compatible = "hynix,hy27uf4g2b", "nand-flash";
  51. };
  52. };
  53. };