ddr.h 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081
  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * Version 2 as published by the Free Software Foundation.
  7. */
  8. #ifndef FSL_DDR_MAIN_H
  9. #define FSL_DDR_MAIN_H
  10. #include <asm/fsl_ddr_sdram.h>
  11. #include <asm/fsl_ddr_dimm_params.h>
  12. #include "common_timing_params.h"
  13. /*
  14. * Bind the main DDR setup driver's generic names
  15. * to this specific DDR technology.
  16. */
  17. static __inline__ int
  18. compute_dimm_parameters(const generic_spd_eeprom_t *spd,
  19. dimm_params_t *pdimm,
  20. unsigned int dimm_number)
  21. {
  22. return ddr_compute_dimm_parameters(spd, pdimm, dimm_number);
  23. }
  24. /*
  25. * Data Structures
  26. *
  27. * All data structures have to be on the stack
  28. */
  29. #define CONFIG_SYS_NUM_DDR_CTLRS CONFIG_NUM_DDR_CONTROLLERS
  30. #define CONFIG_SYS_DIMM_SLOTS_PER_CTLR CONFIG_DIMM_SLOTS_PER_CTLR
  31. typedef struct {
  32. generic_spd_eeprom_t
  33. spd_installed_dimms[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_SYS_DIMM_SLOTS_PER_CTLR];
  34. struct dimm_params_s
  35. dimm_params[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_SYS_DIMM_SLOTS_PER_CTLR];
  36. memctl_options_t memctl_opts[CONFIG_SYS_NUM_DDR_CTLRS];
  37. common_timing_params_t common_timing_params[CONFIG_SYS_NUM_DDR_CTLRS];
  38. fsl_ddr_cfg_regs_t fsl_ddr_config_reg[CONFIG_SYS_NUM_DDR_CTLRS];
  39. } fsl_ddr_info_t;
  40. /* Compute steps */
  41. #define STEP_GET_SPD (1 << 0)
  42. #define STEP_COMPUTE_DIMM_PARMS (1 << 1)
  43. #define STEP_COMPUTE_COMMON_PARMS (1 << 2)
  44. #define STEP_GATHER_OPTS (1 << 3)
  45. #define STEP_ASSIGN_ADDRESSES (1 << 4)
  46. #define STEP_COMPUTE_REGS (1 << 5)
  47. #define STEP_PROGRAM_REGS (1 << 6)
  48. #define STEP_ALL 0xFFF
  49. extern unsigned long long
  50. fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step);
  51. extern const char * step_to_string(unsigned int step);
  52. extern unsigned int
  53. compute_fsl_memctl_config_regs(const memctl_options_t *popts,
  54. fsl_ddr_cfg_regs_t *ddr,
  55. const common_timing_params_t *common_dimm,
  56. const dimm_params_t *dimm_parameters,
  57. unsigned int dbw_capacity_adjust);
  58. extern unsigned int
  59. compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
  60. common_timing_params_t *outpdimm,
  61. unsigned int number_of_dimms);
  62. extern unsigned int populate_memctl_options(int all_DIMMs_registered,
  63. memctl_options_t *popts,
  64. dimm_params_t *pdimm,
  65. unsigned int ctrl_num);
  66. extern unsigned int mclk_to_picos(unsigned int mclk);
  67. extern unsigned int get_memory_clk_period_ps(void);
  68. extern unsigned int picos_to_mclk(unsigned int picos);
  69. #endif