TQM5200.h 21 KB

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  1. /*
  2. * (C) Copyright 2003-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2004-2006
  6. * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #ifndef __CONFIG_H
  27. #define __CONFIG_H
  28. /*
  29. * High Level Configuration Options
  30. * (easy to change)
  31. */
  32. #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
  33. #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
  34. #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
  35. #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
  36. /* On a Cameron or on a FO300 board or ... */
  37. #if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
  38. #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
  39. #endif
  40. #define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
  41. #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
  42. #define BOOTFLAG_WARM 0x02 /* Software reboot */
  43. /*
  44. * Serial console configuration
  45. */
  46. #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
  47. #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
  48. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
  49. #ifdef CONFIG_FO300
  50. #define CFG_DEVICE_NULLDEV 1 /* enable null device */
  51. #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
  52. #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
  53. #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
  54. #if 0
  55. #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
  56. /* switch is closed */
  57. #endif
  58. #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
  59. /* switch is open */
  60. #endif /* CONFIG_FO300 */
  61. #ifdef CONFIG_STK52XX
  62. #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
  63. #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
  64. #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
  65. #define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
  66. #define CONFIG_BOARD_EARLY_INIT_R
  67. #endif /* CONFIG_STK52XX */
  68. /*
  69. * PCI Mapping:
  70. * 0x40000000 - 0x4fffffff - PCI Memory
  71. * 0x50000000 - 0x50ffffff - PCI IO Space
  72. */
  73. #ifdef CONFIG_STK52XX
  74. #define CONFIG_PCI 1
  75. #define CONFIG_PCI_PNP 1
  76. /* #define CONFIG_PCI_SCAN_SHOW 1 */
  77. #define CONFIG_PCI_MEM_BUS 0x40000000
  78. #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
  79. #define CONFIG_PCI_MEM_SIZE 0x10000000
  80. #define CONFIG_PCI_IO_BUS 0x50000000
  81. #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
  82. #define CONFIG_PCI_IO_SIZE 0x01000000
  83. #define CONFIG_NET_MULTI 1
  84. #define CONFIG_EEPRO100 1
  85. #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
  86. #define CONFIG_NS8382X 1
  87. #endif /* CONFIG_STK52XX */
  88. /*
  89. * Video console
  90. */
  91. #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
  92. #define CONFIG_VIDEO
  93. #define CONFIG_VIDEO_SM501
  94. #define CONFIG_VIDEO_SM501_32BPP
  95. #define CONFIG_CFB_CONSOLE
  96. #define CONFIG_VIDEO_LOGO
  97. #ifndef CONFIG_FO300
  98. #define CONFIG_CONSOLE_EXTRA_INFO
  99. #else
  100. #define CONFIG_VIDEO_BMP_LOGO
  101. #endif
  102. #define CONFIG_VGA_AS_SINGLE_DEVICE
  103. #define CONFIG_VIDEO_SW_CURSOR
  104. #define CONFIG_SPLASH_SCREEN
  105. #define CFG_CONSOLE_IS_IN_ENV
  106. #endif /* #ifndef CONFIG_TQM5200S */
  107. /* Partitions */
  108. #define CONFIG_MAC_PARTITION
  109. #define CONFIG_DOS_PARTITION
  110. #define CONFIG_ISO_PARTITION
  111. /* USB */
  112. #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
  113. #define CONFIG_USB_OHCI_NEW
  114. #define CONFIG_USB_STORAGE
  115. #define CONFIG_CMD_FAT
  116. #define CONFIG_CMD_USB
  117. #undef CFG_USB_OHCI_BOARD_INIT
  118. #define CFG_USB_OHCI_CPU_INIT
  119. #define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
  120. #define CFG_USB_OHCI_SLOT_NAME "mpc5200"
  121. #define CFG_USB_OHCI_MAX_ROOT_PORTS 15
  122. #endif
  123. #ifndef CONFIG_CAM5200
  124. /* POST support */
  125. #define CONFIG_POST (CFG_POST_MEMORY | \
  126. CFG_POST_CPU | \
  127. CFG_POST_I2C)
  128. #endif
  129. #ifdef CONFIG_POST
  130. /* preserve space for the post_word at end of on-chip SRAM */
  131. #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
  132. #endif
  133. /*
  134. * BOOTP options
  135. */
  136. #define CONFIG_BOOTP_BOOTFILESIZE
  137. #define CONFIG_BOOTP_BOOTPATH
  138. #define CONFIG_BOOTP_GATEWAY
  139. #define CONFIG_BOOTP_HOSTNAME
  140. /*
  141. * Command line configuration.
  142. */
  143. #include <config_cmd_default.h>
  144. #define CONFIG_CMD_ASKENV
  145. #define CONFIG_CMD_DATE
  146. #define CONFIG_CMD_DHCP
  147. #define CONFIG_CMD_EEPROM
  148. #define CONFIG_CMD_I2C
  149. #define CONFIG_CMD_JFFS2
  150. #define CONFIG_CMD_MII
  151. #define CONFIG_CMD_NFS
  152. #define CONFIG_CMD_PING
  153. #define CONFIG_CMD_REGINFO
  154. #define CONFIG_CMD_SNTP
  155. #define CONFIG_CMD_BSP
  156. #ifdef CONFIG_VIDEO
  157. #define CONFIG_CMD_BMP
  158. #endif
  159. #ifdef CONFIG_PCI
  160. #define CONFIG_CMD_PCI
  161. #endif
  162. #if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
  163. #define CONFIG_CMD_IDE
  164. #define CONFIG_CMD_FAT
  165. #define CONFIG_CMD_EXT2
  166. #endif
  167. #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
  168. #define CONFIG_CFG_USB
  169. #define CONFIG_CFG_FAT
  170. #endif
  171. #ifdef CONFIG_POST
  172. #define CONFIG_CMD_DIAG
  173. #endif
  174. #define CONFIG_TIMESTAMP /* display image timestamps */
  175. #if (TEXT_BASE != 0xFFF00000)
  176. # define CFG_LOWBOOT 1 /* Boot low */
  177. #endif
  178. /*
  179. * Autobooting
  180. */
  181. #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
  182. #define CONFIG_PREBOOT "echo;" \
  183. "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
  184. "echo"
  185. #undef CONFIG_BOOTARGS
  186. #if defined(CONFIG_TQM5200_B) && !defined(CFG_LOWBOOT)
  187. # define ENV_UPDT \
  188. "update=protect off FFF00000 +${filesize};" \
  189. "erase FFF00000 +${filesize};" \
  190. "cp.b 200000 FFF00000 ${filesize};" \
  191. "protect on FFF00000 +${filesize}\0"
  192. #else /* default lowboot configuration */
  193. # define ENV_UPDT \
  194. "update=protect off FC000000 +${filesize};" \
  195. "erase FC000000 +${filesize};" \
  196. "cp.b 200000 FC000000 ${filesize};" \
  197. "protect on FC000000 +${filesize}\0"
  198. #endif
  199. #if defined(CONFIG_TQM5200)
  200. #define CUSTOM_ENV_SETTINGS \
  201. "hostname=tqm5200\0" \
  202. "bootfile=/tftpboot/tqm5200/uImage\0" \
  203. "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
  204. "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
  205. #elif defined(CONFIG_CAM5200)
  206. #define CUSTOM_ENV_SETTINGS \
  207. "bootfile=cam5200/uImage\0" \
  208. "u-boot=cam5200/u-boot.bin\0" \
  209. "setup=tftp 200000 cam5200/setup.img; autoscr 200000\0"
  210. #endif
  211. #define CONFIG_EXTRA_ENV_SETTINGS \
  212. "netdev=eth0\0" \
  213. "console=ttyPSC0\0" \
  214. "fdt_addr=FC0A0000\0" \
  215. "kernel_addr=FC0C0000\0" \
  216. "ramdisk_addr=FC300000\0" \
  217. "kernel_addr_r=200000\0" \
  218. "fdt_addr_r=400000\0" \
  219. "rootpath=/opt/eldk/ppc_6xx\0" \
  220. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  221. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  222. "nfsroot=${serverip}:${rootpath}\0" \
  223. "addip=setenv bootargs ${bootargs} " \
  224. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  225. ":${hostname}:${netdev}:off panic=1\0" \
  226. "addcons=setenv bootargs ${bootargs} " \
  227. "console=${console},${baudrate}\0" \
  228. "flash_self_old=sete console ttyS0; run ramargs addip addcons;" \
  229. "bootm ${kernel_addr} ${ramdisk_addr}\0" \
  230. "flash_self=run ramargs addip addcons;" \
  231. "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
  232. "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
  233. "bootm ${kernel_addr}\0" \
  234. "flash_nfs=run nfsargs addip addcons;" \
  235. "bootm ${kernel_addr} - ${fdt_addr}\0" \
  236. "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
  237. "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
  238. "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
  239. "tftp ${fdt_addr_r} ${fdt_file}; " \
  240. "run nfsargs addip addcons; " \
  241. "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
  242. CUSTOM_ENV_SETTINGS \
  243. "load=tftp 200000 ${u-boot}\0" \
  244. ENV_UPDT \
  245. ""
  246. #define CONFIG_BOOTCOMMAND "run net_nfs"
  247. /*
  248. * IPB Bus clocking configuration.
  249. */
  250. #define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
  251. #if defined(CFG_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
  252. /*
  253. * PCI Bus clocking configuration
  254. *
  255. * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
  256. * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
  257. * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
  258. */
  259. #define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
  260. #endif
  261. /*
  262. * I2C configuration
  263. */
  264. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  265. #ifdef CONFIG_TQM5200_REV100
  266. #define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
  267. #else
  268. #define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
  269. #endif
  270. /*
  271. * I2C clock frequency
  272. *
  273. * Please notice, that the resulting clock frequency could differ from the
  274. * configured value. This is because the I2C clock is derived from system
  275. * clock over a frequency divider with only a few divider values. U-boot
  276. * calculates the best approximation for CFG_I2C_SPEED. However the calculated
  277. * approximation allways lies below the configured value, never above.
  278. */
  279. #define CFG_I2C_SPEED 100000 /* 100 kHz */
  280. #define CFG_I2C_SLAVE 0x7F
  281. /*
  282. * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
  283. * also). For other EEPROMs configuration should be verified. On Mini-FAP the
  284. * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
  285. * same configuration could be used.
  286. */
  287. #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
  288. #define CFG_I2C_EEPROM_ADDR_LEN 2
  289. #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
  290. #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
  291. /*
  292. * HW-Monitor configuration on Mini-FAP
  293. */
  294. #if defined (CONFIG_MINIFAP)
  295. #define CFG_I2C_HWMON_ADDR 0x2C
  296. #endif
  297. /* List of I2C addresses to be verified by POST */
  298. #if defined (CONFIG_MINIFAP)
  299. #undef I2C_ADDR_LIST
  300. #define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
  301. CFG_I2C_HWMON_ADDR, \
  302. CFG_I2C_SLAVE }
  303. #endif
  304. /*
  305. * Flash configuration
  306. */
  307. #define CFG_FLASH_BASE 0xFC000000
  308. #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
  309. #define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks
  310. (= chip selects) */
  311. #define CFG_FLASH_WORD_SIZE unsigned int /* main flash device with */
  312. #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  313. #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  314. #define CFG_FLASH_ADDR0 0x555
  315. #define CFG_FLASH_ADDR1 0x2AA
  316. #define CFG_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
  317. #define CFG_MAX_FLASH_SECT 128
  318. #else
  319. /* use CFI flash driver */
  320. #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
  321. #define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
  322. #define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
  323. #define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
  324. (= chip selects) */
  325. #define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
  326. #endif
  327. #define CFG_FLASH_EMPTY_INFO
  328. #define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
  329. #define CFG_FLASH_USE_BUFFER_WRITE 1
  330. #if defined (CONFIG_CAM5200)
  331. # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
  332. #elif defined(CONFIG_TQM5200_B)
  333. # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
  334. #else
  335. # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
  336. #endif
  337. /* Dynamic MTD partition support */
  338. #define CONFIG_JFFS2_CMDLINE
  339. #define MTDIDS_DEFAULT "nor0=TQM5200-0"
  340. #ifdef CONFIG_STK52XX
  341. # if defined(CONFIG_TQM5200_B)
  342. # if defined(CFG_LOWBOOT)
  343. # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
  344. "1536k(kernel)," \
  345. "3584k(small-fs)," \
  346. "2m(initrd)," \
  347. "8m(misc)," \
  348. "16m(big-fs)"
  349. # else /* highboot */
  350. # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
  351. "3584k(small-fs)," \
  352. "2m(initrd)," \
  353. "8m(misc)," \
  354. "15m(big-fs)," \
  355. "1m(firmware)"
  356. # endif /* CFG_LOWBOOT */
  357. # else /* !CONFIG_TQM5200_B */
  358. # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
  359. "128k(dtb)," \
  360. "2304k(kernel)," \
  361. "2m(initrd)," \
  362. "4m(small-fs)," \
  363. "8m(misc)," \
  364. "15m(big-fs)"
  365. # endif /* CONFIG_TQM5200_B */
  366. #elif defined (CONFIG_CAM5200)
  367. # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
  368. "1792k(kernel)," \
  369. "5632k(rootfs)," \
  370. "24m(home)"
  371. #elif defined (CONFIG_FO300)
  372. # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
  373. "1408k(kernel)," \
  374. "2m(initrd)," \
  375. "4m(small-fs)," \
  376. "8m(misc)," \
  377. "16m(big-fs)"
  378. #else
  379. # error "Unknown Carrier Board"
  380. #endif /* CONFIG_STK52XX */
  381. /*
  382. * Environment settings
  383. */
  384. #define CFG_ENV_IS_IN_FLASH 1
  385. #define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
  386. #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
  387. #define CFG_ENV_SECT_SIZE 0x40000
  388. #else
  389. #define CFG_ENV_SECT_SIZE 0x20000
  390. #endif /* CONFIG_TQM5200_B */
  391. #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
  392. #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
  393. /*
  394. * Memory map
  395. */
  396. #define CFG_MBAR 0xF0000000
  397. #define CFG_SDRAM_BASE 0x00000000
  398. #define CFG_DEFAULT_MBAR 0x80000000
  399. /* Use ON-Chip SRAM until RAM will be available */
  400. #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
  401. #ifdef CONFIG_POST
  402. /* preserve space for the post_word at end of on-chip SRAM */
  403. #define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
  404. #else
  405. #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
  406. #endif
  407. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  408. #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  409. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  410. #define CFG_MONITOR_BASE TEXT_BASE
  411. #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
  412. # define CFG_RAMBOOT 1
  413. #endif
  414. #if defined (CONFIG_CAM5200)
  415. # define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
  416. #elif defined(CONFIG_TQM5200_B)
  417. # define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
  418. #else
  419. # define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
  420. #endif
  421. #define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
  422. #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  423. /*
  424. * Ethernet configuration
  425. */
  426. #define CONFIG_MPC5xxx_FEC 1
  427. /*
  428. * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
  429. */
  430. /* #define CONFIG_FEC_10MBIT 1 */
  431. #define CONFIG_PHY_ADDR 0x00
  432. /*
  433. * GPIO configuration
  434. *
  435. * use CS1: Bit 0 (mask: 0x80000000):
  436. * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
  437. * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
  438. * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
  439. * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
  440. * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
  441. * Use for REV200 STK52XX boards and FO300 boards. Do not use
  442. * with REV100 modules (because, there I2C1 is used as I2C bus).
  443. * use ATA: Bits 6-7 (mask 0x03000000):
  444. * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
  445. * Use for CAM5200 board.
  446. * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
  447. * use PSC6: Bits 9-11 (mask 0x00700000):
  448. * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
  449. * UART, CODEC or IrDA.
  450. * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
  451. * enable extended POST tests.
  452. * Use for MINI-FAP and TQM5200_IB boards.
  453. * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
  454. * Extended POST test is not available.
  455. * Use for STK52xx, FO300 and CAM5200 boards.
  456. * use PCI_DIS: Bit 16 (mask 0x00008000):
  457. * 1 -> disable PCI controller (on CAM5200 board).
  458. * use USB: Bits 18-19 (mask 0x00003000):
  459. * 10 -> two UARTs (on FO300 and CAM5200).
  460. * use PSC3: Bits 20-23 (mask: 0x00000f00):
  461. * 0000 -> All PSC3 pins are GPIOs.
  462. * 1100 -> UART/SPI (on FO300 board).
  463. * 0100 -> UART (on CAM5200 board).
  464. * use PSC2: Bits 25:27 (mask: 0x00000030):
  465. * 000 -> All PSC2 pins are GPIOs.
  466. * 100 -> UART (on CAM5200 board).
  467. * 001 -> CAN1/2 on PSC2 pins.
  468. * Use for REV100 STK52xx boards
  469. * 01x -> Use AC97 (on FO300 board).
  470. * use PSC1: Bits 29-31 (mask: 0x00000007):
  471. * 100 -> UART (on all boards).
  472. */
  473. #if defined (CONFIG_MINIFAP)
  474. # define CFG_GPS_PORT_CONFIG 0x91000004
  475. #elif defined (CONFIG_STK52XX)
  476. # if defined (CONFIG_STK52XX_REV100)
  477. # define CFG_GPS_PORT_CONFIG 0x81500014
  478. # else /* STK52xx REV200 and above */
  479. # if defined (CONFIG_TQM5200_REV100)
  480. # error TQM5200 REV100 not supported on STK52XX REV200 or above
  481. # else/* TQM5200 REV200 and above */
  482. # define CFG_GPS_PORT_CONFIG 0x91500004
  483. # endif
  484. # endif
  485. #elif defined (CONFIG_FO300)
  486. # define CFG_GPS_PORT_CONFIG 0x91502c24
  487. #elif defined (CONFIG_CAM5200)
  488. # define CFG_GPS_PORT_CONFIG 0x8050A444
  489. #else /* TMQ5200 Inbetriebnahme-Board */
  490. # define CFG_GPS_PORT_CONFIG 0x81000004
  491. #endif
  492. /*
  493. * RTC configuration
  494. */
  495. #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
  496. # define CONFIG_RTC_M41T11 1
  497. # define CFG_I2C_RTC_ADDR 0x68
  498. # define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
  499. year */
  500. #else
  501. # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
  502. #endif
  503. /*
  504. * Miscellaneous configurable options
  505. */
  506. #define CFG_LONGHELP /* undef to save memory */
  507. #define CFG_PROMPT "=> " /* Monitor Command Prompt */
  508. #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
  509. #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
  510. #define CFG_PROMPT_HUSH_PS2 "> "
  511. #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
  512. #if defined(CONFIG_CMD_KGDB)
  513. #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  514. #endif
  515. #if defined(CONFIG_CMD_KGDB)
  516. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  517. #else
  518. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  519. #endif
  520. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  521. #define CFG_MAXARGS 16 /* max number of command args */
  522. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  523. /* Enable an alternate, more extensive memory test */
  524. #define CFG_ALT_MEMTEST
  525. #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
  526. #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
  527. #define CFG_LOAD_ADDR 0x100000 /* default load address */
  528. #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
  529. /*
  530. * Enable loopw command.
  531. */
  532. #define CONFIG_LOOPW
  533. /*
  534. * Various low-level settings
  535. */
  536. #if defined(CONFIG_MPC5200)
  537. #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
  538. #define CFG_HID0_FINAL HID0_ICE
  539. #else
  540. #define CFG_HID0_INIT 0
  541. #define CFG_HID0_FINAL 0
  542. #endif
  543. #define CFG_BOOTCS_START CFG_FLASH_BASE
  544. #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
  545. #ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
  546. #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
  547. #else
  548. #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
  549. #endif
  550. #define CFG_CS0_START CFG_FLASH_BASE
  551. #define CFG_CS0_SIZE CFG_FLASH_SIZE
  552. #define CONFIG_LAST_STAGE_INIT
  553. /*
  554. * SRAM - Do not map below 2 GB in address space, because this area is used
  555. * for SDRAM autosizing.
  556. */
  557. #define CFG_CS2_START 0xE5000000
  558. #define CFG_CS2_SIZE 0x100000 /* 1 MByte */
  559. #define CFG_CS2_CFG 0x0004D930
  560. /*
  561. * Grafic controller - Do not map below 2 GB in address space, because this
  562. * area is used for SDRAM autosizing.
  563. */
  564. #define SM501_FB_BASE 0xE0000000
  565. #define CFG_CS1_START (SM501_FB_BASE)
  566. #define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
  567. #define CFG_CS1_CFG 0x8F48FF70
  568. #define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
  569. #define CFG_CS_BURST 0x00000000
  570. #define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
  571. #if defined(CONFIG_CAM5200)
  572. #define CFG_CS4_START 0xB0000000
  573. #define CFG_CS4_SIZE 0x00010000
  574. #define CFG_CS4_CFG 0x01019C10
  575. #define CFG_CS5_START 0xD0000000
  576. #define CFG_CS5_SIZE 0x01208000
  577. #define CFG_CS5_CFG 0x1414BF10
  578. #endif
  579. #define CFG_RESET_ADDRESS 0xff000000
  580. /*-----------------------------------------------------------------------
  581. * USB stuff
  582. *-----------------------------------------------------------------------
  583. */
  584. #define CONFIG_USB_CLOCK 0x0001BBBB
  585. #define CONFIG_USB_CONFIG 0x00001000
  586. /*-----------------------------------------------------------------------
  587. * IDE/ATA stuff Supports IDE harddisk
  588. *-----------------------------------------------------------------------
  589. */
  590. #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
  591. #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
  592. #undef CONFIG_IDE_LED /* LED for ide not supported */
  593. #define CONFIG_IDE_RESET /* reset for ide supported */
  594. #define CONFIG_IDE_PREINIT
  595. #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
  596. #define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
  597. #define CFG_ATA_IDE0_OFFSET 0x0000
  598. #define CFG_ATA_BASE_ADDR MPC5XXX_ATA
  599. /* Offset for data I/O */
  600. #define CFG_ATA_DATA_OFFSET (0x0060)
  601. /* Offset for normal register accesses */
  602. #define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
  603. /* Offset for alternate registers */
  604. #define CFG_ATA_ALT_OFFSET (0x005C)
  605. /* Interval between registers */
  606. #define CFG_ATA_STRIDE 4
  607. /*-----------------------------------------------------------------------
  608. * Open firmware flat tree support
  609. *-----------------------------------------------------------------------
  610. */
  611. #define CONFIG_OF_LIBFDT 1
  612. #define CONFIG_OF_BOARD_SETUP 1
  613. #define OF_CPU "PowerPC,5200@0"
  614. #define OF_SOC "soc5200@f0000000"
  615. #define OF_TBCLK (bd->bi_busfreq / 4)
  616. #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
  617. #endif /* __CONFIG_H */