board_f.c 22 KB

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  1. /*
  2. * Copyright (c) 2011 The Chromium OS Authors.
  3. * (C) Copyright 2002-2006
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Marius Groeger <mgroeger@sysgo.de>
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #include <common.h>
  29. #include <linux/compiler.h>
  30. #include <version.h>
  31. #include <environment.h>
  32. #include <fdtdec.h>
  33. #if defined(CONFIG_CMD_IDE)
  34. #include <ide.h>
  35. #endif
  36. #include <i2c.h>
  37. #include <initcall.h>
  38. #include <logbuff.h>
  39. /* TODO: Can we move these into arch/ headers? */
  40. #ifdef CONFIG_8xx
  41. #include <mpc8xx.h>
  42. #endif
  43. #ifdef CONFIG_5xx
  44. #include <mpc5xx.h>
  45. #endif
  46. #ifdef CONFIG_MPC5xxx
  47. #include <mpc5xxx.h>
  48. #endif
  49. #include <post.h>
  50. #include <spi.h>
  51. #include <watchdog.h>
  52. #include <asm/io.h>
  53. #ifdef CONFIG_MP
  54. #include <asm/mp.h>
  55. #endif
  56. #include <asm/sections.h>
  57. #include <linux/compiler.h>
  58. /*
  59. * Pointer to initial global data area
  60. *
  61. * Here we initialize it if needed.
  62. */
  63. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  64. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  65. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  66. DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  67. #else
  68. DECLARE_GLOBAL_DATA_PTR;
  69. #endif
  70. /*
  71. * sjg: IMO this code should be
  72. * refactored to a single function, something like:
  73. *
  74. * void led_set_state(enum led_colour_t colour, int on);
  75. */
  76. /************************************************************************
  77. * Coloured LED functionality
  78. ************************************************************************
  79. * May be supplied by boards if desired
  80. */
  81. inline void __coloured_LED_init(void) {}
  82. void coloured_LED_init(void)
  83. __attribute__((weak, alias("__coloured_LED_init")));
  84. inline void __red_led_on(void) {}
  85. void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
  86. inline void __red_led_off(void) {}
  87. void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
  88. inline void __green_led_on(void) {}
  89. void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
  90. inline void __green_led_off(void) {}
  91. void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
  92. inline void __yellow_led_on(void) {}
  93. void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
  94. inline void __yellow_led_off(void) {}
  95. void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
  96. inline void __blue_led_on(void) {}
  97. void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
  98. inline void __blue_led_off(void) {}
  99. void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
  100. /*
  101. * Why is gd allocated a register? Prior to reloc it might be better to
  102. * just pass it around to each function in this file?
  103. *
  104. * After reloc one could argue that it is hardly used and doesn't need
  105. * to be in a register. Or if it is it should perhaps hold pointers to all
  106. * global data for all modules, so that post-reloc we can avoid the massive
  107. * literal pool we get on ARM. Or perhaps just encourage each module to use
  108. * a structure...
  109. */
  110. /*
  111. * Could the CONFIG_SPL_BUILD infection become a flag in gd?
  112. */
  113. #if defined(CONFIG_WATCHDOG)
  114. static int init_func_watchdog_init(void)
  115. {
  116. puts(" Watchdog enabled\n");
  117. WATCHDOG_RESET();
  118. return 0;
  119. }
  120. int init_func_watchdog_reset(void)
  121. {
  122. WATCHDOG_RESET();
  123. return 0;
  124. }
  125. #endif /* CONFIG_WATCHDOG */
  126. void __board_add_ram_info(int use_default)
  127. {
  128. /* please define platform specific board_add_ram_info() */
  129. }
  130. void board_add_ram_info(int)
  131. __attribute__ ((weak, alias("__board_add_ram_info")));
  132. static int init_baud_rate(void)
  133. {
  134. gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
  135. return 0;
  136. }
  137. static int display_text_info(void)
  138. {
  139. ulong bss_start, bss_end;
  140. #ifdef CONFIG_SYS_SYM_OFFSETS
  141. bss_start = _bss_start_ofs + _TEXT_BASE;
  142. bss_end = _bss_end_ofs + _TEXT_BASE;
  143. #else
  144. bss_start = (ulong)&__bss_start;
  145. bss_end = (ulong)&__bss_end;
  146. #endif
  147. debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
  148. CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
  149. #ifdef CONFIG_MODEM_SUPPORT
  150. debug("Modem Support enabled\n");
  151. #endif
  152. #ifdef CONFIG_USE_IRQ
  153. debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
  154. debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
  155. #endif
  156. return 0;
  157. }
  158. static int announce_dram_init(void)
  159. {
  160. puts("DRAM: ");
  161. return 0;
  162. }
  163. #ifdef CONFIG_PPC
  164. static int init_func_ram(void)
  165. {
  166. #ifdef CONFIG_BOARD_TYPES
  167. int board_type = gd->board_type;
  168. #else
  169. int board_type = 0; /* use dummy arg */
  170. #endif
  171. gd->ram_size = initdram(board_type);
  172. if (gd->ram_size > 0)
  173. return 0;
  174. puts("*** failed ***\n");
  175. return 1;
  176. }
  177. #endif
  178. static int show_dram_config(void)
  179. {
  180. ulong size;
  181. #ifdef CONFIG_NR_DRAM_BANKS
  182. int i;
  183. debug("\nRAM Configuration:\n");
  184. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  185. size += gd->bd->bi_dram[i].size;
  186. debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
  187. #ifdef DEBUG
  188. print_size(gd->bd->bi_dram[i].size, "\n");
  189. #endif
  190. }
  191. debug("\nDRAM: ");
  192. #else
  193. size = gd->ram_size;
  194. #endif
  195. print_size(size, "");
  196. board_add_ram_info(0);
  197. putc('\n');
  198. return 0;
  199. }
  200. ulong get_effective_memsize(void)
  201. {
  202. #ifndef CONFIG_VERY_BIG_RAM
  203. return gd->ram_size;
  204. #else
  205. /* limit stack to what we can reasonable map */
  206. return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
  207. CONFIG_MAX_MEM_MAPPED : gd->ram_size);
  208. #endif
  209. }
  210. void __dram_init_banksize(void)
  211. {
  212. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  213. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  214. gd->bd->bi_dram[0].size = get_effective_memsize();
  215. #endif
  216. }
  217. void dram_init_banksize(void)
  218. __attribute__((weak, alias("__dram_init_banksize")));
  219. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
  220. static int init_func_i2c(void)
  221. {
  222. puts("I2C: ");
  223. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  224. puts("ready\n");
  225. return 0;
  226. }
  227. #endif
  228. #if defined(CONFIG_HARD_SPI)
  229. static int init_func_spi(void)
  230. {
  231. puts("SPI: ");
  232. spi_init();
  233. puts("ready\n");
  234. return 0;
  235. }
  236. #endif
  237. __maybe_unused
  238. static int zero_global_data(void)
  239. {
  240. memset((void *)gd, '\0', sizeof(gd_t));
  241. return 0;
  242. }
  243. static int setup_mon_len(void)
  244. {
  245. #ifdef CONFIG_SYS_SYM_OFFSETS
  246. gd->mon_len = _bss_end_ofs;
  247. #else
  248. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  249. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  250. #endif
  251. return 0;
  252. }
  253. __weak int arch_cpu_init(void)
  254. {
  255. return 0;
  256. }
  257. static int setup_fdt(void)
  258. {
  259. #ifdef CONFIG_OF_EMBED
  260. /* Get a pointer to the FDT */
  261. gd->fdt_blob = _binary_dt_dtb_start;
  262. #elif defined CONFIG_OF_SEPARATE
  263. /* FDT is at end of image */
  264. # ifdef CONFIG_SYS_SYM_OFFSETS
  265. gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
  266. # else
  267. gd->fdt_blob = (ulong *)&_end;
  268. # endif
  269. #endif
  270. /* Allow the early environment to override the fdt address */
  271. gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
  272. (uintptr_t)gd->fdt_blob);
  273. return 0;
  274. }
  275. /* Get the top of usable RAM */
  276. __weak ulong board_get_usable_ram_top(ulong total_size)
  277. {
  278. return gd->ram_top;
  279. }
  280. static int setup_dest_addr(void)
  281. {
  282. debug("Monitor len: %08lX\n", gd->mon_len);
  283. /*
  284. * Ram is setup, size stored in gd !!
  285. */
  286. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  287. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  288. /*
  289. * Subtract specified amount of memory to hide so that it won't
  290. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  291. * the Linux kernel should now get passed the now "corrected"
  292. * memory size and won't touch it either. This should work
  293. * for arch/ppc and arch/powerpc. Only Linux board ports in
  294. * arch/powerpc with bootwrapper support, that recalculate the
  295. * memory size from the SDRAM controller setup will have to
  296. * get fixed.
  297. */
  298. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  299. #endif
  300. #ifdef CONFIG_SYS_SDRAM_BASE
  301. gd->ram_top = CONFIG_SYS_SDRAM_BASE;
  302. #endif
  303. gd->ram_top += get_effective_memsize();
  304. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  305. gd->dest_addr = gd->ram_top;
  306. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  307. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  308. /*
  309. * We need to make sure the location we intend to put secondary core
  310. * boot code is reserved and not used by any part of u-boot
  311. */
  312. if (gd->dest_addr > determine_mp_bootpg(NULL)) {
  313. gd->dest_addr = determine_mp_bootpg(NULL);
  314. debug("Reserving MP boot page to %08lx\n", gd->dest_addr);
  315. }
  316. #endif
  317. gd->dest_addr_sp = gd->dest_addr;
  318. return 0;
  319. }
  320. #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
  321. static int reserve_logbuffer(void)
  322. {
  323. /* reserve kernel log buffer */
  324. gd->dest_addr -= LOGBUFF_RESERVE;
  325. debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
  326. gd->dest_addr);
  327. return 0;
  328. }
  329. #endif
  330. #ifdef CONFIG_PRAM
  331. /* reserve protected RAM */
  332. static int reserve_pram(void)
  333. {
  334. ulong reg;
  335. reg = getenv_ulong("pram", 10, CONFIG_PRAM);
  336. gd->dest_addr -= (reg << 10); /* size is in kB */
  337. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  338. gd->dest_addr);
  339. return 0;
  340. }
  341. #endif /* CONFIG_PRAM */
  342. /* Round memory pointer down to next 4 kB limit */
  343. static int reserve_round_4k(void)
  344. {
  345. gd->dest_addr &= ~(4096 - 1);
  346. return 0;
  347. }
  348. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
  349. defined(CONFIG_ARM)
  350. static int reserve_mmu(void)
  351. {
  352. /* reserve TLB table */
  353. gd->arch.tlb_size = 4096 * 4;
  354. gd->dest_addr -= gd->arch.tlb_size;
  355. /* round down to next 64 kB limit */
  356. gd->dest_addr &= ~(0x10000 - 1);
  357. gd->arch.tlb_addr = gd->dest_addr;
  358. debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
  359. gd->arch.tlb_addr + gd->arch.tlb_size);
  360. return 0;
  361. }
  362. #endif
  363. #ifdef CONFIG_LCD
  364. static int reserve_lcd(void)
  365. {
  366. #ifdef CONFIG_FB_ADDR
  367. gd->fb_base = CONFIG_FB_ADDR;
  368. #else
  369. /* reserve memory for LCD display (always full pages) */
  370. gd->dest_addr = lcd_setmem(gd->dest_addr);
  371. gd->fb_base = gd->dest_addr;
  372. #endif /* CONFIG_FB_ADDR */
  373. return 0;
  374. }
  375. #endif /* CONFIG_LCD */
  376. #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
  377. && !defined(CONFIG_ARM)
  378. static int reserve_video(void)
  379. {
  380. /* reserve memory for video display (always full pages) */
  381. gd->dest_addr = video_setmem(gd->dest_addr);
  382. gd->fb_base = gd->dest_addr;
  383. return 0;
  384. }
  385. #endif
  386. static int reserve_uboot(void)
  387. {
  388. /*
  389. * reserve memory for U-Boot code, data & bss
  390. * round down to next 4 kB limit
  391. */
  392. gd->dest_addr -= gd->mon_len;
  393. gd->dest_addr &= ~(4096 - 1);
  394. #ifdef CONFIG_E500
  395. /* round down to next 64 kB limit so that IVPR stays aligned */
  396. gd->dest_addr &= ~(65536 - 1);
  397. #endif
  398. debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
  399. gd->dest_addr);
  400. return 0;
  401. }
  402. #ifndef CONFIG_SPL_BUILD
  403. /* reserve memory for malloc() area */
  404. static int reserve_malloc(void)
  405. {
  406. gd->dest_addr_sp = gd->dest_addr - TOTAL_MALLOC_LEN;
  407. debug("Reserving %dk for malloc() at: %08lx\n",
  408. TOTAL_MALLOC_LEN >> 10, gd->dest_addr_sp);
  409. return 0;
  410. }
  411. /* (permanently) allocate a Board Info struct */
  412. static int reserve_board(void)
  413. {
  414. gd->dest_addr_sp -= sizeof(bd_t);
  415. gd->bd = (bd_t *)gd->dest_addr_sp;
  416. memset(gd->bd, '\0', sizeof(bd_t));
  417. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  418. sizeof(bd_t), gd->dest_addr_sp);
  419. return 0;
  420. }
  421. #endif
  422. static int setup_machine(void)
  423. {
  424. #ifdef CONFIG_MACH_TYPE
  425. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  426. #endif
  427. return 0;
  428. }
  429. static int reserve_global_data(void)
  430. {
  431. gd->dest_addr_sp -= sizeof(gd_t);
  432. gd->new_gd = (gd_t *)gd->dest_addr_sp;
  433. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  434. sizeof(gd_t), gd->dest_addr_sp);
  435. return 0;
  436. }
  437. static int reserve_fdt(void)
  438. {
  439. /*
  440. * If the device tree is sitting immediate above our image then we
  441. * must relocate it. If it is embedded in the data section, then it
  442. * will be relocated with other data.
  443. */
  444. if (gd->fdt_blob) {
  445. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  446. gd->dest_addr_sp -= gd->fdt_size;
  447. gd->new_fdt = (void *)gd->dest_addr_sp;
  448. debug("Reserving %lu Bytes for FDT at: %p\n",
  449. gd->fdt_size, gd->new_fdt);
  450. }
  451. return 0;
  452. }
  453. static int reserve_stacks(void)
  454. {
  455. #ifdef CONFIG_SPL_BUILD
  456. # ifdef CONFIG_ARM
  457. gd->dest_addr_sp -= 128; /* leave 32 words for abort-stack */
  458. gd->irq_sp = gd->dest_addr_sp;
  459. # endif
  460. #else
  461. # ifdef CONFIG_PPC
  462. ulong *s;
  463. # endif
  464. /* setup stack pointer for exceptions */
  465. gd->dest_addr_sp -= 16;
  466. gd->dest_addr_sp &= ~0xf;
  467. gd->irq_sp = gd->dest_addr_sp;
  468. /*
  469. * Handle architecture-specific things here
  470. * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
  471. * to handle this and put in arch/xxx/lib/stack.c
  472. */
  473. # ifdef CONFIG_ARM
  474. # ifdef CONFIG_USE_IRQ
  475. gd->dest_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
  476. debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
  477. CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->dest_addr_sp);
  478. /* 8-byte alignment for ARM ABI compliance */
  479. gd->dest_addr_sp &= ~0x07;
  480. # endif
  481. /* leave 3 words for abort-stack, plus 1 for alignment */
  482. gd->dest_addr_sp -= 16;
  483. # elif defined(CONFIG_PPC)
  484. /* Clear initial stack frame */
  485. s = (ulong *) gd->dest_addr_sp;
  486. *s = 0; /* Terminate back chain */
  487. *++s = 0; /* NULL return address */
  488. # endif /* Architecture specific code */
  489. return 0;
  490. #endif
  491. }
  492. static int display_new_sp(void)
  493. {
  494. debug("New Stack Pointer is: %08lx\n", gd->dest_addr_sp);
  495. return 0;
  496. }
  497. #ifdef CONFIG_PPC
  498. static int setup_board_part1(void)
  499. {
  500. bd_t *bd = gd->bd;
  501. /*
  502. * Save local variables to board info struct
  503. */
  504. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  505. bd->bi_memsize = gd->ram_size; /* size in bytes */
  506. #ifdef CONFIG_SYS_SRAM_BASE
  507. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  508. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  509. #endif
  510. #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
  511. defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  512. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  513. #endif
  514. #if defined(CONFIG_MPC5xxx)
  515. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  516. #endif
  517. #if defined(CONFIG_MPC83xx)
  518. bd->bi_immrbar = CONFIG_SYS_IMMR;
  519. #endif
  520. #if defined(CONFIG_MPC8220)
  521. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  522. bd->bi_inpfreq = gd->arch.inp_clk;
  523. bd->bi_pcifreq = gd->pci_clk;
  524. bd->bi_vcofreq = gd->arch.vco_clk;
  525. bd->bi_pevfreq = gd->arch.pev_clk;
  526. bd->bi_flbfreq = gd->arch.flb_clk;
  527. /* store bootparam to sram (backward compatible), here? */
  528. {
  529. u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
  530. *sram++ = gd->ram_size;
  531. *sram++ = gd->bus_clk;
  532. *sram++ = gd->arch.inp_clk;
  533. *sram++ = gd->cpu_clk;
  534. *sram++ = gd->arch.vco_clk;
  535. *sram++ = gd->arch.flb_clk;
  536. *sram++ = 0xb8c3ba11; /* boot signature */
  537. }
  538. #endif
  539. return 0;
  540. }
  541. static int setup_board_part2(void)
  542. {
  543. bd_t *bd = gd->bd;
  544. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  545. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  546. #if defined(CONFIG_CPM2)
  547. bd->bi_cpmfreq = gd->arch.cpm_clk;
  548. bd->bi_brgfreq = gd->arch.brg_clk;
  549. bd->bi_sccfreq = gd->arch.scc_clk;
  550. bd->bi_vco = gd->arch.vco_out;
  551. #endif /* CONFIG_CPM2 */
  552. #if defined(CONFIG_MPC512X)
  553. bd->bi_ipsfreq = gd->arch.ips_clk;
  554. #endif /* CONFIG_MPC512X */
  555. #if defined(CONFIG_MPC5xxx)
  556. bd->bi_ipbfreq = gd->arch.ipb_clk;
  557. bd->bi_pcifreq = gd->pci_clk;
  558. #endif /* CONFIG_MPC5xxx */
  559. return 0;
  560. }
  561. #endif
  562. #ifdef CONFIG_SYS_EXTBDINFO
  563. static int setup_board_extra(void)
  564. {
  565. bd_t *bd = gd->bd;
  566. strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
  567. strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
  568. sizeof(bd->bi_r_version));
  569. bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
  570. bd->bi_plb_busfreq = gd->bus_clk;
  571. #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
  572. defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
  573. defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
  574. bd->bi_pci_busfreq = get_PCI_freq();
  575. bd->bi_opbfreq = get_OPB_freq();
  576. #elif defined(CONFIG_XILINX_405)
  577. bd->bi_pci_busfreq = get_PCI_freq();
  578. #endif
  579. return 0;
  580. }
  581. #endif
  582. #ifdef CONFIG_POST
  583. static int init_post(void)
  584. {
  585. post_bootmode_init();
  586. post_run(NULL, POST_ROM | post_bootmode_get(0));
  587. return 0;
  588. }
  589. #endif
  590. static int setup_baud_rate(void)
  591. {
  592. /* Ick, can we get rid of this line? */
  593. gd->bd->bi_baudrate = gd->baudrate;
  594. return 0;
  595. }
  596. static int setup_dram_config(void)
  597. {
  598. /* Ram is board specific, so move it to board code ... */
  599. dram_init_banksize();
  600. return 0;
  601. }
  602. static int reloc_fdt(void)
  603. {
  604. if (gd->new_fdt) {
  605. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  606. gd->fdt_blob = gd->new_fdt;
  607. }
  608. return 0;
  609. }
  610. static int setup_reloc(void)
  611. {
  612. gd->relocaddr = gd->dest_addr;
  613. gd->start_addr_sp = gd->dest_addr_sp;
  614. gd->reloc_off = gd->dest_addr - CONFIG_SYS_TEXT_BASE;
  615. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  616. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  617. debug("Relocating to %08lx, new gd at %p, sp at %08lx\n",
  618. gd->dest_addr, gd->new_gd, gd->dest_addr_sp);
  619. return 0;
  620. }
  621. /* ARM calls relocate_code from its crt0.S */
  622. #if !defined(CONFIG_ARM)
  623. static int jump_to_copy(void)
  624. {
  625. relocate_code(gd->dest_addr_sp, gd->new_gd, gd->dest_addr);
  626. return 0;
  627. }
  628. #endif
  629. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  630. static int mark_bootstage(void)
  631. {
  632. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  633. return 0;
  634. }
  635. static init_fnc_t init_sequence_f[] = {
  636. #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
  637. !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
  638. !defined(CONFIG_MPC86xx)
  639. zero_global_data,
  640. #endif
  641. setup_fdt,
  642. setup_mon_len,
  643. #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
  644. /* TODO: can this go into arch_cpu_init()? */
  645. probecpu,
  646. #endif
  647. arch_cpu_init, /* basic arch cpu dependent setup */
  648. mark_bootstage,
  649. #ifdef CONFIG_OF_CONTROL
  650. fdtdec_check_fdt,
  651. #endif
  652. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  653. board_early_init_f,
  654. #endif
  655. /* TODO: can any of this go into arch_cpu_init()? */
  656. #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
  657. get_clocks, /* get CPU and bus clocks (etc.) */
  658. #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
  659. && !defined(CONFIG_TQM885D)
  660. adjust_sdram_tbs_8xx,
  661. #endif
  662. /* TODO: can we rename this to timer_init()? */
  663. init_timebase,
  664. #endif
  665. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  666. board_early_init_f,
  667. #endif
  668. #ifdef CONFIG_ARM
  669. timer_init, /* initialize timer */
  670. #endif
  671. #ifdef CONFIG_BOARD_POSTCLK_INIT
  672. board_postclk_init,
  673. #endif
  674. #ifdef CONFIG_FSL_ESDHC
  675. get_clocks,
  676. #endif
  677. #ifdef CONFIG_SYS_ALLOC_DPRAM
  678. #if !defined(CONFIG_CPM2)
  679. dpram_init,
  680. #endif
  681. #endif
  682. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  683. board_postclk_init,
  684. #endif
  685. env_init, /* initialize environment */
  686. #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
  687. /* get CPU and bus clocks according to the environment variable */
  688. get_clocks_866,
  689. /* adjust sdram refresh rate according to the new clock */
  690. sdram_adjust_866,
  691. init_timebase,
  692. #endif
  693. init_baud_rate, /* initialze baudrate settings */
  694. serial_init, /* serial communications setup */
  695. console_init_f, /* stage 1 init of console */
  696. display_options, /* say that we are here */
  697. display_text_info, /* show debugging info if required */
  698. #if defined(CONFIG_8260)
  699. prt_8260_rsr,
  700. prt_8260_clks,
  701. #endif /* CONFIG_8260 */
  702. #if defined(CONFIG_MPC83xx)
  703. prt_83xx_rsr,
  704. #endif
  705. #ifdef CONFIG_PPC
  706. checkcpu,
  707. #endif
  708. #if defined(CONFIG_DISPLAY_CPUINFO)
  709. print_cpuinfo, /* display cpu info (and speed) */
  710. #endif
  711. #if defined(CONFIG_MPC5xxx)
  712. prt_mpc5xxx_clks,
  713. #endif /* CONFIG_MPC5xxx */
  714. #if defined(CONFIG_MPC8220)
  715. prt_mpc8220_clks,
  716. #endif
  717. #if defined(CONFIG_DISPLAY_BOARDINFO)
  718. checkboard, /* display board info */
  719. #endif
  720. INIT_FUNC_WATCHDOG_INIT
  721. #if defined(CONFIG_MISC_INIT_F)
  722. misc_init_f,
  723. #endif
  724. INIT_FUNC_WATCHDOG_RESET
  725. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
  726. init_func_i2c,
  727. #endif
  728. #if defined(CONFIG_HARD_SPI)
  729. init_func_spi,
  730. #endif
  731. #ifdef CONFIG_X86
  732. dram_init_f, /* configure available RAM banks */
  733. #endif
  734. announce_dram_init,
  735. /* TODO: unify all these dram functions? */
  736. #ifdef CONFIG_ARM
  737. dram_init, /* configure available RAM banks */
  738. #endif
  739. #ifdef CONFIG_PPC
  740. init_func_ram,
  741. #endif
  742. #ifdef CONFIG_POST
  743. post_init_f,
  744. #endif
  745. INIT_FUNC_WATCHDOG_RESET
  746. #if defined(CONFIG_SYS_DRAM_TEST)
  747. testdram,
  748. #endif /* CONFIG_SYS_DRAM_TEST */
  749. INIT_FUNC_WATCHDOG_RESET
  750. #ifdef CONFIG_POST
  751. init_post,
  752. #endif
  753. INIT_FUNC_WATCHDOG_RESET
  754. /*
  755. * Now that we have DRAM mapped and working, we can
  756. * relocate the code and continue running from DRAM.
  757. *
  758. * Reserve memory at end of RAM for (top down in that order):
  759. * - area that won't get touched by U-Boot and Linux (optional)
  760. * - kernel log buffer
  761. * - protected RAM
  762. * - LCD framebuffer
  763. * - monitor code
  764. * - board info struct
  765. */
  766. setup_dest_addr,
  767. #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
  768. reserve_logbuffer,
  769. #endif
  770. #ifdef CONFIG_PRAM
  771. reserve_pram,
  772. #endif
  773. reserve_round_4k,
  774. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
  775. defined(CONFIG_ARM)
  776. reserve_mmu,
  777. #endif
  778. #ifdef CONFIG_LCD
  779. reserve_lcd,
  780. #endif
  781. /* TODO: Why the dependency on CONFIG_8xx? */
  782. #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
  783. && !defined(CONFIG_ARM)
  784. reserve_video,
  785. #endif
  786. reserve_uboot,
  787. #ifndef CONFIG_SPL_BUILD
  788. reserve_malloc,
  789. reserve_board,
  790. #endif
  791. setup_machine,
  792. reserve_global_data,
  793. reserve_fdt,
  794. reserve_stacks,
  795. setup_dram_config,
  796. show_dram_config,
  797. #ifdef CONFIG_PPC
  798. setup_board_part1,
  799. INIT_FUNC_WATCHDOG_RESET
  800. setup_board_part2,
  801. #endif
  802. setup_baud_rate,
  803. display_new_sp,
  804. #ifdef CONFIG_SYS_EXTBDINFO
  805. setup_board_extra,
  806. #endif
  807. INIT_FUNC_WATCHDOG_RESET
  808. reloc_fdt,
  809. setup_reloc,
  810. #ifndef CONFIG_ARM
  811. jump_to_copy,
  812. #endif
  813. NULL,
  814. };
  815. void board_init_f(ulong boot_flags)
  816. {
  817. gd_t data;
  818. gd = &data;
  819. gd->flags = boot_flags;
  820. if (initcall_run_list(init_sequence_f))
  821. hang();
  822. #ifndef CONFIG_ARM
  823. /* NOTREACHED - jump_to_copy() does not return */
  824. hang();
  825. #endif
  826. }
  827. void hang(void)
  828. {
  829. puts("### ERROR ### Please RESET the board ###\n");
  830. for (;;);
  831. }