cfi_flash.c 51 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. #ifdef CFG_FLASH_CFI_DRIVER
  41. /*
  42. * This file implements a Common Flash Interface (CFI) driver for
  43. * U-Boot.
  44. *
  45. * The width of the port and the width of the chips are determined at
  46. * initialization. These widths are used to calculate the address for
  47. * access CFI data structures.
  48. *
  49. * References
  50. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  51. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  52. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  53. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  54. * AMD CFI Specification, Release 2.0 December 1, 2001
  55. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  56. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  57. *
  58. * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  59. * reading and writing ... (yes there is such a Hardware).
  60. */
  61. #ifndef CFG_FLASH_BANKS_LIST
  62. #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  63. #endif
  64. #define FLASH_CMD_CFI 0x98
  65. #define FLASH_CMD_READ_ID 0x90
  66. #define FLASH_CMD_RESET 0xff
  67. #define FLASH_CMD_BLOCK_ERASE 0x20
  68. #define FLASH_CMD_ERASE_CONFIRM 0xD0
  69. #define FLASH_CMD_WRITE 0x40
  70. #define FLASH_CMD_PROTECT 0x60
  71. #define FLASH_CMD_PROTECT_SET 0x01
  72. #define FLASH_CMD_PROTECT_CLEAR 0xD0
  73. #define FLASH_CMD_CLEAR_STATUS 0x50
  74. #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
  75. #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
  76. #define FLASH_STATUS_DONE 0x80
  77. #define FLASH_STATUS_ESS 0x40
  78. #define FLASH_STATUS_ECLBS 0x20
  79. #define FLASH_STATUS_PSLBS 0x10
  80. #define FLASH_STATUS_VPENS 0x08
  81. #define FLASH_STATUS_PSS 0x04
  82. #define FLASH_STATUS_DPS 0x02
  83. #define FLASH_STATUS_R 0x01
  84. #define FLASH_STATUS_PROTECT 0x01
  85. #define AMD_CMD_RESET 0xF0
  86. #define AMD_CMD_WRITE 0xA0
  87. #define AMD_CMD_ERASE_START 0x80
  88. #define AMD_CMD_ERASE_SECTOR 0x30
  89. #define AMD_CMD_UNLOCK_START 0xAA
  90. #define AMD_CMD_UNLOCK_ACK 0x55
  91. #define AMD_CMD_WRITE_TO_BUFFER 0x25
  92. #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
  93. #define AMD_STATUS_TOGGLE 0x40
  94. #define AMD_STATUS_ERROR 0x20
  95. #define FLASH_OFFSET_MANUFACTURER_ID 0x00
  96. #define FLASH_OFFSET_DEVICE_ID 0x01
  97. #define FLASH_OFFSET_DEVICE_ID2 0x0E
  98. #define FLASH_OFFSET_DEVICE_ID3 0x0F
  99. #define FLASH_OFFSET_CFI 0x55
  100. #define FLASH_OFFSET_CFI_ALT 0x555
  101. #define FLASH_OFFSET_CFI_RESP 0x10
  102. #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
  103. /* extended query table primary address */
  104. #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
  105. #define FLASH_OFFSET_WTOUT 0x1F
  106. #define FLASH_OFFSET_WBTOUT 0x20
  107. #define FLASH_OFFSET_ETOUT 0x21
  108. #define FLASH_OFFSET_CETOUT 0x22
  109. #define FLASH_OFFSET_WMAX_TOUT 0x23
  110. #define FLASH_OFFSET_WBMAX_TOUT 0x24
  111. #define FLASH_OFFSET_EMAX_TOUT 0x25
  112. #define FLASH_OFFSET_CEMAX_TOUT 0x26
  113. #define FLASH_OFFSET_SIZE 0x27
  114. #define FLASH_OFFSET_INTERFACE 0x28
  115. #define FLASH_OFFSET_BUFFER_SIZE 0x2A
  116. #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
  117. #define FLASH_OFFSET_ERASE_REGIONS 0x2D
  118. #define FLASH_OFFSET_PROTECT 0x02
  119. #define FLASH_OFFSET_USER_PROTECTION 0x85
  120. #define FLASH_OFFSET_INTEL_PROTECTION 0x81
  121. #define CFI_CMDSET_NONE 0
  122. #define CFI_CMDSET_INTEL_EXTENDED 1
  123. #define CFI_CMDSET_AMD_STANDARD 2
  124. #define CFI_CMDSET_INTEL_STANDARD 3
  125. #define CFI_CMDSET_AMD_EXTENDED 4
  126. #define CFI_CMDSET_MITSU_STANDARD 256
  127. #define CFI_CMDSET_MITSU_EXTENDED 257
  128. #define CFI_CMDSET_SST 258
  129. #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
  130. # undef FLASH_CMD_RESET
  131. # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
  132. #endif
  133. typedef union {
  134. unsigned char c;
  135. unsigned short w;
  136. unsigned long l;
  137. unsigned long long ll;
  138. } cfiword_t;
  139. #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
  140. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  141. /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
  142. #ifdef CFG_MAX_FLASH_BANKS_DETECT
  143. static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
  144. flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
  145. #else
  146. static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
  147. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
  148. #endif
  149. /*
  150. * Check if chip width is defined. If not, start detecting with 8bit.
  151. */
  152. #ifndef CFG_FLASH_CFI_WIDTH
  153. #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  154. #endif
  155. typedef unsigned long flash_sect_t;
  156. /* CFI standard query structure */
  157. struct cfi_qry {
  158. u8 qry[3];
  159. u16 p_id;
  160. u16 p_adr;
  161. u16 a_id;
  162. u16 a_adr;
  163. u8 vcc_min;
  164. u8 vcc_max;
  165. u8 vpp_min;
  166. u8 vpp_max;
  167. u8 word_write_timeout_typ;
  168. u8 buf_write_timeout_typ;
  169. u8 block_erase_timeout_typ;
  170. u8 chip_erase_timeout_typ;
  171. u8 word_write_timeout_max;
  172. u8 buf_write_timeout_max;
  173. u8 block_erase_timeout_max;
  174. u8 chip_erase_timeout_max;
  175. u8 dev_size;
  176. u16 interface_desc;
  177. u16 max_buf_write_size;
  178. u8 num_erase_regions;
  179. u32 erase_region_info[NUM_ERASE_REGIONS];
  180. } __attribute__((packed));
  181. struct cfi_pri_hdr {
  182. u8 pri[3];
  183. u8 major_version;
  184. u8 minor_version;
  185. } __attribute__((packed));
  186. static void flash_write8(u8 value, void *addr)
  187. {
  188. __raw_writeb(value, addr);
  189. }
  190. static void flash_write16(u16 value, void *addr)
  191. {
  192. __raw_writew(value, addr);
  193. }
  194. static void flash_write32(u32 value, void *addr)
  195. {
  196. __raw_writel(value, addr);
  197. }
  198. static void flash_write64(u64 value, void *addr)
  199. {
  200. /* No architectures currently implement __raw_writeq() */
  201. *(volatile u64 *)addr = value;
  202. }
  203. static u8 flash_read8(void *addr)
  204. {
  205. return __raw_readb(addr);
  206. }
  207. static u16 flash_read16(void *addr)
  208. {
  209. return __raw_readw(addr);
  210. }
  211. static u32 flash_read32(void *addr)
  212. {
  213. return __raw_readl(addr);
  214. }
  215. static u64 __flash_read64(void *addr)
  216. {
  217. /* No architectures currently implement __raw_readq() */
  218. return *(volatile u64 *)addr;
  219. }
  220. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  221. /*-----------------------------------------------------------------------
  222. */
  223. #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
  224. static flash_info_t *flash_get_info(ulong base)
  225. {
  226. int i;
  227. flash_info_t * info = 0;
  228. for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
  229. info = & flash_info[i];
  230. if (info->size && info->start[0] <= base &&
  231. base <= info->start[0] + info->size - 1)
  232. break;
  233. }
  234. return i == CFG_MAX_FLASH_BANKS ? 0 : info;
  235. }
  236. #endif
  237. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  238. {
  239. if (sect != (info->sector_count - 1))
  240. return info->start[sect + 1] - info->start[sect];
  241. else
  242. return info->start[0] + info->size - info->start[sect];
  243. }
  244. /*-----------------------------------------------------------------------
  245. * create an address based on the offset and the port width
  246. */
  247. static inline void *
  248. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  249. {
  250. unsigned int byte_offset = offset * info->portwidth;
  251. return map_physmem(info->start[sect] + byte_offset,
  252. flash_sector_size(info, sect) - byte_offset,
  253. MAP_NOCACHE);
  254. }
  255. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  256. unsigned int offset, void *addr)
  257. {
  258. unsigned int byte_offset = offset * info->portwidth;
  259. unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
  260. }
  261. /*-----------------------------------------------------------------------
  262. * make a proper sized command based on the port and chip widths
  263. */
  264. static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
  265. {
  266. int i;
  267. uchar *cp = (uchar *) cmdbuf;
  268. #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
  269. for (i = info->portwidth; i > 0; i--)
  270. #else
  271. for (i = 1; i <= info->portwidth; i++)
  272. #endif
  273. *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
  274. }
  275. #ifdef DEBUG
  276. /*-----------------------------------------------------------------------
  277. * Debug support
  278. */
  279. static void print_longlong (char *str, unsigned long long data)
  280. {
  281. int i;
  282. char *cp;
  283. cp = (unsigned char *) &data;
  284. for (i = 0; i < 8; i++)
  285. sprintf (&str[i * 2], "%2.2x", *cp++);
  286. }
  287. static void flash_printqry (struct cfi_qry *qry)
  288. {
  289. u8 *p = (u8 *)qry;
  290. int x, y;
  291. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  292. debug("%02x : ", x);
  293. for (y = 0; y < 16; y++)
  294. debug("%2.2x ", p[x + y]);
  295. debug(" ");
  296. for (y = 0; y < 16; y++) {
  297. unsigned char c = p[x + y];
  298. if (c >= 0x20 && c <= 0x7e)
  299. debug("%c", c);
  300. else
  301. debug(".");
  302. }
  303. debug("\n");
  304. }
  305. }
  306. #endif
  307. /*-----------------------------------------------------------------------
  308. * read a character at a port width address
  309. */
  310. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  311. {
  312. uchar *cp;
  313. uchar retval;
  314. cp = flash_map (info, 0, offset);
  315. #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
  316. retval = flash_read8(cp);
  317. #else
  318. retval = flash_read8(cp + info->portwidth - 1);
  319. #endif
  320. flash_unmap (info, 0, offset, cp);
  321. return retval;
  322. }
  323. /*-----------------------------------------------------------------------
  324. * read a word at a port width address, assume 16bit bus
  325. */
  326. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  327. {
  328. ushort *addr, retval;
  329. addr = flash_map (info, 0, offset);
  330. retval = flash_read16 (addr);
  331. flash_unmap (info, 0, offset, addr);
  332. return retval;
  333. }
  334. /*-----------------------------------------------------------------------
  335. * read a long word by picking the least significant byte of each maximum
  336. * port size word. Swap for ppc format.
  337. */
  338. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  339. uint offset)
  340. {
  341. uchar *addr;
  342. ulong retval;
  343. #ifdef DEBUG
  344. int x;
  345. #endif
  346. addr = flash_map (info, sect, offset);
  347. #ifdef DEBUG
  348. debug ("long addr is at %p info->portwidth = %d\n", addr,
  349. info->portwidth);
  350. for (x = 0; x < 4 * info->portwidth; x++) {
  351. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  352. }
  353. #endif
  354. #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
  355. retval = ((flash_read8(addr) << 16) |
  356. (flash_read8(addr + info->portwidth) << 24) |
  357. (flash_read8(addr + 2 * info->portwidth)) |
  358. (flash_read8(addr + 3 * info->portwidth) << 8));
  359. #else
  360. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  361. (flash_read8(addr + info->portwidth - 1) << 16) |
  362. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  363. (flash_read8(addr + 3 * info->portwidth - 1)));
  364. #endif
  365. flash_unmap(info, sect, offset, addr);
  366. return retval;
  367. }
  368. /*
  369. * Write a proper sized command to the correct address
  370. */
  371. static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  372. uint offset, uchar cmd)
  373. {
  374. void *addr;
  375. cfiword_t cword;
  376. addr = flash_map (info, sect, offset);
  377. flash_make_cmd (info, cmd, &cword);
  378. switch (info->portwidth) {
  379. case FLASH_CFI_8BIT:
  380. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  381. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  382. flash_write8(cword.c, addr);
  383. break;
  384. case FLASH_CFI_16BIT:
  385. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  386. cmd, cword.w,
  387. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  388. flash_write16(cword.w, addr);
  389. break;
  390. case FLASH_CFI_32BIT:
  391. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  392. cmd, cword.l,
  393. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  394. flash_write32(cword.l, addr);
  395. break;
  396. case FLASH_CFI_64BIT:
  397. #ifdef DEBUG
  398. {
  399. char str[20];
  400. print_longlong (str, cword.ll);
  401. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  402. addr, cmd, str,
  403. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  404. }
  405. #endif
  406. flash_write64(cword.ll, addr);
  407. break;
  408. }
  409. /* Ensure all the instructions are fully finished */
  410. sync();
  411. flash_unmap(info, sect, offset, addr);
  412. }
  413. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  414. {
  415. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  416. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  417. }
  418. /*-----------------------------------------------------------------------
  419. */
  420. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  421. uint offset, uchar cmd)
  422. {
  423. void *addr;
  424. cfiword_t cword;
  425. int retval;
  426. addr = flash_map (info, sect, offset);
  427. flash_make_cmd (info, cmd, &cword);
  428. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  429. switch (info->portwidth) {
  430. case FLASH_CFI_8BIT:
  431. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  432. retval = (flash_read8(addr) == cword.c);
  433. break;
  434. case FLASH_CFI_16BIT:
  435. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  436. retval = (flash_read16(addr) == cword.w);
  437. break;
  438. case FLASH_CFI_32BIT:
  439. debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l);
  440. retval = (flash_read32(addr) == cword.l);
  441. break;
  442. case FLASH_CFI_64BIT:
  443. #ifdef DEBUG
  444. {
  445. char str1[20];
  446. char str2[20];
  447. print_longlong (str1, flash_read64(addr));
  448. print_longlong (str2, cword.ll);
  449. debug ("is= %s %s\n", str1, str2);
  450. }
  451. #endif
  452. retval = (flash_read64(addr) == cword.ll);
  453. break;
  454. default:
  455. retval = 0;
  456. break;
  457. }
  458. flash_unmap(info, sect, offset, addr);
  459. return retval;
  460. }
  461. /*-----------------------------------------------------------------------
  462. */
  463. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  464. uint offset, uchar cmd)
  465. {
  466. void *addr;
  467. cfiword_t cword;
  468. int retval;
  469. addr = flash_map (info, sect, offset);
  470. flash_make_cmd (info, cmd, &cword);
  471. switch (info->portwidth) {
  472. case FLASH_CFI_8BIT:
  473. retval = ((flash_read8(addr) & cword.c) == cword.c);
  474. break;
  475. case FLASH_CFI_16BIT:
  476. retval = ((flash_read16(addr) & cword.w) == cword.w);
  477. break;
  478. case FLASH_CFI_32BIT:
  479. retval = ((flash_read32(addr) & cword.l) == cword.l);
  480. break;
  481. case FLASH_CFI_64BIT:
  482. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  483. break;
  484. default:
  485. retval = 0;
  486. break;
  487. }
  488. flash_unmap(info, sect, offset, addr);
  489. return retval;
  490. }
  491. /*-----------------------------------------------------------------------
  492. */
  493. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  494. uint offset, uchar cmd)
  495. {
  496. void *addr;
  497. cfiword_t cword;
  498. int retval;
  499. addr = flash_map (info, sect, offset);
  500. flash_make_cmd (info, cmd, &cword);
  501. switch (info->portwidth) {
  502. case FLASH_CFI_8BIT:
  503. retval = ((flash_read8(addr) & cword.c) !=
  504. (flash_read8(addr) & cword.c));
  505. break;
  506. case FLASH_CFI_16BIT:
  507. retval = ((flash_read16(addr) & cword.w) !=
  508. (flash_read16(addr) & cword.w));
  509. break;
  510. case FLASH_CFI_32BIT:
  511. retval = ((flash_read32(addr) & cword.l) !=
  512. (flash_read32(addr) & cword.l));
  513. break;
  514. case FLASH_CFI_64BIT:
  515. retval = ((flash_read64(addr) & cword.ll) !=
  516. (flash_read64(addr) & cword.ll));
  517. break;
  518. default:
  519. retval = 0;
  520. break;
  521. }
  522. flash_unmap(info, sect, offset, addr);
  523. return retval;
  524. }
  525. /*
  526. * flash_is_busy - check to see if the flash is busy
  527. *
  528. * This routine checks the status of the chip and returns true if the
  529. * chip is busy.
  530. */
  531. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  532. {
  533. int retval;
  534. switch (info->vendor) {
  535. case CFI_CMDSET_INTEL_STANDARD:
  536. case CFI_CMDSET_INTEL_EXTENDED:
  537. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  538. break;
  539. case CFI_CMDSET_AMD_STANDARD:
  540. case CFI_CMDSET_AMD_EXTENDED:
  541. #ifdef CONFIG_FLASH_CFI_LEGACY
  542. case CFI_CMDSET_AMD_LEGACY:
  543. #endif
  544. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  545. break;
  546. default:
  547. retval = 0;
  548. }
  549. debug ("flash_is_busy: %d\n", retval);
  550. return retval;
  551. }
  552. /*-----------------------------------------------------------------------
  553. * wait for XSR.7 to be set. Time out with an error if it does not.
  554. * This routine does not set the flash to read-array mode.
  555. */
  556. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  557. ulong tout, char *prompt)
  558. {
  559. ulong start;
  560. #if CFG_HZ != 1000
  561. tout *= CFG_HZ/1000;
  562. #endif
  563. /* Wait for command completion */
  564. start = get_timer (0);
  565. while (flash_is_busy (info, sector)) {
  566. if (get_timer (start) > tout) {
  567. printf ("Flash %s timeout at address %lx data %lx\n",
  568. prompt, info->start[sector],
  569. flash_read_long (info, sector, 0));
  570. flash_write_cmd (info, sector, 0, info->cmd_reset);
  571. return ERR_TIMOUT;
  572. }
  573. udelay (1); /* also triggers watchdog */
  574. }
  575. return ERR_OK;
  576. }
  577. /*-----------------------------------------------------------------------
  578. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  579. * do a full status check.
  580. *
  581. * This routine sets the flash to read-array mode.
  582. */
  583. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  584. ulong tout, char *prompt)
  585. {
  586. int retcode;
  587. retcode = flash_status_check (info, sector, tout, prompt);
  588. switch (info->vendor) {
  589. case CFI_CMDSET_INTEL_EXTENDED:
  590. case CFI_CMDSET_INTEL_STANDARD:
  591. if ((retcode == ERR_OK)
  592. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  593. retcode = ERR_INVAL;
  594. printf ("Flash %s error at address %lx\n", prompt,
  595. info->start[sector]);
  596. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  597. FLASH_STATUS_PSLBS)) {
  598. puts ("Command Sequence Error.\n");
  599. } else if (flash_isset (info, sector, 0,
  600. FLASH_STATUS_ECLBS)) {
  601. puts ("Block Erase Error.\n");
  602. retcode = ERR_NOT_ERASED;
  603. } else if (flash_isset (info, sector, 0,
  604. FLASH_STATUS_PSLBS)) {
  605. puts ("Locking Error\n");
  606. }
  607. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  608. puts ("Block locked.\n");
  609. retcode = ERR_PROTECTED;
  610. }
  611. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  612. puts ("Vpp Low Error.\n");
  613. }
  614. flash_write_cmd (info, sector, 0, info->cmd_reset);
  615. break;
  616. default:
  617. break;
  618. }
  619. return retcode;
  620. }
  621. /*-----------------------------------------------------------------------
  622. */
  623. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  624. {
  625. #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
  626. unsigned short w;
  627. unsigned int l;
  628. unsigned long long ll;
  629. #endif
  630. switch (info->portwidth) {
  631. case FLASH_CFI_8BIT:
  632. cword->c = c;
  633. break;
  634. case FLASH_CFI_16BIT:
  635. #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
  636. w = c;
  637. w <<= 8;
  638. cword->w = (cword->w >> 8) | w;
  639. #else
  640. cword->w = (cword->w << 8) | c;
  641. #endif
  642. break;
  643. case FLASH_CFI_32BIT:
  644. #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
  645. l = c;
  646. l <<= 24;
  647. cword->l = (cword->l >> 8) | l;
  648. #else
  649. cword->l = (cword->l << 8) | c;
  650. #endif
  651. break;
  652. case FLASH_CFI_64BIT:
  653. #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
  654. ll = c;
  655. ll <<= 56;
  656. cword->ll = (cword->ll >> 8) | ll;
  657. #else
  658. cword->ll = (cword->ll << 8) | c;
  659. #endif
  660. break;
  661. }
  662. }
  663. /* loop through the sectors from the highest address when the passed
  664. * address is greater or equal to the sector address we have a match
  665. */
  666. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  667. {
  668. flash_sect_t sector;
  669. for (sector = info->sector_count - 1; sector >= 0; sector--) {
  670. if (addr >= info->start[sector])
  671. break;
  672. }
  673. return sector;
  674. }
  675. /*-----------------------------------------------------------------------
  676. */
  677. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  678. cfiword_t cword)
  679. {
  680. void *dstaddr;
  681. int flag;
  682. dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
  683. /* Check if Flash is (sufficiently) erased */
  684. switch (info->portwidth) {
  685. case FLASH_CFI_8BIT:
  686. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  687. break;
  688. case FLASH_CFI_16BIT:
  689. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  690. break;
  691. case FLASH_CFI_32BIT:
  692. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  693. break;
  694. case FLASH_CFI_64BIT:
  695. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  696. break;
  697. default:
  698. flag = 0;
  699. break;
  700. }
  701. if (!flag) {
  702. unmap_physmem(dstaddr, info->portwidth);
  703. return ERR_NOT_ERASED;
  704. }
  705. /* Disable interrupts which might cause a timeout here */
  706. flag = disable_interrupts ();
  707. switch (info->vendor) {
  708. case CFI_CMDSET_INTEL_EXTENDED:
  709. case CFI_CMDSET_INTEL_STANDARD:
  710. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  711. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  712. break;
  713. case CFI_CMDSET_AMD_EXTENDED:
  714. case CFI_CMDSET_AMD_STANDARD:
  715. #ifdef CONFIG_FLASH_CFI_LEGACY
  716. case CFI_CMDSET_AMD_LEGACY:
  717. #endif
  718. flash_unlock_seq (info, 0);
  719. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  720. break;
  721. }
  722. switch (info->portwidth) {
  723. case FLASH_CFI_8BIT:
  724. flash_write8(cword.c, dstaddr);
  725. break;
  726. case FLASH_CFI_16BIT:
  727. flash_write16(cword.w, dstaddr);
  728. break;
  729. case FLASH_CFI_32BIT:
  730. flash_write32(cword.l, dstaddr);
  731. break;
  732. case FLASH_CFI_64BIT:
  733. flash_write64(cword.ll, dstaddr);
  734. break;
  735. }
  736. /* re-enable interrupts if necessary */
  737. if (flag)
  738. enable_interrupts ();
  739. unmap_physmem(dstaddr, info->portwidth);
  740. return flash_full_status_check (info, find_sector (info, dest),
  741. info->write_tout, "write");
  742. }
  743. #ifdef CFG_FLASH_USE_BUFFER_WRITE
  744. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  745. int len)
  746. {
  747. flash_sect_t sector;
  748. int cnt;
  749. int retcode;
  750. void *src = cp;
  751. void *dst = map_physmem(dest, len, MAP_NOCACHE);
  752. void *dst2 = dst;
  753. int flag = 0;
  754. uint offset = 0;
  755. unsigned int shift;
  756. switch (info->portwidth) {
  757. case FLASH_CFI_8BIT:
  758. shift = 0;
  759. break;
  760. case FLASH_CFI_16BIT:
  761. shift = 1;
  762. break;
  763. case FLASH_CFI_32BIT:
  764. shift = 2;
  765. break;
  766. case FLASH_CFI_64BIT:
  767. shift = 3;
  768. break;
  769. default:
  770. retcode = ERR_INVAL;
  771. goto out_unmap;
  772. }
  773. cnt = len >> shift;
  774. while ((cnt-- > 0) && (flag == 0)) {
  775. switch (info->portwidth) {
  776. case FLASH_CFI_8BIT:
  777. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  778. flash_read8(src));
  779. src += 1, dst2 += 1;
  780. break;
  781. case FLASH_CFI_16BIT:
  782. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  783. flash_read16(src));
  784. src += 2, dst2 += 2;
  785. break;
  786. case FLASH_CFI_32BIT:
  787. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  788. flash_read32(src));
  789. src += 4, dst2 += 4;
  790. break;
  791. case FLASH_CFI_64BIT:
  792. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  793. flash_read64(src));
  794. src += 8, dst2 += 8;
  795. break;
  796. }
  797. }
  798. if (!flag) {
  799. retcode = ERR_NOT_ERASED;
  800. goto out_unmap;
  801. }
  802. src = cp;
  803. sector = find_sector (info, dest);
  804. switch (info->vendor) {
  805. case CFI_CMDSET_INTEL_STANDARD:
  806. case CFI_CMDSET_INTEL_EXTENDED:
  807. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  808. flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
  809. retcode = flash_status_check (info, sector,
  810. info->buffer_write_tout,
  811. "write to buffer");
  812. if (retcode == ERR_OK) {
  813. /* reduce the number of loops by the width of
  814. * the port */
  815. cnt = len >> shift;
  816. flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
  817. while (cnt-- > 0) {
  818. switch (info->portwidth) {
  819. case FLASH_CFI_8BIT:
  820. flash_write8(flash_read8(src), dst);
  821. src += 1, dst += 1;
  822. break;
  823. case FLASH_CFI_16BIT:
  824. flash_write16(flash_read16(src), dst);
  825. src += 2, dst += 2;
  826. break;
  827. case FLASH_CFI_32BIT:
  828. flash_write32(flash_read32(src), dst);
  829. src += 4, dst += 4;
  830. break;
  831. case FLASH_CFI_64BIT:
  832. flash_write64(flash_read64(src), dst);
  833. src += 8, dst += 8;
  834. break;
  835. default:
  836. retcode = ERR_INVAL;
  837. goto out_unmap;
  838. }
  839. }
  840. flash_write_cmd (info, sector, 0,
  841. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  842. retcode = flash_full_status_check (
  843. info, sector, info->buffer_write_tout,
  844. "buffer write");
  845. }
  846. break;
  847. case CFI_CMDSET_AMD_STANDARD:
  848. case CFI_CMDSET_AMD_EXTENDED:
  849. flash_unlock_seq(info,0);
  850. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  851. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  852. #endif
  853. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  854. cnt = len >> shift;
  855. flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
  856. switch (info->portwidth) {
  857. case FLASH_CFI_8BIT:
  858. while (cnt-- > 0) {
  859. flash_write8(flash_read8(src), dst);
  860. src += 1, dst += 1;
  861. }
  862. break;
  863. case FLASH_CFI_16BIT:
  864. while (cnt-- > 0) {
  865. flash_write16(flash_read16(src), dst);
  866. src += 2, dst += 2;
  867. }
  868. break;
  869. case FLASH_CFI_32BIT:
  870. while (cnt-- > 0) {
  871. flash_write32(flash_read32(src), dst);
  872. src += 4, dst += 4;
  873. }
  874. break;
  875. case FLASH_CFI_64BIT:
  876. while (cnt-- > 0) {
  877. flash_write64(flash_read64(src), dst);
  878. src += 8, dst += 8;
  879. }
  880. break;
  881. default:
  882. retcode = ERR_INVAL;
  883. goto out_unmap;
  884. }
  885. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  886. retcode = flash_full_status_check (info, sector,
  887. info->buffer_write_tout,
  888. "buffer write");
  889. break;
  890. default:
  891. debug ("Unknown Command Set\n");
  892. retcode = ERR_INVAL;
  893. break;
  894. }
  895. out_unmap:
  896. unmap_physmem(dst, len);
  897. return retcode;
  898. }
  899. #endif /* CFG_FLASH_USE_BUFFER_WRITE */
  900. /*-----------------------------------------------------------------------
  901. */
  902. int flash_erase (flash_info_t * info, int s_first, int s_last)
  903. {
  904. int rcode = 0;
  905. int prot;
  906. flash_sect_t sect;
  907. if (info->flash_id != FLASH_MAN_CFI) {
  908. puts ("Can't erase unknown flash type - aborted\n");
  909. return 1;
  910. }
  911. if ((s_first < 0) || (s_first > s_last)) {
  912. puts ("- no sectors to erase\n");
  913. return 1;
  914. }
  915. prot = 0;
  916. for (sect = s_first; sect <= s_last; ++sect) {
  917. if (info->protect[sect]) {
  918. prot++;
  919. }
  920. }
  921. if (prot) {
  922. printf ("- Warning: %d protected sectors will not be erased!\n",
  923. prot);
  924. } else {
  925. putc ('\n');
  926. }
  927. for (sect = s_first; sect <= s_last; sect++) {
  928. if (info->protect[sect] == 0) { /* not protected */
  929. switch (info->vendor) {
  930. case CFI_CMDSET_INTEL_STANDARD:
  931. case CFI_CMDSET_INTEL_EXTENDED:
  932. flash_write_cmd (info, sect, 0,
  933. FLASH_CMD_CLEAR_STATUS);
  934. flash_write_cmd (info, sect, 0,
  935. FLASH_CMD_BLOCK_ERASE);
  936. flash_write_cmd (info, sect, 0,
  937. FLASH_CMD_ERASE_CONFIRM);
  938. break;
  939. case CFI_CMDSET_AMD_STANDARD:
  940. case CFI_CMDSET_AMD_EXTENDED:
  941. flash_unlock_seq (info, sect);
  942. flash_write_cmd (info, sect,
  943. info->addr_unlock1,
  944. AMD_CMD_ERASE_START);
  945. flash_unlock_seq (info, sect);
  946. flash_write_cmd (info, sect, 0,
  947. AMD_CMD_ERASE_SECTOR);
  948. break;
  949. #ifdef CONFIG_FLASH_CFI_LEGACY
  950. case CFI_CMDSET_AMD_LEGACY:
  951. flash_unlock_seq (info, 0);
  952. flash_write_cmd (info, 0, info->addr_unlock1,
  953. AMD_CMD_ERASE_START);
  954. flash_unlock_seq (info, 0);
  955. flash_write_cmd (info, sect, 0,
  956. AMD_CMD_ERASE_SECTOR);
  957. break;
  958. #endif
  959. default:
  960. debug ("Unkown flash vendor %d\n",
  961. info->vendor);
  962. break;
  963. }
  964. if (flash_full_status_check
  965. (info, sect, info->erase_blk_tout, "erase")) {
  966. rcode = 1;
  967. } else
  968. putc ('.');
  969. }
  970. }
  971. puts (" done\n");
  972. return rcode;
  973. }
  974. /*-----------------------------------------------------------------------
  975. */
  976. void flash_print_info (flash_info_t * info)
  977. {
  978. int i;
  979. if (info->flash_id != FLASH_MAN_CFI) {
  980. puts ("missing or unknown FLASH type\n");
  981. return;
  982. }
  983. printf ("%s FLASH (%d x %d)",
  984. info->name,
  985. (info->portwidth << 3), (info->chipwidth << 3));
  986. if (info->size < 1024*1024)
  987. printf (" Size: %ld kB in %d Sectors\n",
  988. info->size >> 10, info->sector_count);
  989. else
  990. printf (" Size: %ld MB in %d Sectors\n",
  991. info->size >> 20, info->sector_count);
  992. printf (" ");
  993. switch (info->vendor) {
  994. case CFI_CMDSET_INTEL_STANDARD:
  995. printf ("Intel Standard");
  996. break;
  997. case CFI_CMDSET_INTEL_EXTENDED:
  998. printf ("Intel Extended");
  999. break;
  1000. case CFI_CMDSET_AMD_STANDARD:
  1001. printf ("AMD Standard");
  1002. break;
  1003. case CFI_CMDSET_AMD_EXTENDED:
  1004. printf ("AMD Extended");
  1005. break;
  1006. #ifdef CONFIG_FLASH_CFI_LEGACY
  1007. case CFI_CMDSET_AMD_LEGACY:
  1008. printf ("AMD Legacy");
  1009. break;
  1010. #endif
  1011. default:
  1012. printf ("Unknown (%d)", info->vendor);
  1013. break;
  1014. }
  1015. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
  1016. info->manufacturer_id, info->device_id);
  1017. if (info->device_id == 0x7E) {
  1018. printf("%04X", info->device_id2);
  1019. }
  1020. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1021. info->erase_blk_tout,
  1022. info->write_tout);
  1023. if (info->buffer_size > 1) {
  1024. printf (" Buffer write timeout: %ld ms, "
  1025. "buffer size: %d bytes\n",
  1026. info->buffer_write_tout,
  1027. info->buffer_size);
  1028. }
  1029. puts ("\n Sector Start Addresses:");
  1030. for (i = 0; i < info->sector_count; ++i) {
  1031. if ((i % 5) == 0)
  1032. printf ("\n");
  1033. #ifdef CFG_FLASH_EMPTY_INFO
  1034. int k;
  1035. int size;
  1036. int erased;
  1037. volatile unsigned long *flash;
  1038. /*
  1039. * Check if whole sector is erased
  1040. */
  1041. size = flash_sector_size(info, i);
  1042. erased = 1;
  1043. flash = (volatile unsigned long *) info->start[i];
  1044. size = size >> 2; /* divide by 4 for longword access */
  1045. for (k = 0; k < size; k++) {
  1046. if (*flash++ != 0xffffffff) {
  1047. erased = 0;
  1048. break;
  1049. }
  1050. }
  1051. /* print empty and read-only info */
  1052. printf (" %08lX %c %s ",
  1053. info->start[i],
  1054. erased ? 'E' : ' ',
  1055. info->protect[i] ? "RO" : " ");
  1056. #else /* ! CFG_FLASH_EMPTY_INFO */
  1057. printf (" %08lX %s ",
  1058. info->start[i],
  1059. info->protect[i] ? "RO" : " ");
  1060. #endif
  1061. }
  1062. putc ('\n');
  1063. return;
  1064. }
  1065. /*-----------------------------------------------------------------------
  1066. * This is used in a few places in write_buf() to show programming
  1067. * progress. Making it a function is nasty because it needs to do side
  1068. * effect updates to digit and dots. Repeated code is nasty too, so
  1069. * we define it once here.
  1070. */
  1071. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1072. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1073. dots -= dots_sub; \
  1074. if ((scale > 0) && (dots <= 0)) { \
  1075. if ((digit % 5) == 0) \
  1076. printf ("%d", digit / 5); \
  1077. else \
  1078. putc ('.'); \
  1079. digit--; \
  1080. dots += scale; \
  1081. }
  1082. #else
  1083. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1084. #endif
  1085. /*-----------------------------------------------------------------------
  1086. * Copy memory to flash, returns:
  1087. * 0 - OK
  1088. * 1 - write timeout
  1089. * 2 - Flash not erased
  1090. */
  1091. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1092. {
  1093. ulong wp;
  1094. uchar *p;
  1095. int aln;
  1096. cfiword_t cword;
  1097. int i, rc;
  1098. #ifdef CFG_FLASH_USE_BUFFER_WRITE
  1099. int buffered_size;
  1100. #endif
  1101. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1102. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1103. int scale = 0;
  1104. int dots = 0;
  1105. /*
  1106. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1107. */
  1108. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1109. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1110. CONFIG_FLASH_SHOW_PROGRESS);
  1111. }
  1112. #endif
  1113. /* get lower aligned address */
  1114. wp = (addr & ~(info->portwidth - 1));
  1115. /* handle unaligned start */
  1116. if ((aln = addr - wp) != 0) {
  1117. cword.l = 0;
  1118. p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
  1119. for (i = 0; i < aln; ++i)
  1120. flash_add_byte (info, &cword, flash_read8(p + i));
  1121. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1122. flash_add_byte (info, &cword, *src++);
  1123. cnt--;
  1124. }
  1125. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1126. flash_add_byte (info, &cword, flash_read8(p + i));
  1127. rc = flash_write_cfiword (info, wp, cword);
  1128. unmap_physmem(p, info->portwidth);
  1129. if (rc != 0)
  1130. return rc;
  1131. wp += i;
  1132. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1133. }
  1134. /* handle the aligned part */
  1135. #ifdef CFG_FLASH_USE_BUFFER_WRITE
  1136. buffered_size = (info->portwidth / info->chipwidth);
  1137. buffered_size *= info->buffer_size;
  1138. while (cnt >= info->portwidth) {
  1139. /* prohibit buffer write when buffer_size is 1 */
  1140. if (info->buffer_size == 1) {
  1141. cword.l = 0;
  1142. for (i = 0; i < info->portwidth; i++)
  1143. flash_add_byte (info, &cword, *src++);
  1144. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1145. return rc;
  1146. wp += info->portwidth;
  1147. cnt -= info->portwidth;
  1148. continue;
  1149. }
  1150. /* write buffer until next buffered_size aligned boundary */
  1151. i = buffered_size - (wp % buffered_size);
  1152. if (i > cnt)
  1153. i = cnt;
  1154. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1155. return rc;
  1156. i -= i & (info->portwidth - 1);
  1157. wp += i;
  1158. src += i;
  1159. cnt -= i;
  1160. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1161. }
  1162. #else
  1163. while (cnt >= info->portwidth) {
  1164. cword.l = 0;
  1165. for (i = 0; i < info->portwidth; i++) {
  1166. flash_add_byte (info, &cword, *src++);
  1167. }
  1168. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1169. return rc;
  1170. wp += info->portwidth;
  1171. cnt -= info->portwidth;
  1172. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1173. }
  1174. #endif /* CFG_FLASH_USE_BUFFER_WRITE */
  1175. if (cnt == 0) {
  1176. return (0);
  1177. }
  1178. /*
  1179. * handle unaligned tail bytes
  1180. */
  1181. cword.l = 0;
  1182. p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
  1183. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1184. flash_add_byte (info, &cword, *src++);
  1185. --cnt;
  1186. }
  1187. for (; i < info->portwidth; ++i)
  1188. flash_add_byte (info, &cword, flash_read8(p + i));
  1189. unmap_physmem(p, info->portwidth);
  1190. return flash_write_cfiword (info, wp, cword);
  1191. }
  1192. /*-----------------------------------------------------------------------
  1193. */
  1194. #ifdef CFG_FLASH_PROTECTION
  1195. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1196. {
  1197. int retcode = 0;
  1198. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1199. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1200. if (prot)
  1201. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1202. else
  1203. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1204. if ((retcode =
  1205. flash_full_status_check (info, sector, info->erase_blk_tout,
  1206. prot ? "protect" : "unprotect")) == 0) {
  1207. info->protect[sector] = prot;
  1208. /*
  1209. * On some of Intel's flash chips (marked via legacy_unlock)
  1210. * unprotect unprotects all locking.
  1211. */
  1212. if ((prot == 0) && (info->legacy_unlock)) {
  1213. flash_sect_t i;
  1214. for (i = 0; i < info->sector_count; i++) {
  1215. if (info->protect[i])
  1216. flash_real_protect (info, i, 1);
  1217. }
  1218. }
  1219. }
  1220. return retcode;
  1221. }
  1222. /*-----------------------------------------------------------------------
  1223. * flash_read_user_serial - read the OneTimeProgramming cells
  1224. */
  1225. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1226. int len)
  1227. {
  1228. uchar *src;
  1229. uchar *dst;
  1230. dst = buffer;
  1231. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1232. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1233. memcpy (dst, src + offset, len);
  1234. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1235. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1236. }
  1237. /*
  1238. * flash_read_factory_serial - read the device Id from the protection area
  1239. */
  1240. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1241. int len)
  1242. {
  1243. uchar *src;
  1244. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1245. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1246. memcpy (buffer, src + offset, len);
  1247. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1248. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1249. }
  1250. #endif /* CFG_FLASH_PROTECTION */
  1251. /*-----------------------------------------------------------------------
  1252. * Reverse the order of the erase regions in the CFI QRY structure.
  1253. * This is needed for chips that are either a) correctly detected as
  1254. * top-boot, or b) buggy.
  1255. */
  1256. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1257. {
  1258. unsigned int i, j;
  1259. u32 tmp;
  1260. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1261. tmp = qry->erase_region_info[i];
  1262. qry->erase_region_info[i] = qry->erase_region_info[j];
  1263. qry->erase_region_info[j] = tmp;
  1264. }
  1265. }
  1266. /*-----------------------------------------------------------------------
  1267. * read jedec ids from device and set corresponding fields in info struct
  1268. *
  1269. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1270. *
  1271. */
  1272. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1273. {
  1274. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1275. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1276. udelay(1000); /* some flash are slow to respond */
  1277. info->manufacturer_id = flash_read_uchar (info,
  1278. FLASH_OFFSET_MANUFACTURER_ID);
  1279. info->device_id = flash_read_uchar (info,
  1280. FLASH_OFFSET_DEVICE_ID);
  1281. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1282. }
  1283. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1284. {
  1285. info->cmd_reset = FLASH_CMD_RESET;
  1286. cmdset_intel_read_jedec_ids(info);
  1287. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1288. #ifdef CFG_FLASH_PROTECTION
  1289. /* read legacy lock/unlock bit from intel flash */
  1290. if (info->ext_addr) {
  1291. info->legacy_unlock = flash_read_uchar (info,
  1292. info->ext_addr + 5) & 0x08;
  1293. }
  1294. #endif
  1295. return 0;
  1296. }
  1297. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1298. {
  1299. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1300. flash_unlock_seq(info, 0);
  1301. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1302. udelay(1000); /* some flash are slow to respond */
  1303. info->manufacturer_id = flash_read_uchar (info,
  1304. FLASH_OFFSET_MANUFACTURER_ID);
  1305. switch (info->chipwidth){
  1306. case FLASH_CFI_8BIT:
  1307. info->device_id = flash_read_uchar (info,
  1308. FLASH_OFFSET_DEVICE_ID);
  1309. if (info->device_id == 0x7E) {
  1310. /* AMD 3-byte (expanded) device ids */
  1311. info->device_id2 = flash_read_uchar (info,
  1312. FLASH_OFFSET_DEVICE_ID2);
  1313. info->device_id2 <<= 8;
  1314. info->device_id2 |= flash_read_uchar (info,
  1315. FLASH_OFFSET_DEVICE_ID3);
  1316. }
  1317. break;
  1318. case FLASH_CFI_16BIT:
  1319. info->device_id = flash_read_word (info,
  1320. FLASH_OFFSET_DEVICE_ID);
  1321. break;
  1322. default:
  1323. break;
  1324. }
  1325. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1326. }
  1327. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1328. {
  1329. info->cmd_reset = AMD_CMD_RESET;
  1330. cmdset_amd_read_jedec_ids(info);
  1331. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1332. return 0;
  1333. }
  1334. #ifdef CONFIG_FLASH_CFI_LEGACY
  1335. static void flash_read_jedec_ids (flash_info_t * info)
  1336. {
  1337. info->manufacturer_id = 0;
  1338. info->device_id = 0;
  1339. info->device_id2 = 0;
  1340. switch (info->vendor) {
  1341. case CFI_CMDSET_INTEL_STANDARD:
  1342. case CFI_CMDSET_INTEL_EXTENDED:
  1343. cmdset_intel_read_jedec_ids(info);
  1344. break;
  1345. case CFI_CMDSET_AMD_STANDARD:
  1346. case CFI_CMDSET_AMD_EXTENDED:
  1347. cmdset_amd_read_jedec_ids(info);
  1348. break;
  1349. default:
  1350. break;
  1351. }
  1352. }
  1353. /*-----------------------------------------------------------------------
  1354. * Call board code to request info about non-CFI flash.
  1355. * board_flash_get_legacy needs to fill in at least:
  1356. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1357. */
  1358. static int flash_detect_legacy(ulong base, int banknum)
  1359. {
  1360. flash_info_t *info = &flash_info[banknum];
  1361. if (board_flash_get_legacy(base, banknum, info)) {
  1362. /* board code may have filled info completely. If not, we
  1363. use JEDEC ID probing. */
  1364. if (!info->vendor) {
  1365. int modes[] = {
  1366. CFI_CMDSET_AMD_STANDARD,
  1367. CFI_CMDSET_INTEL_STANDARD
  1368. };
  1369. int i;
  1370. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1371. info->vendor = modes[i];
  1372. info->start[0] = base;
  1373. if (info->portwidth == FLASH_CFI_8BIT
  1374. && info->interface == FLASH_CFI_X8X16) {
  1375. info->addr_unlock1 = 0x2AAA;
  1376. info->addr_unlock2 = 0x5555;
  1377. } else {
  1378. info->addr_unlock1 = 0x5555;
  1379. info->addr_unlock2 = 0x2AAA;
  1380. }
  1381. flash_read_jedec_ids(info);
  1382. debug("JEDEC PROBE: ID %x %x %x\n",
  1383. info->manufacturer_id,
  1384. info->device_id,
  1385. info->device_id2);
  1386. if (jedec_flash_match(info, base))
  1387. break;
  1388. }
  1389. }
  1390. switch(info->vendor) {
  1391. case CFI_CMDSET_INTEL_STANDARD:
  1392. case CFI_CMDSET_INTEL_EXTENDED:
  1393. info->cmd_reset = FLASH_CMD_RESET;
  1394. break;
  1395. case CFI_CMDSET_AMD_STANDARD:
  1396. case CFI_CMDSET_AMD_EXTENDED:
  1397. case CFI_CMDSET_AMD_LEGACY:
  1398. info->cmd_reset = AMD_CMD_RESET;
  1399. break;
  1400. }
  1401. info->flash_id = FLASH_MAN_CFI;
  1402. return 1;
  1403. }
  1404. return 0; /* use CFI */
  1405. }
  1406. #else
  1407. static inline int flash_detect_legacy(ulong base, int banknum)
  1408. {
  1409. return 0; /* use CFI */
  1410. }
  1411. #endif
  1412. /*-----------------------------------------------------------------------
  1413. * detect if flash is compatible with the Common Flash Interface (CFI)
  1414. * http://www.jedec.org/download/search/jesd68.pdf
  1415. */
  1416. static void flash_read_cfi (flash_info_t *info, void *buf,
  1417. unsigned int start, size_t len)
  1418. {
  1419. u8 *p = buf;
  1420. unsigned int i;
  1421. for (i = 0; i < len; i++)
  1422. p[i] = flash_read_uchar(info, start + i);
  1423. }
  1424. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1425. {
  1426. int cfi_offset;
  1427. /* We do not yet know what kind of commandset to use, so we issue
  1428. the reset command in both Intel and AMD variants, in the hope
  1429. that AMD flash roms ignore the Intel command. */
  1430. flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
  1431. flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
  1432. for (cfi_offset=0;
  1433. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1434. cfi_offset++) {
  1435. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1436. FLASH_CMD_CFI);
  1437. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1438. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1439. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1440. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1441. sizeof(struct cfi_qry));
  1442. info->interface = le16_to_cpu(qry->interface_desc);
  1443. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1444. debug ("device interface is %d\n",
  1445. info->interface);
  1446. debug ("found port %d chip %d ",
  1447. info->portwidth, info->chipwidth);
  1448. debug ("port %d bits chip %d bits\n",
  1449. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1450. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1451. /* calculate command offsets as in the Linux driver */
  1452. info->addr_unlock1 = 0x555;
  1453. info->addr_unlock2 = 0x2aa;
  1454. /*
  1455. * modify the unlock address if we are
  1456. * in compatibility mode
  1457. */
  1458. if ( /* x8/x16 in x8 mode */
  1459. ((info->chipwidth == FLASH_CFI_BY8) &&
  1460. (info->interface == FLASH_CFI_X8X16)) ||
  1461. /* x16/x32 in x16 mode */
  1462. ((info->chipwidth == FLASH_CFI_BY16) &&
  1463. (info->interface == FLASH_CFI_X16X32)))
  1464. {
  1465. info->addr_unlock1 = 0xaaa;
  1466. info->addr_unlock2 = 0x555;
  1467. }
  1468. info->name = "CFI conformant";
  1469. return 1;
  1470. }
  1471. }
  1472. return 0;
  1473. }
  1474. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1475. {
  1476. debug ("flash detect cfi\n");
  1477. for (info->portwidth = CFG_FLASH_CFI_WIDTH;
  1478. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1479. for (info->chipwidth = FLASH_CFI_BY8;
  1480. info->chipwidth <= info->portwidth;
  1481. info->chipwidth <<= 1)
  1482. if (__flash_detect_cfi(info, qry))
  1483. return 1;
  1484. }
  1485. debug ("not found\n");
  1486. return 0;
  1487. }
  1488. /*
  1489. * Manufacturer-specific quirks. Add workarounds for geometry
  1490. * reversal, etc. here.
  1491. */
  1492. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1493. {
  1494. /* check if flash geometry needs reversal */
  1495. if (qry->num_erase_regions > 1) {
  1496. /* reverse geometry if top boot part */
  1497. if (info->cfi_version < 0x3131) {
  1498. /* CFI < 1.1, try to guess from device id */
  1499. if ((info->device_id & 0x80) != 0)
  1500. cfi_reverse_geometry(qry);
  1501. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1502. /* CFI >= 1.1, deduct from top/bottom flag */
  1503. /* note: ext_addr is valid since cfi_version > 0 */
  1504. cfi_reverse_geometry(qry);
  1505. }
  1506. }
  1507. }
  1508. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1509. {
  1510. int reverse_geometry = 0;
  1511. /* Check the "top boot" bit in the PRI */
  1512. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1513. reverse_geometry = 1;
  1514. /* AT49BV6416(T) list the erase regions in the wrong order.
  1515. * However, the device ID is identical with the non-broken
  1516. * AT49BV642D since u-boot only reads the low byte (they
  1517. * differ in the high byte.) So leave out this fixup for now.
  1518. */
  1519. #if 0
  1520. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1521. reverse_geometry = !reverse_geometry;
  1522. #endif
  1523. if (reverse_geometry)
  1524. cfi_reverse_geometry(qry);
  1525. }
  1526. /*
  1527. * The following code cannot be run from FLASH!
  1528. *
  1529. */
  1530. ulong flash_get_size (ulong base, int banknum)
  1531. {
  1532. flash_info_t *info = &flash_info[banknum];
  1533. int i, j;
  1534. flash_sect_t sect_cnt;
  1535. unsigned long sector;
  1536. unsigned long tmp;
  1537. int size_ratio;
  1538. uchar num_erase_regions;
  1539. int erase_region_size;
  1540. int erase_region_count;
  1541. struct cfi_qry qry;
  1542. memset(&qry, 0, sizeof(qry));
  1543. info->ext_addr = 0;
  1544. info->cfi_version = 0;
  1545. #ifdef CFG_FLASH_PROTECTION
  1546. info->legacy_unlock = 0;
  1547. #endif
  1548. info->start[0] = base;
  1549. if (flash_detect_cfi (info, &qry)) {
  1550. info->vendor = le16_to_cpu(qry.p_id);
  1551. info->ext_addr = le16_to_cpu(qry.p_adr);
  1552. num_erase_regions = qry.num_erase_regions;
  1553. if (info->ext_addr) {
  1554. info->cfi_version = (ushort) flash_read_uchar (info,
  1555. info->ext_addr + 3) << 8;
  1556. info->cfi_version |= (ushort) flash_read_uchar (info,
  1557. info->ext_addr + 4);
  1558. }
  1559. #ifdef DEBUG
  1560. flash_printqry (&qry);
  1561. #endif
  1562. switch (info->vendor) {
  1563. case CFI_CMDSET_INTEL_STANDARD:
  1564. case CFI_CMDSET_INTEL_EXTENDED:
  1565. cmdset_intel_init(info, &qry);
  1566. break;
  1567. case CFI_CMDSET_AMD_STANDARD:
  1568. case CFI_CMDSET_AMD_EXTENDED:
  1569. cmdset_amd_init(info, &qry);
  1570. break;
  1571. default:
  1572. printf("CFI: Unknown command set 0x%x\n",
  1573. info->vendor);
  1574. /*
  1575. * Unfortunately, this means we don't know how
  1576. * to get the chip back to Read mode. Might
  1577. * as well try an Intel-style reset...
  1578. */
  1579. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1580. return 0;
  1581. }
  1582. /* Do manufacturer-specific fixups */
  1583. switch (info->manufacturer_id) {
  1584. case 0x0001:
  1585. flash_fixup_amd(info, &qry);
  1586. break;
  1587. case 0x001f:
  1588. flash_fixup_atmel(info, &qry);
  1589. break;
  1590. }
  1591. debug ("manufacturer is %d\n", info->vendor);
  1592. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1593. debug ("device id is 0x%x\n", info->device_id);
  1594. debug ("device id2 is 0x%x\n", info->device_id2);
  1595. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1596. size_ratio = info->portwidth / info->chipwidth;
  1597. /* if the chip is x8/x16 reduce the ratio by half */
  1598. if ((info->interface == FLASH_CFI_X8X16)
  1599. && (info->chipwidth == FLASH_CFI_BY8)) {
  1600. size_ratio >>= 1;
  1601. }
  1602. debug ("size_ratio %d port %d bits chip %d bits\n",
  1603. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1604. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1605. debug ("found %d erase regions\n", num_erase_regions);
  1606. sect_cnt = 0;
  1607. sector = base;
  1608. for (i = 0; i < num_erase_regions; i++) {
  1609. if (i > NUM_ERASE_REGIONS) {
  1610. printf ("%d erase regions found, only %d used\n",
  1611. num_erase_regions, NUM_ERASE_REGIONS);
  1612. break;
  1613. }
  1614. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1615. debug("erase region %u: 0x%08lx\n", i, tmp);
  1616. erase_region_count = (tmp & 0xffff) + 1;
  1617. tmp >>= 16;
  1618. erase_region_size =
  1619. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1620. debug ("erase_region_count = %d erase_region_size = %d\n",
  1621. erase_region_count, erase_region_size);
  1622. for (j = 0; j < erase_region_count; j++) {
  1623. if (sect_cnt >= CFG_MAX_FLASH_SECT) {
  1624. printf("ERROR: too many flash sectors\n");
  1625. break;
  1626. }
  1627. info->start[sect_cnt] = sector;
  1628. sector += (erase_region_size * size_ratio);
  1629. /*
  1630. * Only read protection status from
  1631. * supported devices (intel...)
  1632. */
  1633. switch (info->vendor) {
  1634. case CFI_CMDSET_INTEL_EXTENDED:
  1635. case CFI_CMDSET_INTEL_STANDARD:
  1636. info->protect[sect_cnt] =
  1637. flash_isset (info, sect_cnt,
  1638. FLASH_OFFSET_PROTECT,
  1639. FLASH_STATUS_PROTECT);
  1640. break;
  1641. default:
  1642. /* default: not protected */
  1643. info->protect[sect_cnt] = 0;
  1644. }
  1645. sect_cnt++;
  1646. }
  1647. }
  1648. info->sector_count = sect_cnt;
  1649. info->size = 1 << qry.dev_size;
  1650. /* multiply the size by the number of chips */
  1651. info->size *= size_ratio;
  1652. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  1653. tmp = 1 << qry.block_erase_timeout_typ;
  1654. info->erase_blk_tout = tmp *
  1655. (1 << qry.block_erase_timeout_max);
  1656. tmp = (1 << qry.buf_write_timeout_typ) *
  1657. (1 << qry.buf_write_timeout_max);
  1658. /* round up when converting to ms */
  1659. info->buffer_write_tout = (tmp + 999) / 1000;
  1660. tmp = (1 << qry.word_write_timeout_typ) *
  1661. (1 << qry.word_write_timeout_max);
  1662. /* round up when converting to ms */
  1663. info->write_tout = (tmp + 999) / 1000;
  1664. info->flash_id = FLASH_MAN_CFI;
  1665. if ((info->interface == FLASH_CFI_X8X16) &&
  1666. (info->chipwidth == FLASH_CFI_BY8)) {
  1667. /* XXX - Need to test on x8/x16 in parallel. */
  1668. info->portwidth >>= 1;
  1669. }
  1670. }
  1671. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1672. return (info->size);
  1673. }
  1674. /*-----------------------------------------------------------------------
  1675. */
  1676. unsigned long flash_init (void)
  1677. {
  1678. unsigned long size = 0;
  1679. int i;
  1680. #if defined(CFG_FLASH_AUTOPROTECT_LIST)
  1681. struct apl_s {
  1682. ulong start;
  1683. ulong size;
  1684. } apl[] = CFG_FLASH_AUTOPROTECT_LIST;
  1685. #endif
  1686. #ifdef CFG_FLASH_PROTECTION
  1687. char *s = getenv("unlock");
  1688. #endif
  1689. /* Init: no FLASHes known */
  1690. for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
  1691. flash_info[i].flash_id = FLASH_UNKNOWN;
  1692. if (!flash_detect_legacy (bank_base[i], i))
  1693. flash_get_size (bank_base[i], i);
  1694. size += flash_info[i].size;
  1695. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  1696. #ifndef CFG_FLASH_QUIET_TEST
  1697. printf ("## Unknown FLASH on Bank %d "
  1698. "- Size = 0x%08lx = %ld MB\n",
  1699. i+1, flash_info[i].size,
  1700. flash_info[i].size << 20);
  1701. #endif /* CFG_FLASH_QUIET_TEST */
  1702. }
  1703. #ifdef CFG_FLASH_PROTECTION
  1704. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  1705. /*
  1706. * Only the U-Boot image and it's environment
  1707. * is protected, all other sectors are
  1708. * unprotected (unlocked) if flash hardware
  1709. * protection is used (CFG_FLASH_PROTECTION)
  1710. * and the environment variable "unlock" is
  1711. * set to "yes".
  1712. */
  1713. if (flash_info[i].legacy_unlock) {
  1714. int k;
  1715. /*
  1716. * Disable legacy_unlock temporarily,
  1717. * since flash_real_protect would
  1718. * relock all other sectors again
  1719. * otherwise.
  1720. */
  1721. flash_info[i].legacy_unlock = 0;
  1722. /*
  1723. * Legacy unlocking (e.g. Intel J3) ->
  1724. * unlock only one sector. This will
  1725. * unlock all sectors.
  1726. */
  1727. flash_real_protect (&flash_info[i], 0, 0);
  1728. flash_info[i].legacy_unlock = 1;
  1729. /*
  1730. * Manually mark other sectors as
  1731. * unlocked (unprotected)
  1732. */
  1733. for (k = 1; k < flash_info[i].sector_count; k++)
  1734. flash_info[i].protect[k] = 0;
  1735. } else {
  1736. /*
  1737. * No legancy unlocking -> unlock all sectors
  1738. */
  1739. flash_protect (FLAG_PROTECT_CLEAR,
  1740. flash_info[i].start[0],
  1741. flash_info[i].start[0]
  1742. + flash_info[i].size - 1,
  1743. &flash_info[i]);
  1744. }
  1745. }
  1746. #endif /* CFG_FLASH_PROTECTION */
  1747. }
  1748. /* Monitor protection ON by default */
  1749. #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
  1750. flash_protect (FLAG_PROTECT_SET,
  1751. CFG_MONITOR_BASE,
  1752. CFG_MONITOR_BASE + monitor_flash_len - 1,
  1753. flash_get_info(CFG_MONITOR_BASE));
  1754. #endif
  1755. /* Environment protection ON by default */
  1756. #ifdef CFG_ENV_IS_IN_FLASH
  1757. flash_protect (FLAG_PROTECT_SET,
  1758. CFG_ENV_ADDR,
  1759. CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
  1760. flash_get_info(CFG_ENV_ADDR));
  1761. #endif
  1762. /* Redundant environment protection ON by default */
  1763. #ifdef CFG_ENV_ADDR_REDUND
  1764. flash_protect (FLAG_PROTECT_SET,
  1765. CFG_ENV_ADDR_REDUND,
  1766. CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
  1767. flash_get_info(CFG_ENV_ADDR_REDUND));
  1768. #endif
  1769. #if defined(CFG_FLASH_AUTOPROTECT_LIST)
  1770. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  1771. debug("autoprotecting from %08x to %08x\n",
  1772. apl[i].start, apl[i].start + apl[i].size - 1);
  1773. flash_protect (FLAG_PROTECT_SET,
  1774. apl[i].start,
  1775. apl[i].start + apl[i].size - 1,
  1776. flash_get_info(apl[i].start));
  1777. }
  1778. #endif
  1779. return (size);
  1780. }
  1781. #endif /* CFG_FLASH_CFI */