cpu.c 2.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106
  1. /*
  2. * (C) Copyright 2000-2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * CPU specific code for the MPC5xxx CPUs
  25. */
  26. #include <common.h>
  27. #include <watchdog.h>
  28. #include <command.h>
  29. #include <mpc5xxx.h>
  30. #include <asm/processor.h>
  31. int checkcpu (void)
  32. {
  33. DECLARE_GLOBAL_DATA_PTR;
  34. ulong clock = gd->cpu_clk;
  35. char buf[32];
  36. #ifndef CONFIG_MGT5100
  37. uint svr;
  38. #endif
  39. puts ("CPU: ");
  40. #ifdef CONFIG_MGT5100
  41. puts (CPU_ID_STR);
  42. printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
  43. #else
  44. svr = get_svr ();
  45. switch (SVR_VER (svr)) {
  46. case SVR_MPC5200:
  47. printf ("MPC5200");
  48. break;
  49. default:
  50. printf ("MPC52?? (SVR %08x)", svr);
  51. break;
  52. }
  53. printf (" v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr));
  54. #endif
  55. printf (" at %s MHz\n", strmhz (buf, clock));
  56. return 0;
  57. }
  58. /* ------------------------------------------------------------------------- */
  59. int
  60. do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
  61. {
  62. ulong msr;
  63. /* Interrupts and MMU off */
  64. __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
  65. msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
  66. __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
  67. /* Charge the watchdog timer */
  68. *(vu_long *)(MPC5XXX_GPT0_COUNTER) = 0x0001000f;
  69. *(vu_long *)(MPC5XXX_GPT0_ENABLE) = 0x9004; /* wden|ce|timer_ms */
  70. while(1);
  71. return 1;
  72. }
  73. /* ------------------------------------------------------------------------- */
  74. /*
  75. * Get timebase clock frequency (like cpu_clk in Hz)
  76. *
  77. */
  78. unsigned long get_tbclk (void)
  79. {
  80. DECLARE_GLOBAL_DATA_PTR;
  81. ulong tbclk;
  82. tbclk = (gd->bus_clk + 3L) / 4L;
  83. return (tbclk);
  84. }
  85. /* ------------------------------------------------------------------------- */