usb_ohci.c 46 KB

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  1. /*
  2. * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200.
  3. *
  4. * (C) Copyright 2003
  5. * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  6. *
  7. * Note: Much of this code has been derived from Linux 2.4
  8. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  9. * (C) Copyright 2000-2002 David Brownell
  10. *
  11. * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  12. * ebenard@eukrea.com - based on s3c24x0's driver
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /*
  34. * IMPORTANT NOTES
  35. * 1 - you MUST define LITTLEENDIAN in the configuration file for the
  36. * board or this driver will NOT work!
  37. * 2 - this driver is intended for use with USB Mass Storage Devices
  38. * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
  39. * 3 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  40. * to activate workaround for bug #41 or this driver will NOT work!
  41. */
  42. #include <common.h>
  43. /* #include <pci.h> no PCI on the S3C24X0 */
  44. #ifdef CONFIG_USB_OHCI_NEW
  45. /* mk: are these really required? */
  46. #if defined(CONFIG_S3C2400)
  47. # include <s3c2400.h>
  48. #elif defined(CONFIG_S3C2410)
  49. # include <s3c2410.h>
  50. #elif defined(CONFIG_ARM920T)
  51. # include <asm/arch/hardware.h>
  52. #elif defined(CONFIG_CPU_MONAHANS)
  53. # include <asm/arch/pxa-regs.h>
  54. #elif defined(CONFIG_MPC5200)
  55. # include <mpc5xxx.h>
  56. #endif
  57. #include <malloc.h>
  58. #include <usb.h>
  59. #include "usb_ohci.h"
  60. #if defined(CONFIG_ARM920T) || \
  61. defined(CONFIG_S3C2400) || \
  62. defined(CONFIG_S3C2410) || \
  63. defined(CONFIG_440EP) || \
  64. defined(CONFIG_MPC5200)
  65. # define OHCI_USE_NPS /* force NoPowerSwitching mode */
  66. #endif
  67. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  68. #undef DEBUG
  69. #undef SHOW_INFO
  70. #undef OHCI_FILL_TRACE
  71. /* For initializing controller (mask in an HCFS mode too) */
  72. #define OHCI_CONTROL_INIT \
  73. (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  74. #define readl(a) (*((vu_long *)(a)))
  75. #define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
  76. #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  77. #undef DEBUG
  78. #ifdef DEBUG
  79. #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  80. #else
  81. #define dbg(format, arg...) do {} while(0)
  82. #endif /* DEBUG */
  83. #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  84. #undef SHOW_INFO
  85. #ifdef SHOW_INFO
  86. #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  87. #else
  88. #define info(format, arg...) do {} while(0)
  89. #endif
  90. #if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
  91. # define m16_swap(x) (x)
  92. # define m32_swap(x) (x)
  93. #else
  94. # define m16_swap(x) swap_16(x)
  95. # define m32_swap(x) swap_32(x)
  96. #endif
  97. /* global ohci_t */
  98. static ohci_t gohci;
  99. /* this must be aligned to a 256 byte boundary */
  100. struct ohci_hcca ghcca[1];
  101. /* a pointer to the aligned storage */
  102. struct ohci_hcca *phcca;
  103. /* this allocates EDs for all possible endpoints */
  104. struct ohci_device ohci_dev;
  105. /* urb_priv */
  106. urb_priv_t urb_priv;
  107. /* RHSC flag */
  108. int got_rhsc;
  109. /* device which was disconnected */
  110. struct usb_device *devgone;
  111. /* flag guarding URB transation */
  112. int urb_finished = 0;
  113. /*-------------------------------------------------------------------------*/
  114. /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
  115. * The erratum (#4) description is incorrect. AMD's workaround waits
  116. * till some bits (mostly reserved) are clear; ok for all revs.
  117. */
  118. #define OHCI_QUIRK_AMD756 0xabcd
  119. #define read_roothub(hc, register, mask) ({ \
  120. u32 temp = readl (&hc->regs->roothub.register); \
  121. if (hc->flags & OHCI_QUIRK_AMD756) \
  122. while (temp & mask) \
  123. temp = readl (&hc->regs->roothub.register); \
  124. temp; })
  125. static u32 roothub_a (struct ohci *hc)
  126. { return read_roothub (hc, a, 0xfc0fe000); }
  127. static inline u32 roothub_b (struct ohci *hc)
  128. { return readl (&hc->regs->roothub.b); }
  129. static inline u32 roothub_status (struct ohci *hc)
  130. { return readl (&hc->regs->roothub.status); }
  131. static u32 roothub_portstatus (struct ohci *hc, int i)
  132. { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
  133. /* forward declaration */
  134. static int hc_interrupt (void);
  135. static void
  136. td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
  137. int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
  138. /*-------------------------------------------------------------------------*
  139. * URB support functions
  140. *-------------------------------------------------------------------------*/
  141. /* free HCD-private data associated with this URB */
  142. static void urb_free_priv (urb_priv_t * urb)
  143. {
  144. int i;
  145. int last;
  146. struct td * td;
  147. last = urb->length - 1;
  148. if (last >= 0) {
  149. for (i = 0; i <= last; i++) {
  150. td = urb->td[i];
  151. if (td) {
  152. td->usb_dev = NULL;
  153. urb->td[i] = NULL;
  154. }
  155. }
  156. }
  157. }
  158. /*-------------------------------------------------------------------------*/
  159. #ifdef DEBUG
  160. static int sohci_get_current_frame_number (struct usb_device * dev);
  161. /* debug| print the main components of an URB
  162. * small: 0) header + data packets 1) just header */
  163. static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
  164. int transfer_len, struct devrequest * setup, char * str, int small)
  165. {
  166. urb_priv_t * purb = &urb_priv;
  167. dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
  168. str,
  169. sohci_get_current_frame_number (dev),
  170. usb_pipedevice (pipe),
  171. usb_pipeendpoint (pipe),
  172. usb_pipeout (pipe)? 'O': 'I',
  173. usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
  174. (usb_pipecontrol (pipe)? "CTRL": "BULK"),
  175. purb->actual_length,
  176. transfer_len, dev->status);
  177. #ifdef OHCI_VERBOSE_DEBUG
  178. if (!small) {
  179. int i, len;
  180. if (usb_pipecontrol (pipe)) {
  181. printf (__FILE__ ": cmd(8):");
  182. for (i = 0; i < 8 ; i++)
  183. printf (" %02x", ((__u8 *) setup) [i]);
  184. printf ("\n");
  185. }
  186. if (transfer_len > 0 && buffer) {
  187. printf (__FILE__ ": data(%d/%d):",
  188. purb->actual_length,
  189. transfer_len);
  190. len = usb_pipeout (pipe)?
  191. transfer_len: purb->actual_length;
  192. for (i = 0; i < 16 && i < len; i++)
  193. printf (" %02x", ((__u8 *) buffer) [i]);
  194. printf ("%s\n", i < len? "...": "");
  195. }
  196. }
  197. #endif
  198. }
  199. /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
  200. void ep_print_int_eds (ohci_t *ohci, char * str) {
  201. int i, j;
  202. __u32 * ed_p;
  203. for (i= 0; i < 32; i++) {
  204. j = 5;
  205. ed_p = &(ohci->hcca->int_table [i]);
  206. if (*ed_p == 0)
  207. continue;
  208. printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
  209. while (*ed_p != 0 && j--) {
  210. ed_t *ed = (ed_t *)m32_swap(ed_p);
  211. printf (" ed: %4x;", ed->hwINFO);
  212. ed_p = &ed->hwNextED;
  213. }
  214. printf ("\n");
  215. }
  216. }
  217. static void ohci_dump_intr_mask (char *label, __u32 mask)
  218. {
  219. dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
  220. label,
  221. mask,
  222. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  223. (mask & OHCI_INTR_OC) ? " OC" : "",
  224. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  225. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  226. (mask & OHCI_INTR_UE) ? " UE" : "",
  227. (mask & OHCI_INTR_RD) ? " RD" : "",
  228. (mask & OHCI_INTR_SF) ? " SF" : "",
  229. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  230. (mask & OHCI_INTR_SO) ? " SO" : ""
  231. );
  232. }
  233. static void maybe_print_eds (char *label, __u32 value)
  234. {
  235. ed_t *edp = (ed_t *)value;
  236. if (value) {
  237. dbg ("%s %08x", label, value);
  238. dbg ("%08x", edp->hwINFO);
  239. dbg ("%08x", edp->hwTailP);
  240. dbg ("%08x", edp->hwHeadP);
  241. dbg ("%08x", edp->hwNextED);
  242. }
  243. }
  244. static char * hcfs2string (int state)
  245. {
  246. switch (state) {
  247. case OHCI_USB_RESET: return "reset";
  248. case OHCI_USB_RESUME: return "resume";
  249. case OHCI_USB_OPER: return "operational";
  250. case OHCI_USB_SUSPEND: return "suspend";
  251. }
  252. return "?";
  253. }
  254. /* dump control and status registers */
  255. static void ohci_dump_status (ohci_t *controller)
  256. {
  257. struct ohci_regs *regs = controller->regs;
  258. __u32 temp;
  259. temp = readl (&regs->revision) & 0xff;
  260. if (temp != 0x10)
  261. dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
  262. temp = readl (&regs->control);
  263. dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
  264. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  265. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  266. (temp & OHCI_CTRL_IR) ? " IR" : "",
  267. hcfs2string (temp & OHCI_CTRL_HCFS),
  268. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  269. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  270. (temp & OHCI_CTRL_IE) ? " IE" : "",
  271. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  272. temp & OHCI_CTRL_CBSR
  273. );
  274. temp = readl (&regs->cmdstatus);
  275. dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
  276. (temp & OHCI_SOC) >> 16,
  277. (temp & OHCI_OCR) ? " OCR" : "",
  278. (temp & OHCI_BLF) ? " BLF" : "",
  279. (temp & OHCI_CLF) ? " CLF" : "",
  280. (temp & OHCI_HCR) ? " HCR" : ""
  281. );
  282. ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
  283. ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
  284. maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
  285. maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
  286. maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
  287. maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
  288. maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
  289. maybe_print_eds ("donehead", readl (&regs->donehead));
  290. }
  291. static void ohci_dump_roothub (ohci_t *controller, int verbose)
  292. {
  293. __u32 temp, ndp, i;
  294. temp = roothub_a (controller);
  295. ndp = (temp & RH_A_NDP);
  296. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  297. ndp = (ndp == 2) ? 1:0;
  298. #endif
  299. if (verbose) {
  300. dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
  301. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  302. (temp & RH_A_NOCP) ? " NOCP" : "",
  303. (temp & RH_A_OCPM) ? " OCPM" : "",
  304. (temp & RH_A_DT) ? " DT" : "",
  305. (temp & RH_A_NPS) ? " NPS" : "",
  306. (temp & RH_A_PSM) ? " PSM" : "",
  307. ndp
  308. );
  309. temp = roothub_b (controller);
  310. dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
  311. temp,
  312. (temp & RH_B_PPCM) >> 16,
  313. (temp & RH_B_DR)
  314. );
  315. temp = roothub_status (controller);
  316. dbg ("roothub.status: %08x%s%s%s%s%s%s",
  317. temp,
  318. (temp & RH_HS_CRWE) ? " CRWE" : "",
  319. (temp & RH_HS_OCIC) ? " OCIC" : "",
  320. (temp & RH_HS_LPSC) ? " LPSC" : "",
  321. (temp & RH_HS_DRWE) ? " DRWE" : "",
  322. (temp & RH_HS_OCI) ? " OCI" : "",
  323. (temp & RH_HS_LPS) ? " LPS" : ""
  324. );
  325. }
  326. for (i = 0; i < ndp; i++) {
  327. temp = roothub_portstatus (controller, i);
  328. dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
  329. i,
  330. temp,
  331. (temp & RH_PS_PRSC) ? " PRSC" : "",
  332. (temp & RH_PS_OCIC) ? " OCIC" : "",
  333. (temp & RH_PS_PSSC) ? " PSSC" : "",
  334. (temp & RH_PS_PESC) ? " PESC" : "",
  335. (temp & RH_PS_CSC) ? " CSC" : "",
  336. (temp & RH_PS_LSDA) ? " LSDA" : "",
  337. (temp & RH_PS_PPS) ? " PPS" : "",
  338. (temp & RH_PS_PRS) ? " PRS" : "",
  339. (temp & RH_PS_POCI) ? " POCI" : "",
  340. (temp & RH_PS_PSS) ? " PSS" : "",
  341. (temp & RH_PS_PES) ? " PES" : "",
  342. (temp & RH_PS_CCS) ? " CCS" : ""
  343. );
  344. }
  345. }
  346. static void ohci_dump (ohci_t *controller, int verbose)
  347. {
  348. dbg ("OHCI controller usb-%s state", controller->slot_name);
  349. /* dumps some of the state we know about */
  350. ohci_dump_status (controller);
  351. if (verbose)
  352. ep_print_int_eds (controller, "hcca");
  353. dbg ("hcca frame #%04x", controller->hcca->frame_no);
  354. ohci_dump_roothub (controller, 1);
  355. }
  356. #endif /* DEBUG */
  357. /*-------------------------------------------------------------------------*
  358. * Interface functions (URB)
  359. *-------------------------------------------------------------------------*/
  360. /* get a transfer request */
  361. int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
  362. int transfer_len, struct devrequest *setup, int interval)
  363. {
  364. ohci_t *ohci;
  365. ed_t * ed;
  366. urb_priv_t *purb_priv;
  367. int i, size = 0;
  368. ohci = &gohci;
  369. /* when controller's hung, permit only roothub cleanup attempts
  370. * such as powering down ports */
  371. if (ohci->disabled) {
  372. err("sohci_submit_job: EPIPE");
  373. return -1;
  374. }
  375. /* if we have an unfinished URB from previous transaction let's
  376. * fail and scream as quickly as possible so as not to corrupt
  377. * further communication */
  378. if (!urb_finished) {
  379. err("sohci_submit_job: URB NOT FINISHED");
  380. return -1;
  381. }
  382. /* we're about to begin a new transaction here so mark the URB unfinished */
  383. urb_finished = 0;
  384. /* every endpoint has a ed, locate and fill it */
  385. if (!(ed = ep_add_ed (dev, pipe))) {
  386. err("sohci_submit_job: ENOMEM");
  387. return -1;
  388. }
  389. /* for the private part of the URB we need the number of TDs (size) */
  390. switch (usb_pipetype (pipe)) {
  391. case PIPE_BULK: /* one TD for every 4096 Byte */
  392. size = (transfer_len - 1) / 4096 + 1;
  393. break;
  394. case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
  395. size = (transfer_len == 0)? 2:
  396. (transfer_len - 1) / 4096 + 3;
  397. break;
  398. }
  399. if (size >= (N_URB_TD - 1)) {
  400. err("need %d TDs, only have %d", size, N_URB_TD);
  401. return -1;
  402. }
  403. purb_priv = &urb_priv;
  404. purb_priv->pipe = pipe;
  405. /* fill the private part of the URB */
  406. purb_priv->length = size;
  407. purb_priv->ed = ed;
  408. purb_priv->actual_length = 0;
  409. /* allocate the TDs */
  410. /* note that td[0] was allocated in ep_add_ed */
  411. for (i = 0; i < size; i++) {
  412. purb_priv->td[i] = td_alloc (dev);
  413. if (!purb_priv->td[i]) {
  414. purb_priv->length = i;
  415. urb_free_priv (purb_priv);
  416. err("sohci_submit_job: ENOMEM");
  417. return -1;
  418. }
  419. }
  420. if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
  421. urb_free_priv (purb_priv);
  422. err("sohci_submit_job: EINVAL");
  423. return -1;
  424. }
  425. /* link the ed into a chain if is not already */
  426. if (ed->state != ED_OPER)
  427. ep_link (ohci, ed);
  428. /* fill the TDs and link it to the ed */
  429. td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
  430. return 0;
  431. }
  432. /*-------------------------------------------------------------------------*/
  433. #ifdef DEBUG
  434. /* tell us the current USB frame number */
  435. static int sohci_get_current_frame_number (struct usb_device *usb_dev)
  436. {
  437. ohci_t *ohci = &gohci;
  438. return m16_swap (ohci->hcca->frame_no);
  439. }
  440. #endif
  441. /*-------------------------------------------------------------------------*
  442. * ED handling functions
  443. *-------------------------------------------------------------------------*/
  444. /* link an ed into one of the HC chains */
  445. static int ep_link (ohci_t *ohci, ed_t *edi)
  446. {
  447. volatile ed_t *ed = edi;
  448. ed->state = ED_OPER;
  449. switch (ed->type) {
  450. case PIPE_CONTROL:
  451. ed->hwNextED = 0;
  452. if (ohci->ed_controltail == NULL) {
  453. writel (ed, &ohci->regs->ed_controlhead);
  454. } else {
  455. ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
  456. }
  457. ed->ed_prev = ohci->ed_controltail;
  458. if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
  459. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  460. ohci->hc_control |= OHCI_CTRL_CLE;
  461. writel (ohci->hc_control, &ohci->regs->control);
  462. }
  463. ohci->ed_controltail = edi;
  464. break;
  465. case PIPE_BULK:
  466. ed->hwNextED = 0;
  467. if (ohci->ed_bulktail == NULL) {
  468. writel (ed, &ohci->regs->ed_bulkhead);
  469. } else {
  470. ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
  471. }
  472. ed->ed_prev = ohci->ed_bulktail;
  473. if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
  474. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  475. ohci->hc_control |= OHCI_CTRL_BLE;
  476. writel (ohci->hc_control, &ohci->regs->control);
  477. }
  478. ohci->ed_bulktail = edi;
  479. break;
  480. }
  481. return 0;
  482. }
  483. /*-------------------------------------------------------------------------*/
  484. /* unlink an ed from one of the HC chains.
  485. * just the link to the ed is unlinked.
  486. * the link from the ed still points to another operational ed or 0
  487. * so the HC can eventually finish the processing of the unlinked ed */
  488. static int ep_unlink (ohci_t *ohci, ed_t *edi)
  489. {
  490. volatile ed_t *ed = edi;
  491. ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
  492. switch (ed->type) {
  493. case PIPE_CONTROL:
  494. if (ed->ed_prev == NULL) {
  495. if (!ed->hwNextED) {
  496. ohci->hc_control &= ~OHCI_CTRL_CLE;
  497. writel (ohci->hc_control, &ohci->regs->control);
  498. }
  499. writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
  500. } else {
  501. ed->ed_prev->hwNextED = ed->hwNextED;
  502. }
  503. if (ohci->ed_controltail == ed) {
  504. ohci->ed_controltail = ed->ed_prev;
  505. } else {
  506. ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  507. }
  508. break;
  509. case PIPE_BULK:
  510. if (ed->ed_prev == NULL) {
  511. if (!ed->hwNextED) {
  512. ohci->hc_control &= ~OHCI_CTRL_BLE;
  513. writel (ohci->hc_control, &ohci->regs->control);
  514. }
  515. writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
  516. } else {
  517. ed->ed_prev->hwNextED = ed->hwNextED;
  518. }
  519. if (ohci->ed_bulktail == ed) {
  520. ohci->ed_bulktail = ed->ed_prev;
  521. } else {
  522. ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  523. }
  524. break;
  525. }
  526. ed->state = ED_UNLINK;
  527. return 0;
  528. }
  529. /*-------------------------------------------------------------------------*/
  530. /* add/reinit an endpoint; this should be done once at the
  531. * usb_set_configuration command, but the USB stack is a little bit
  532. * stateless so we do it at every transaction if the state of the ed
  533. * is ED_NEW then a dummy td is added and the state is changed to
  534. * ED_UNLINK in all other cases the state is left unchanged the ed
  535. * info fields are setted anyway even though most of them should not
  536. * change
  537. */
  538. static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
  539. {
  540. td_t *td;
  541. ed_t *ed_ret;
  542. volatile ed_t *ed;
  543. ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
  544. (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
  545. if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
  546. err("ep_add_ed: pending delete");
  547. /* pending delete request */
  548. return NULL;
  549. }
  550. if (ed->state == ED_NEW) {
  551. ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
  552. /* dummy td; end of td list for ed */
  553. td = td_alloc (usb_dev);
  554. ed->hwTailP = m32_swap ((unsigned long)td);
  555. ed->hwHeadP = ed->hwTailP;
  556. ed->state = ED_UNLINK;
  557. ed->type = usb_pipetype (pipe);
  558. ohci_dev.ed_cnt++;
  559. }
  560. ed->hwINFO = m32_swap (usb_pipedevice (pipe)
  561. | usb_pipeendpoint (pipe) << 7
  562. | (usb_pipeisoc (pipe)? 0x8000: 0)
  563. | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
  564. | usb_pipeslow (pipe) << 13
  565. | usb_maxpacket (usb_dev, pipe) << 16);
  566. return ed_ret;
  567. }
  568. /*-------------------------------------------------------------------------*
  569. * TD handling functions
  570. *-------------------------------------------------------------------------*/
  571. /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
  572. static void td_fill (ohci_t *ohci, unsigned int info,
  573. void *data, int len,
  574. struct usb_device *dev, int index, urb_priv_t *urb_priv)
  575. {
  576. volatile td_t *td, *td_pt;
  577. #ifdef OHCI_FILL_TRACE
  578. int i;
  579. #endif
  580. if (index > urb_priv->length) {
  581. err("index > length");
  582. return;
  583. }
  584. /* use this td as the next dummy */
  585. td_pt = urb_priv->td [index];
  586. td_pt->hwNextTD = 0;
  587. /* fill the old dummy TD */
  588. td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
  589. td->ed = urb_priv->ed;
  590. td->next_dl_td = NULL;
  591. td->index = index;
  592. td->data = (__u32)data;
  593. #ifdef OHCI_FILL_TRACE
  594. if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
  595. for (i = 0; i < len; i++)
  596. printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
  597. printf("\n");
  598. }
  599. #endif
  600. if (!len)
  601. data = 0;
  602. td->hwINFO = m32_swap (info);
  603. td->hwCBP = m32_swap ((unsigned long)data);
  604. if (data)
  605. td->hwBE = m32_swap ((unsigned long)(data + len - 1));
  606. else
  607. td->hwBE = 0;
  608. td->hwNextTD = m32_swap ((unsigned long)td_pt);
  609. /* append to queue */
  610. td->ed->hwTailP = td->hwNextTD;
  611. }
  612. /*-------------------------------------------------------------------------*/
  613. /* prepare all TDs of a transfer */
  614. static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
  615. int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
  616. {
  617. ohci_t *ohci = &gohci;
  618. int data_len = transfer_len;
  619. void *data;
  620. int cnt = 0;
  621. __u32 info = 0;
  622. unsigned int toggle = 0;
  623. /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
  624. if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
  625. toggle = TD_T_TOGGLE;
  626. } else {
  627. toggle = TD_T_DATA0;
  628. usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
  629. }
  630. urb->td_cnt = 0;
  631. if (data_len)
  632. data = buffer;
  633. else
  634. data = 0;
  635. switch (usb_pipetype (pipe)) {
  636. case PIPE_BULK:
  637. info = usb_pipeout (pipe)?
  638. TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
  639. while(data_len > 4096) {
  640. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
  641. data += 4096; data_len -= 4096; cnt++;
  642. }
  643. info = usb_pipeout (pipe)?
  644. TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
  645. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
  646. cnt++;
  647. if (!ohci->sleeping)
  648. writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
  649. break;
  650. case PIPE_CONTROL:
  651. info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
  652. td_fill (ohci, info, setup, 8, dev, cnt++, urb);
  653. if (data_len > 0) {
  654. info = usb_pipeout (pipe)?
  655. TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
  656. /* NOTE: mishandles transfers >8K, some >4K */
  657. td_fill (ohci, info, data, data_len, dev, cnt++, urb);
  658. }
  659. info = usb_pipeout (pipe)?
  660. TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
  661. td_fill (ohci, info, data, 0, dev, cnt++, urb);
  662. if (!ohci->sleeping)
  663. writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
  664. break;
  665. }
  666. if (urb->length != cnt)
  667. dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
  668. }
  669. /*-------------------------------------------------------------------------*
  670. * Done List handling functions
  671. *-------------------------------------------------------------------------*/
  672. /* calculate the transfer length and update the urb */
  673. static void dl_transfer_length(td_t * td)
  674. {
  675. __u32 tdINFO, tdBE, tdCBP;
  676. urb_priv_t *lurb_priv = &urb_priv;
  677. tdINFO = m32_swap (td->hwINFO);
  678. tdBE = m32_swap (td->hwBE);
  679. tdCBP = m32_swap (td->hwCBP);
  680. if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
  681. ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
  682. if (tdBE != 0) {
  683. if (td->hwCBP == 0)
  684. lurb_priv->actual_length += tdBE - td->data + 1;
  685. else
  686. lurb_priv->actual_length += tdCBP - td->data;
  687. }
  688. }
  689. }
  690. /*-------------------------------------------------------------------------*/
  691. /* replies to the request have to be on a FIFO basis so
  692. * we reverse the reversed done-list */
  693. static td_t * dl_reverse_done_list (ohci_t *ohci)
  694. {
  695. __u32 td_list_hc;
  696. td_t *td_rev = NULL;
  697. td_t *td_list = NULL;
  698. urb_priv_t *lurb_priv = NULL;
  699. td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
  700. ohci->hcca->done_head = 0;
  701. while (td_list_hc) {
  702. td_list = (td_t *)td_list_hc;
  703. if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
  704. lurb_priv = &urb_priv;
  705. dbg(" USB-error/status: %x : %p",
  706. TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
  707. if (td_list->ed->hwHeadP & m32_swap (0x1)) {
  708. if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
  709. td_list->ed->hwHeadP =
  710. (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
  711. (td_list->ed->hwHeadP & m32_swap (0x2));
  712. lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
  713. } else
  714. td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
  715. }
  716. #ifdef CONFIG_MPC5200
  717. td_list->hwNextTD = 0;
  718. #endif
  719. }
  720. td_list->next_dl_td = td_rev;
  721. td_rev = td_list;
  722. td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
  723. }
  724. return td_list;
  725. }
  726. /*-------------------------------------------------------------------------*/
  727. /* td done list */
  728. static int dl_done_list (ohci_t *ohci, td_t *td_list)
  729. {
  730. td_t *td_list_next = NULL;
  731. ed_t *ed;
  732. int cc = 0;
  733. int stat = 0;
  734. /* urb_t *urb; */
  735. urb_priv_t *lurb_priv;
  736. __u32 tdINFO, edHeadP, edTailP;
  737. while (td_list) {
  738. td_list_next = td_list->next_dl_td;
  739. lurb_priv = &urb_priv;
  740. tdINFO = m32_swap (td_list->hwINFO);
  741. ed = td_list->ed;
  742. dl_transfer_length(td_list);
  743. /* error code of transfer */
  744. cc = TD_CC_GET (tdINFO);
  745. if (cc != 0) {
  746. dbg("ConditionCode %#x", cc);
  747. stat = cc_to_error[cc];
  748. }
  749. /* see if this done list makes for all TD's of current URB,
  750. * and mark the URB finished if so */
  751. if (++(lurb_priv->td_cnt) == lurb_priv->length) {
  752. #if 1
  753. if ((ed->state & (ED_OPER | ED_UNLINK)) &&
  754. (lurb_priv->state != URB_DEL))
  755. #else
  756. if ((ed->state & (ED_OPER | ED_UNLINK)))
  757. urb_finished = 1;
  758. else
  759. dbg("dl_done_list: strange.., ED state %x, ed->state\n");
  760. } else
  761. dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
  762. lurb_priv->length);
  763. #endif
  764. if (ed->state != ED_NEW) {
  765. edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
  766. edTailP = m32_swap (ed->hwTailP);
  767. /* unlink eds if they are not busy */
  768. if ((edHeadP == edTailP) && (ed->state == ED_OPER))
  769. ep_unlink (ohci, ed);
  770. }
  771. td_list = td_list_next;
  772. }
  773. return stat;
  774. }
  775. /*-------------------------------------------------------------------------*
  776. * Virtual Root Hub
  777. *-------------------------------------------------------------------------*/
  778. /* Device descriptor */
  779. static __u8 root_hub_dev_des[] =
  780. {
  781. 0x12, /* __u8 bLength; */
  782. 0x01, /* __u8 bDescriptorType; Device */
  783. 0x10, /* __u16 bcdUSB; v1.1 */
  784. 0x01,
  785. 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
  786. 0x00, /* __u8 bDeviceSubClass; */
  787. 0x00, /* __u8 bDeviceProtocol; */
  788. 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
  789. 0x00, /* __u16 idVendor; */
  790. 0x00,
  791. 0x00, /* __u16 idProduct; */
  792. 0x00,
  793. 0x00, /* __u16 bcdDevice; */
  794. 0x00,
  795. 0x00, /* __u8 iManufacturer; */
  796. 0x01, /* __u8 iProduct; */
  797. 0x00, /* __u8 iSerialNumber; */
  798. 0x01 /* __u8 bNumConfigurations; */
  799. };
  800. /* Configuration descriptor */
  801. static __u8 root_hub_config_des[] =
  802. {
  803. 0x09, /* __u8 bLength; */
  804. 0x02, /* __u8 bDescriptorType; Configuration */
  805. 0x19, /* __u16 wTotalLength; */
  806. 0x00,
  807. 0x01, /* __u8 bNumInterfaces; */
  808. 0x01, /* __u8 bConfigurationValue; */
  809. 0x00, /* __u8 iConfiguration; */
  810. 0x40, /* __u8 bmAttributes;
  811. Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
  812. 0x00, /* __u8 MaxPower; */
  813. /* interface */
  814. 0x09, /* __u8 if_bLength; */
  815. 0x04, /* __u8 if_bDescriptorType; Interface */
  816. 0x00, /* __u8 if_bInterfaceNumber; */
  817. 0x00, /* __u8 if_bAlternateSetting; */
  818. 0x01, /* __u8 if_bNumEndpoints; */
  819. 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
  820. 0x00, /* __u8 if_bInterfaceSubClass; */
  821. 0x00, /* __u8 if_bInterfaceProtocol; */
  822. 0x00, /* __u8 if_iInterface; */
  823. /* endpoint */
  824. 0x07, /* __u8 ep_bLength; */
  825. 0x05, /* __u8 ep_bDescriptorType; Endpoint */
  826. 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
  827. 0x03, /* __u8 ep_bmAttributes; Interrupt */
  828. 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
  829. 0x00,
  830. 0xff /* __u8 ep_bInterval; 255 ms */
  831. };
  832. static unsigned char root_hub_str_index0[] =
  833. {
  834. 0x04, /* __u8 bLength; */
  835. 0x03, /* __u8 bDescriptorType; String-descriptor */
  836. 0x09, /* __u8 lang ID */
  837. 0x04, /* __u8 lang ID */
  838. };
  839. static unsigned char root_hub_str_index1[] =
  840. {
  841. 28, /* __u8 bLength; */
  842. 0x03, /* __u8 bDescriptorType; String-descriptor */
  843. 'O', /* __u8 Unicode */
  844. 0, /* __u8 Unicode */
  845. 'H', /* __u8 Unicode */
  846. 0, /* __u8 Unicode */
  847. 'C', /* __u8 Unicode */
  848. 0, /* __u8 Unicode */
  849. 'I', /* __u8 Unicode */
  850. 0, /* __u8 Unicode */
  851. ' ', /* __u8 Unicode */
  852. 0, /* __u8 Unicode */
  853. 'R', /* __u8 Unicode */
  854. 0, /* __u8 Unicode */
  855. 'o', /* __u8 Unicode */
  856. 0, /* __u8 Unicode */
  857. 'o', /* __u8 Unicode */
  858. 0, /* __u8 Unicode */
  859. 't', /* __u8 Unicode */
  860. 0, /* __u8 Unicode */
  861. ' ', /* __u8 Unicode */
  862. 0, /* __u8 Unicode */
  863. 'H', /* __u8 Unicode */
  864. 0, /* __u8 Unicode */
  865. 'u', /* __u8 Unicode */
  866. 0, /* __u8 Unicode */
  867. 'b', /* __u8 Unicode */
  868. 0, /* __u8 Unicode */
  869. };
  870. /* Hub class-specific descriptor is constructed dynamically */
  871. /*-------------------------------------------------------------------------*/
  872. #define OK(x) len = (x); break
  873. #ifdef DEBUG
  874. #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
  875. #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
  876. #else
  877. #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
  878. #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
  879. #endif
  880. #define RD_RH_STAT roothub_status(&gohci)
  881. #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
  882. /* request to virtual root hub */
  883. int rh_check_port_status(ohci_t *controller)
  884. {
  885. __u32 temp, ndp, i;
  886. int res;
  887. res = -1;
  888. temp = roothub_a (controller);
  889. ndp = (temp & RH_A_NDP);
  890. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  891. ndp = (ndp == 2) ? 1:0;
  892. #endif
  893. for (i = 0; i < ndp; i++) {
  894. temp = roothub_portstatus (controller, i);
  895. /* check for a device disconnect */
  896. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  897. (RH_PS_PESC | RH_PS_CSC)) &&
  898. ((temp & RH_PS_CCS) == 0)) {
  899. res = i;
  900. break;
  901. }
  902. }
  903. return res;
  904. }
  905. static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  906. void *buffer, int transfer_len, struct devrequest *cmd)
  907. {
  908. void * data = buffer;
  909. int leni = transfer_len;
  910. int len = 0;
  911. int stat = 0;
  912. __u32 datab[4];
  913. __u8 *data_buf = (__u8 *)datab;
  914. __u16 bmRType_bReq;
  915. __u16 wValue;
  916. __u16 wIndex;
  917. __u16 wLength;
  918. #ifdef DEBUG
  919. urb_priv.actual_length = 0;
  920. pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
  921. #else
  922. wait_ms(1);
  923. #endif
  924. if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
  925. info("Root-Hub submit IRQ: NOT implemented");
  926. return 0;
  927. }
  928. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  929. #if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
  930. wValue = __swap_16(cmd->value);
  931. wIndex = __swap_16(cmd->index);
  932. wLength = __swap_16(cmd->length);
  933. #else
  934. wValue = m16_swap (cmd->value);
  935. wIndex = m16_swap (cmd->index);
  936. wLength = m16_swap (cmd->length);
  937. #endif /* CONFIG_440EP || CONFIG_MPC5200 */
  938. info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
  939. dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
  940. switch (bmRType_bReq) {
  941. /* Request Destination:
  942. without flags: Device,
  943. RH_INTERFACE: interface,
  944. RH_ENDPOINT: endpoint,
  945. RH_CLASS means HUB here,
  946. RH_OTHER | RH_CLASS almost ever means HUB_PORT here
  947. */
  948. #if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
  949. case RH_GET_STATUS:
  950. *(__u16 *) data_buf = __swap_16(1); OK (2);
  951. case RH_GET_STATUS | RH_INTERFACE:
  952. *(__u16 *) data_buf = __swap_16(0); OK (2);
  953. case RH_GET_STATUS | RH_ENDPOINT:
  954. *(__u16 *) data_buf = __swap_16(0); OK (2);
  955. case RH_GET_STATUS | RH_CLASS:
  956. *(__u32 *) data_buf = __swap_32(
  957. RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  958. OK (4);
  959. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  960. *(__u32 *) data_buf = __swap_32(RD_RH_PORTSTAT); OK (4);
  961. #else
  962. case RH_GET_STATUS:
  963. *(__u16 *) data_buf = m16_swap (1); OK (2);
  964. case RH_GET_STATUS | RH_INTERFACE:
  965. *(__u16 *) data_buf = m16_swap (0); OK (2);
  966. case RH_GET_STATUS | RH_ENDPOINT:
  967. *(__u16 *) data_buf = m16_swap (0); OK (2);
  968. case RH_GET_STATUS | RH_CLASS:
  969. *(__u32 *) data_buf = m32_swap (
  970. RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  971. OK (4);
  972. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  973. *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
  974. #endif /* CONFIG_440EP || CONFIG_MPC5200 */
  975. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  976. switch (wValue) {
  977. case (RH_ENDPOINT_STALL): OK (0);
  978. }
  979. break;
  980. case RH_CLEAR_FEATURE | RH_CLASS:
  981. switch (wValue) {
  982. case RH_C_HUB_LOCAL_POWER:
  983. OK(0);
  984. case (RH_C_HUB_OVER_CURRENT):
  985. WR_RH_STAT(RH_HS_OCIC); OK (0);
  986. }
  987. break;
  988. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  989. switch (wValue) {
  990. case (RH_PORT_ENABLE):
  991. WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
  992. case (RH_PORT_SUSPEND):
  993. WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
  994. case (RH_PORT_POWER):
  995. WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
  996. case (RH_C_PORT_CONNECTION):
  997. WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
  998. case (RH_C_PORT_ENABLE):
  999. WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
  1000. case (RH_C_PORT_SUSPEND):
  1001. WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
  1002. case (RH_C_PORT_OVER_CURRENT):
  1003. WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
  1004. case (RH_C_PORT_RESET):
  1005. WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
  1006. }
  1007. break;
  1008. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  1009. switch (wValue) {
  1010. case (RH_PORT_SUSPEND):
  1011. WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
  1012. case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
  1013. if (RD_RH_PORTSTAT & RH_PS_CCS)
  1014. WR_RH_PORTSTAT (RH_PS_PRS);
  1015. OK (0);
  1016. case (RH_PORT_POWER):
  1017. WR_RH_PORTSTAT (RH_PS_PPS );
  1018. wait_ms(100);
  1019. OK (0);
  1020. case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
  1021. if (RD_RH_PORTSTAT & RH_PS_CCS)
  1022. WR_RH_PORTSTAT (RH_PS_PES );
  1023. OK (0);
  1024. }
  1025. break;
  1026. case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
  1027. case RH_GET_DESCRIPTOR:
  1028. switch ((wValue & 0xff00) >> 8) {
  1029. case (0x01): /* device descriptor */
  1030. len = min_t(unsigned int,
  1031. leni,
  1032. min_t(unsigned int,
  1033. sizeof (root_hub_dev_des),
  1034. wLength));
  1035. data_buf = root_hub_dev_des; OK(len);
  1036. case (0x02): /* configuration descriptor */
  1037. len = min_t(unsigned int,
  1038. leni,
  1039. min_t(unsigned int,
  1040. sizeof (root_hub_config_des),
  1041. wLength));
  1042. data_buf = root_hub_config_des; OK(len);
  1043. case (0x03): /* string descriptors */
  1044. if(wValue==0x0300) {
  1045. len = min_t(unsigned int,
  1046. leni,
  1047. min_t(unsigned int,
  1048. sizeof (root_hub_str_index0),
  1049. wLength));
  1050. data_buf = root_hub_str_index0;
  1051. OK(len);
  1052. }
  1053. if(wValue==0x0301) {
  1054. len = min_t(unsigned int,
  1055. leni,
  1056. min_t(unsigned int,
  1057. sizeof (root_hub_str_index1),
  1058. wLength));
  1059. data_buf = root_hub_str_index1;
  1060. OK(len);
  1061. }
  1062. default:
  1063. stat = USB_ST_STALLED;
  1064. }
  1065. break;
  1066. case RH_GET_DESCRIPTOR | RH_CLASS:
  1067. {
  1068. __u32 temp = roothub_a (&gohci);
  1069. data_buf [0] = 9; /* min length; */
  1070. data_buf [1] = 0x29;
  1071. data_buf [2] = temp & RH_A_NDP;
  1072. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  1073. data_buf [2] = (data_buf [2] == 2) ? 1:0;
  1074. #endif
  1075. data_buf [3] = 0;
  1076. if (temp & RH_A_PSM) /* per-port power switching? */
  1077. data_buf [3] |= 0x1;
  1078. if (temp & RH_A_NOCP) /* no overcurrent reporting? */
  1079. data_buf [3] |= 0x10;
  1080. else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
  1081. data_buf [3] |= 0x8;
  1082. /* corresponds to data_buf[4-7] */
  1083. datab [1] = 0;
  1084. data_buf [5] = (temp & RH_A_POTPGT) >> 24;
  1085. temp = roothub_b (&gohci);
  1086. data_buf [7] = temp & RH_B_DR;
  1087. if (data_buf [2] < 7) {
  1088. data_buf [8] = 0xff;
  1089. } else {
  1090. data_buf [0] += 2;
  1091. data_buf [8] = (temp & RH_B_DR) >> 8;
  1092. data_buf [10] = data_buf [9] = 0xff;
  1093. }
  1094. len = min_t(unsigned int, leni,
  1095. min_t(unsigned int, data_buf [0], wLength));
  1096. OK (len);
  1097. }
  1098. case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
  1099. case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
  1100. default:
  1101. dbg ("unsupported root hub command");
  1102. stat = USB_ST_STALLED;
  1103. }
  1104. #ifdef DEBUG
  1105. ohci_dump_roothub (&gohci, 1);
  1106. #else
  1107. wait_ms(1);
  1108. #endif
  1109. len = min_t(int, len, leni);
  1110. if (data != data_buf)
  1111. memcpy (data, data_buf, len);
  1112. dev->act_len = len;
  1113. dev->status = stat;
  1114. #ifdef DEBUG
  1115. if (transfer_len)
  1116. urb_priv.actual_length = transfer_len;
  1117. pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
  1118. #else
  1119. wait_ms(1);
  1120. #endif
  1121. return stat;
  1122. }
  1123. /*-------------------------------------------------------------------------*/
  1124. /* common code for handling submit messages - used for all but root hub */
  1125. /* accesses. */
  1126. int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1127. int transfer_len, struct devrequest *setup, int interval)
  1128. {
  1129. int stat = 0;
  1130. int maxsize = usb_maxpacket(dev, pipe);
  1131. int timeout;
  1132. /* device pulled? Shortcut the action. */
  1133. if (devgone == dev) {
  1134. dev->status = USB_ST_CRC_ERR;
  1135. return 0;
  1136. }
  1137. #ifdef DEBUG
  1138. urb_priv.actual_length = 0;
  1139. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1140. #else
  1141. wait_ms(1);
  1142. #endif
  1143. if (!maxsize) {
  1144. err("submit_common_message: pipesize for pipe %lx is zero",
  1145. pipe);
  1146. return -1;
  1147. }
  1148. if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
  1149. err("sohci_submit_job failed");
  1150. return -1;
  1151. }
  1152. #if 0
  1153. wait_ms(10);
  1154. /* ohci_dump_status(&gohci); */
  1155. #endif
  1156. /* allow more time for a BULK device to react - some are slow */
  1157. #define BULK_TO 5000 /* timeout in milliseconds */
  1158. if (usb_pipetype (pipe) == PIPE_BULK)
  1159. timeout = BULK_TO;
  1160. else
  1161. timeout = 100;
  1162. /* wait for it to complete */
  1163. for (;;) {
  1164. /* check whether the controller is done */
  1165. stat = hc_interrupt();
  1166. if (stat < 0) {
  1167. stat = USB_ST_CRC_ERR;
  1168. break;
  1169. }
  1170. /* NOTE: since we are not interrupt driven in U-Boot and always
  1171. * handle only one URB at a time, we cannot assume the
  1172. * transaction finished on the first successful return from
  1173. * hc_interrupt().. unless the flag for current URB is set,
  1174. * meaning that all TD's to/from device got actually
  1175. * transferred and processed. If the current URB is not
  1176. * finished we need to re-iterate this loop so as
  1177. * hc_interrupt() gets called again as there needs to be some
  1178. * more TD's to process still */
  1179. if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
  1180. /* 0xff is returned for an SF-interrupt */
  1181. break;
  1182. }
  1183. if (--timeout) {
  1184. wait_ms(1);
  1185. } else {
  1186. err("CTL:TIMEOUT ");
  1187. dbg("submit_common_msg: TO status %x\n", stat);
  1188. stat = USB_ST_CRC_ERR;
  1189. urb_finished = 1;
  1190. stat = USB_ST_CRC_ERR;
  1191. break;
  1192. }
  1193. }
  1194. dev->status = stat;
  1195. dev->act_len = transfer_len;
  1196. #ifdef DEBUG
  1197. pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
  1198. #else
  1199. wait_ms(1);
  1200. #endif
  1201. /* free TDs in urb_priv */
  1202. urb_free_priv (&urb_priv);
  1203. return 0;
  1204. }
  1205. /* submit routines called from usb.c */
  1206. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1207. int transfer_len)
  1208. {
  1209. info("submit_bulk_msg");
  1210. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
  1211. }
  1212. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1213. int transfer_len, struct devrequest *setup)
  1214. {
  1215. int maxsize = usb_maxpacket(dev, pipe);
  1216. info("submit_control_msg");
  1217. #ifdef DEBUG
  1218. urb_priv.actual_length = 0;
  1219. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1220. #else
  1221. wait_ms(1);
  1222. #endif
  1223. if (!maxsize) {
  1224. err("submit_control_message: pipesize for pipe %lx is zero",
  1225. pipe);
  1226. return -1;
  1227. }
  1228. if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
  1229. gohci.rh.dev = dev;
  1230. /* root hub - redirect */
  1231. return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
  1232. setup);
  1233. }
  1234. return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
  1235. }
  1236. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1237. int transfer_len, int interval)
  1238. {
  1239. info("submit_int_msg");
  1240. return -1;
  1241. }
  1242. /*-------------------------------------------------------------------------*
  1243. * HC functions
  1244. *-------------------------------------------------------------------------*/
  1245. /* reset the HC and BUS */
  1246. static int hc_reset (ohci_t *ohci)
  1247. {
  1248. int timeout = 30;
  1249. int smm_timeout = 50; /* 0,5 sec */
  1250. dbg("%s\n", __FUNCTION__);
  1251. if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
  1252. writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
  1253. info("USB HC TakeOver from SMM");
  1254. while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
  1255. wait_ms (10);
  1256. if (--smm_timeout == 0) {
  1257. err("USB HC TakeOver failed!");
  1258. return -1;
  1259. }
  1260. }
  1261. }
  1262. /* Disable HC interrupts */
  1263. writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
  1264. dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
  1265. ohci->slot_name,
  1266. readl(&ohci->regs->control));
  1267. /* Reset USB (needed by some controllers) */
  1268. ohci->hc_control = 0;
  1269. writel (ohci->hc_control, &ohci->regs->control);
  1270. /* HC Reset requires max 10 us delay */
  1271. writel (OHCI_HCR, &ohci->regs->cmdstatus);
  1272. while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  1273. if (--timeout == 0) {
  1274. err("USB HC reset timed out!");
  1275. return -1;
  1276. }
  1277. udelay (1);
  1278. }
  1279. return 0;
  1280. }
  1281. /*-------------------------------------------------------------------------*/
  1282. /* Start an OHCI controller, set the BUS operational
  1283. * enable interrupts
  1284. * connect the virtual root hub */
  1285. static int hc_start (ohci_t * ohci)
  1286. {
  1287. __u32 mask;
  1288. unsigned int fminterval;
  1289. ohci->disabled = 1;
  1290. /* Tell the controller where the control and bulk lists are
  1291. * The lists are empty now. */
  1292. writel (0, &ohci->regs->ed_controlhead);
  1293. writel (0, &ohci->regs->ed_bulkhead);
  1294. writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
  1295. fminterval = 0x2edf;
  1296. writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
  1297. fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
  1298. writel (fminterval, &ohci->regs->fminterval);
  1299. writel (0x628, &ohci->regs->lsthresh);
  1300. /* start controller operations */
  1301. ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
  1302. ohci->disabled = 0;
  1303. writel (ohci->hc_control, &ohci->regs->control);
  1304. /* disable all interrupts */
  1305. mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
  1306. OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
  1307. OHCI_INTR_OC | OHCI_INTR_MIE);
  1308. writel (mask, &ohci->regs->intrdisable);
  1309. /* clear all interrupts */
  1310. mask &= ~OHCI_INTR_MIE;
  1311. writel (mask, &ohci->regs->intrstatus);
  1312. /* Choose the interrupts we care about now - but w/o MIE */
  1313. mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
  1314. writel (mask, &ohci->regs->intrenable);
  1315. #ifdef OHCI_USE_NPS
  1316. /* required for AMD-756 and some Mac platforms */
  1317. writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
  1318. &ohci->regs->roothub.a);
  1319. writel (RH_HS_LPSC, &ohci->regs->roothub.status);
  1320. #endif /* OHCI_USE_NPS */
  1321. #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
  1322. /* POTPGT delay is bits 24-31, in 2 ms units. */
  1323. mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
  1324. /* connect the virtual root hub */
  1325. ohci->rh.devnum = 0;
  1326. return 0;
  1327. }
  1328. /*-------------------------------------------------------------------------*/
  1329. /* an interrupt happens */
  1330. static int hc_interrupt (void)
  1331. {
  1332. ohci_t *ohci = &gohci;
  1333. struct ohci_regs *regs = ohci->regs;
  1334. int ints;
  1335. int stat = -1;
  1336. if ((ohci->hcca->done_head != 0) &&
  1337. !(m32_swap (ohci->hcca->done_head) & 0x01)) {
  1338. ints = OHCI_INTR_WDH;
  1339. } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
  1340. ohci->disabled++;
  1341. err ("%s device removed!", ohci->slot_name);
  1342. return -1;
  1343. } else if ((ints &= readl (&regs->intrenable)) == 0) {
  1344. dbg("hc_interrupt: returning..\n");
  1345. return 0xff;
  1346. }
  1347. /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
  1348. if (ints & OHCI_INTR_RHSC) {
  1349. got_rhsc = 1;
  1350. stat = 0xff;
  1351. }
  1352. if (ints & OHCI_INTR_UE) {
  1353. ohci->disabled++;
  1354. err ("OHCI Unrecoverable Error, controller usb-%s disabled",
  1355. ohci->slot_name);
  1356. /* e.g. due to PCI Master/Target Abort */
  1357. #ifdef DEBUG
  1358. ohci_dump (ohci, 1);
  1359. #else
  1360. wait_ms(1);
  1361. #endif
  1362. /* FIXME: be optimistic, hope that bug won't repeat often. */
  1363. /* Make some non-interrupt context restart the controller. */
  1364. /* Count and limit the retries though; either hardware or */
  1365. /* software errors can go forever... */
  1366. hc_reset (ohci);
  1367. return -1;
  1368. }
  1369. if (ints & OHCI_INTR_WDH) {
  1370. wait_ms(1);
  1371. writel (OHCI_INTR_WDH, &regs->intrdisable);
  1372. stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
  1373. writel (OHCI_INTR_WDH, &regs->intrenable);
  1374. }
  1375. if (ints & OHCI_INTR_SO) {
  1376. dbg("USB Schedule overrun\n");
  1377. writel (OHCI_INTR_SO, &regs->intrenable);
  1378. stat = -1;
  1379. }
  1380. /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
  1381. if (ints & OHCI_INTR_SF) {
  1382. unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
  1383. wait_ms(1);
  1384. writel (OHCI_INTR_SF, &regs->intrdisable);
  1385. if (ohci->ed_rm_list[frame] != NULL)
  1386. writel (OHCI_INTR_SF, &regs->intrenable);
  1387. stat = 0xff;
  1388. }
  1389. writel (ints, &regs->intrstatus);
  1390. return stat;
  1391. }
  1392. /*-------------------------------------------------------------------------*/
  1393. /*-------------------------------------------------------------------------*/
  1394. /* De-allocate all resources.. */
  1395. static void hc_release_ohci (ohci_t *ohci)
  1396. {
  1397. dbg ("USB HC release ohci usb-%s", ohci->slot_name);
  1398. if (!ohci->disabled)
  1399. hc_reset (ohci);
  1400. }
  1401. /*-------------------------------------------------------------------------*/
  1402. /*
  1403. * low level initalisation routine, called from usb.c
  1404. */
  1405. static char ohci_inited = 0;
  1406. int usb_lowlevel_init(void)
  1407. {
  1408. #ifdef CFG_USB_OHCI_CPU_INIT
  1409. /* cpu dependant init */
  1410. if(usb_cpu_init())
  1411. return -1;
  1412. #endif
  1413. #ifdef CFG_USB_OHCI_BOARD_INIT
  1414. /* board dependant init */
  1415. if(usb_board_init())
  1416. return -1;
  1417. #endif
  1418. memset (&gohci, 0, sizeof (ohci_t));
  1419. memset (&urb_priv, 0, sizeof (urb_priv_t));
  1420. /* align the storage */
  1421. if ((__u32)&ghcca[0] & 0xff) {
  1422. err("HCCA not aligned!!");
  1423. return -1;
  1424. }
  1425. phcca = &ghcca[0];
  1426. info("aligned ghcca %p", phcca);
  1427. memset(&ohci_dev, 0, sizeof(struct ohci_device));
  1428. if ((__u32)&ohci_dev.ed[0] & 0x7) {
  1429. err("EDs not aligned!!");
  1430. return -1;
  1431. }
  1432. memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
  1433. if ((__u32)gtd & 0x7) {
  1434. err("TDs not aligned!!");
  1435. return -1;
  1436. }
  1437. ptd = gtd;
  1438. gohci.hcca = phcca;
  1439. memset (phcca, 0, sizeof (struct ohci_hcca));
  1440. gohci.disabled = 1;
  1441. gohci.sleeping = 0;
  1442. gohci.irq = -1;
  1443. gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
  1444. gohci.flags = 0;
  1445. gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
  1446. if (hc_reset (&gohci) < 0) {
  1447. hc_release_ohci (&gohci);
  1448. err ("can't reset usb-%s", gohci.slot_name);
  1449. #ifdef CFG_USB_OHCI_BOARD_INIT
  1450. /* board dependant cleanup */
  1451. usb_board_init_fail();
  1452. #endif
  1453. #ifdef CFG_USB_OHCI_CPU_INIT
  1454. /* cpu dependant cleanup */
  1455. usb_cpu_init_fail();
  1456. #endif
  1457. return -1;
  1458. }
  1459. /* FIXME this is a second HC reset; why?? */
  1460. /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
  1461. wait_ms(10); */
  1462. if (hc_start (&gohci) < 0) {
  1463. err ("can't start usb-%s", gohci.slot_name);
  1464. hc_release_ohci (&gohci);
  1465. /* Initialization failed */
  1466. #ifdef CFG_USB_OHCI_BOARD_INIT
  1467. /* board dependant cleanup */
  1468. usb_board_stop();
  1469. #endif
  1470. #ifdef CFG_USB_OHCI_CPU_INIT
  1471. /* cpu dependant cleanup */
  1472. usb_cpu_stop();
  1473. #endif
  1474. return -1;
  1475. }
  1476. #ifdef DEBUG
  1477. ohci_dump (&gohci, 1);
  1478. #else
  1479. wait_ms(1);
  1480. urb_finished = 1;
  1481. #endif
  1482. ohci_inited = 1;
  1483. return 0;
  1484. }
  1485. int usb_lowlevel_stop(void)
  1486. {
  1487. /* this gets called really early - before the controller has */
  1488. /* even been initialized! */
  1489. if (!ohci_inited)
  1490. return 0;
  1491. /* TODO release any interrupts, etc. */
  1492. /* call hc_release_ohci() here ? */
  1493. hc_reset (&gohci);
  1494. #ifdef CFG_USB_OHCI_BOARD_INIT
  1495. /* board dependant cleanup */
  1496. if(usb_board_stop())
  1497. return -1;
  1498. #endif
  1499. #ifdef CFG_USB_OHCI_CPU_INIT
  1500. /* cpu dependant cleanup */
  1501. if(usb_cpu_stop())
  1502. return -1;
  1503. #endif
  1504. return 0;
  1505. }
  1506. #endif /* CONFIG_USB_OHCI_NEW */