cfi_flash.c 55 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. /*
  41. * This file implements a Common Flash Interface (CFI) driver for
  42. * U-Boot.
  43. *
  44. * The width of the port and the width of the chips are determined at
  45. * initialization. These widths are used to calculate the address for
  46. * access CFI data structures.
  47. *
  48. * References
  49. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  50. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  51. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  52. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  53. * AMD CFI Specification, Release 2.0 December 1, 2001
  54. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  55. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  56. *
  57. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  58. * reading and writing ... (yes there is such a Hardware).
  59. */
  60. #ifndef CONFIG_SYS_FLASH_BANKS_LIST
  61. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  62. #endif
  63. #define FLASH_CMD_CFI 0x98
  64. #define FLASH_CMD_READ_ID 0x90
  65. #define FLASH_CMD_RESET 0xff
  66. #define FLASH_CMD_BLOCK_ERASE 0x20
  67. #define FLASH_CMD_ERASE_CONFIRM 0xD0
  68. #define FLASH_CMD_WRITE 0x40
  69. #define FLASH_CMD_PROTECT 0x60
  70. #define FLASH_CMD_PROTECT_SET 0x01
  71. #define FLASH_CMD_PROTECT_CLEAR 0xD0
  72. #define FLASH_CMD_CLEAR_STATUS 0x50
  73. #define FLASH_CMD_READ_STATUS 0x70
  74. #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
  75. #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
  76. #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
  77. #define FLASH_STATUS_DONE 0x80
  78. #define FLASH_STATUS_ESS 0x40
  79. #define FLASH_STATUS_ECLBS 0x20
  80. #define FLASH_STATUS_PSLBS 0x10
  81. #define FLASH_STATUS_VPENS 0x08
  82. #define FLASH_STATUS_PSS 0x04
  83. #define FLASH_STATUS_DPS 0x02
  84. #define FLASH_STATUS_R 0x01
  85. #define FLASH_STATUS_PROTECT 0x01
  86. #define AMD_CMD_RESET 0xF0
  87. #define AMD_CMD_WRITE 0xA0
  88. #define AMD_CMD_ERASE_START 0x80
  89. #define AMD_CMD_ERASE_SECTOR 0x30
  90. #define AMD_CMD_UNLOCK_START 0xAA
  91. #define AMD_CMD_UNLOCK_ACK 0x55
  92. #define AMD_CMD_WRITE_TO_BUFFER 0x25
  93. #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
  94. #define AMD_STATUS_TOGGLE 0x40
  95. #define AMD_STATUS_ERROR 0x20
  96. #define ATM_CMD_UNLOCK_SECT 0x70
  97. #define ATM_CMD_SOFTLOCK_START 0x80
  98. #define ATM_CMD_LOCK_SECT 0x40
  99. #define FLASH_OFFSET_MANUFACTURER_ID 0x00
  100. #define FLASH_OFFSET_DEVICE_ID 0x01
  101. #define FLASH_OFFSET_DEVICE_ID2 0x0E
  102. #define FLASH_OFFSET_DEVICE_ID3 0x0F
  103. #define FLASH_OFFSET_CFI 0x55
  104. #define FLASH_OFFSET_CFI_ALT 0x555
  105. #define FLASH_OFFSET_CFI_RESP 0x10
  106. #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
  107. /* extended query table primary address */
  108. #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
  109. #define FLASH_OFFSET_WTOUT 0x1F
  110. #define FLASH_OFFSET_WBTOUT 0x20
  111. #define FLASH_OFFSET_ETOUT 0x21
  112. #define FLASH_OFFSET_CETOUT 0x22
  113. #define FLASH_OFFSET_WMAX_TOUT 0x23
  114. #define FLASH_OFFSET_WBMAX_TOUT 0x24
  115. #define FLASH_OFFSET_EMAX_TOUT 0x25
  116. #define FLASH_OFFSET_CEMAX_TOUT 0x26
  117. #define FLASH_OFFSET_SIZE 0x27
  118. #define FLASH_OFFSET_INTERFACE 0x28
  119. #define FLASH_OFFSET_BUFFER_SIZE 0x2A
  120. #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
  121. #define FLASH_OFFSET_ERASE_REGIONS 0x2D
  122. #define FLASH_OFFSET_PROTECT 0x02
  123. #define FLASH_OFFSET_USER_PROTECTION 0x85
  124. #define FLASH_OFFSET_INTEL_PROTECTION 0x81
  125. #define CFI_CMDSET_NONE 0
  126. #define CFI_CMDSET_INTEL_EXTENDED 1
  127. #define CFI_CMDSET_AMD_STANDARD 2
  128. #define CFI_CMDSET_INTEL_STANDARD 3
  129. #define CFI_CMDSET_AMD_EXTENDED 4
  130. #define CFI_CMDSET_MITSU_STANDARD 256
  131. #define CFI_CMDSET_MITSU_EXTENDED 257
  132. #define CFI_CMDSET_SST 258
  133. #define CFI_CMDSET_INTEL_PROG_REGIONS 512
  134. #ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
  135. # undef FLASH_CMD_RESET
  136. # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
  137. #endif
  138. typedef union {
  139. unsigned char c;
  140. unsigned short w;
  141. unsigned long l;
  142. unsigned long long ll;
  143. } cfiword_t;
  144. #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
  145. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  146. static uint flash_verbose = 1;
  147. /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
  148. #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
  149. # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
  150. #else
  151. # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
  152. #endif
  153. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  154. /*
  155. * Check if chip width is defined. If not, start detecting with 8bit.
  156. */
  157. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  158. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  159. #endif
  160. /* CFI standard query structure */
  161. struct cfi_qry {
  162. u8 qry[3];
  163. u16 p_id;
  164. u16 p_adr;
  165. u16 a_id;
  166. u16 a_adr;
  167. u8 vcc_min;
  168. u8 vcc_max;
  169. u8 vpp_min;
  170. u8 vpp_max;
  171. u8 word_write_timeout_typ;
  172. u8 buf_write_timeout_typ;
  173. u8 block_erase_timeout_typ;
  174. u8 chip_erase_timeout_typ;
  175. u8 word_write_timeout_max;
  176. u8 buf_write_timeout_max;
  177. u8 block_erase_timeout_max;
  178. u8 chip_erase_timeout_max;
  179. u8 dev_size;
  180. u16 interface_desc;
  181. u16 max_buf_write_size;
  182. u8 num_erase_regions;
  183. u32 erase_region_info[NUM_ERASE_REGIONS];
  184. } __attribute__((packed));
  185. struct cfi_pri_hdr {
  186. u8 pri[3];
  187. u8 major_version;
  188. u8 minor_version;
  189. } __attribute__((packed));
  190. static void __flash_write8(u8 value, void *addr)
  191. {
  192. __raw_writeb(value, addr);
  193. }
  194. static void __flash_write16(u16 value, void *addr)
  195. {
  196. __raw_writew(value, addr);
  197. }
  198. static void __flash_write32(u32 value, void *addr)
  199. {
  200. __raw_writel(value, addr);
  201. }
  202. static void __flash_write64(u64 value, void *addr)
  203. {
  204. /* No architectures currently implement __raw_writeq() */
  205. *(volatile u64 *)addr = value;
  206. }
  207. static u8 __flash_read8(void *addr)
  208. {
  209. return __raw_readb(addr);
  210. }
  211. static u16 __flash_read16(void *addr)
  212. {
  213. return __raw_readw(addr);
  214. }
  215. static u32 __flash_read32(void *addr)
  216. {
  217. return __raw_readl(addr);
  218. }
  219. static u64 __flash_read64(void *addr)
  220. {
  221. /* No architectures currently implement __raw_readq() */
  222. return *(volatile u64 *)addr;
  223. }
  224. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  225. void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
  226. void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
  227. void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
  228. void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
  229. u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
  230. u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
  231. u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
  232. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  233. #else
  234. #define flash_write8 __flash_write8
  235. #define flash_write16 __flash_write16
  236. #define flash_write32 __flash_write32
  237. #define flash_write64 __flash_write64
  238. #define flash_read8 __flash_read8
  239. #define flash_read16 __flash_read16
  240. #define flash_read32 __flash_read32
  241. #define flash_read64 __flash_read64
  242. #endif
  243. /*-----------------------------------------------------------------------
  244. */
  245. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  246. flash_info_t *flash_get_info(ulong base)
  247. {
  248. int i;
  249. flash_info_t * info = 0;
  250. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  251. info = & flash_info[i];
  252. if (info->size && info->start[0] <= base &&
  253. base <= info->start[0] + info->size - 1)
  254. break;
  255. }
  256. return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
  257. }
  258. #endif
  259. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  260. {
  261. if (sect != (info->sector_count - 1))
  262. return info->start[sect + 1] - info->start[sect];
  263. else
  264. return info->start[0] + info->size - info->start[sect];
  265. }
  266. /*-----------------------------------------------------------------------
  267. * create an address based on the offset and the port width
  268. */
  269. static inline void *
  270. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  271. {
  272. unsigned int byte_offset = offset * info->portwidth;
  273. return (void *)(info->start[sect] + byte_offset);
  274. }
  275. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  276. unsigned int offset, void *addr)
  277. {
  278. }
  279. /*-----------------------------------------------------------------------
  280. * make a proper sized command based on the port and chip widths
  281. */
  282. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  283. {
  284. int i;
  285. int cword_offset;
  286. int cp_offset;
  287. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  288. u32 cmd_le = cpu_to_le32(cmd);
  289. #endif
  290. uchar val;
  291. uchar *cp = (uchar *) cmdbuf;
  292. for (i = info->portwidth; i > 0; i--){
  293. cword_offset = (info->portwidth-i)%info->chipwidth;
  294. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  295. cp_offset = info->portwidth - i;
  296. val = *((uchar*)&cmd_le + cword_offset);
  297. #else
  298. cp_offset = i - 1;
  299. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  300. #endif
  301. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  302. }
  303. }
  304. #ifdef DEBUG
  305. /*-----------------------------------------------------------------------
  306. * Debug support
  307. */
  308. static void print_longlong (char *str, unsigned long long data)
  309. {
  310. int i;
  311. char *cp;
  312. cp = (char *) &data;
  313. for (i = 0; i < 8; i++)
  314. sprintf (&str[i * 2], "%2.2x", *cp++);
  315. }
  316. static void flash_printqry (struct cfi_qry *qry)
  317. {
  318. u8 *p = (u8 *)qry;
  319. int x, y;
  320. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  321. debug("%02x : ", x);
  322. for (y = 0; y < 16; y++)
  323. debug("%2.2x ", p[x + y]);
  324. debug(" ");
  325. for (y = 0; y < 16; y++) {
  326. unsigned char c = p[x + y];
  327. if (c >= 0x20 && c <= 0x7e)
  328. debug("%c", c);
  329. else
  330. debug(".");
  331. }
  332. debug("\n");
  333. }
  334. }
  335. #endif
  336. /*-----------------------------------------------------------------------
  337. * read a character at a port width address
  338. */
  339. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  340. {
  341. uchar *cp;
  342. uchar retval;
  343. cp = flash_map (info, 0, offset);
  344. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  345. retval = flash_read8(cp);
  346. #else
  347. retval = flash_read8(cp + info->portwidth - 1);
  348. #endif
  349. flash_unmap (info, 0, offset, cp);
  350. return retval;
  351. }
  352. /*-----------------------------------------------------------------------
  353. * read a word at a port width address, assume 16bit bus
  354. */
  355. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  356. {
  357. ushort *addr, retval;
  358. addr = flash_map (info, 0, offset);
  359. retval = flash_read16 (addr);
  360. flash_unmap (info, 0, offset, addr);
  361. return retval;
  362. }
  363. /*-----------------------------------------------------------------------
  364. * read a long word by picking the least significant byte of each maximum
  365. * port size word. Swap for ppc format.
  366. */
  367. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  368. uint offset)
  369. {
  370. uchar *addr;
  371. ulong retval;
  372. #ifdef DEBUG
  373. int x;
  374. #endif
  375. addr = flash_map (info, sect, offset);
  376. #ifdef DEBUG
  377. debug ("long addr is at %p info->portwidth = %d\n", addr,
  378. info->portwidth);
  379. for (x = 0; x < 4 * info->portwidth; x++) {
  380. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  381. }
  382. #endif
  383. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  384. retval = ((flash_read8(addr) << 16) |
  385. (flash_read8(addr + info->portwidth) << 24) |
  386. (flash_read8(addr + 2 * info->portwidth)) |
  387. (flash_read8(addr + 3 * info->portwidth) << 8));
  388. #else
  389. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  390. (flash_read8(addr + info->portwidth - 1) << 16) |
  391. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  392. (flash_read8(addr + 3 * info->portwidth - 1)));
  393. #endif
  394. flash_unmap(info, sect, offset, addr);
  395. return retval;
  396. }
  397. /*
  398. * Write a proper sized command to the correct address
  399. */
  400. static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  401. uint offset, u32 cmd)
  402. {
  403. void *addr;
  404. cfiword_t cword;
  405. addr = flash_map (info, sect, offset);
  406. flash_make_cmd (info, cmd, &cword);
  407. switch (info->portwidth) {
  408. case FLASH_CFI_8BIT:
  409. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  410. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  411. flash_write8(cword.c, addr);
  412. break;
  413. case FLASH_CFI_16BIT:
  414. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  415. cmd, cword.w,
  416. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  417. flash_write16(cword.w, addr);
  418. break;
  419. case FLASH_CFI_32BIT:
  420. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  421. cmd, cword.l,
  422. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  423. flash_write32(cword.l, addr);
  424. break;
  425. case FLASH_CFI_64BIT:
  426. #ifdef DEBUG
  427. {
  428. char str[20];
  429. print_longlong (str, cword.ll);
  430. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  431. addr, cmd, str,
  432. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  433. }
  434. #endif
  435. flash_write64(cword.ll, addr);
  436. break;
  437. }
  438. /* Ensure all the instructions are fully finished */
  439. sync();
  440. flash_unmap(info, sect, offset, addr);
  441. }
  442. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  443. {
  444. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  445. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  446. }
  447. /*-----------------------------------------------------------------------
  448. */
  449. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  450. uint offset, uchar cmd)
  451. {
  452. void *addr;
  453. cfiword_t cword;
  454. int retval;
  455. addr = flash_map (info, sect, offset);
  456. flash_make_cmd (info, cmd, &cword);
  457. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  458. switch (info->portwidth) {
  459. case FLASH_CFI_8BIT:
  460. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  461. retval = (flash_read8(addr) == cword.c);
  462. break;
  463. case FLASH_CFI_16BIT:
  464. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  465. retval = (flash_read16(addr) == cword.w);
  466. break;
  467. case FLASH_CFI_32BIT:
  468. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  469. retval = (flash_read32(addr) == cword.l);
  470. break;
  471. case FLASH_CFI_64BIT:
  472. #ifdef DEBUG
  473. {
  474. char str1[20];
  475. char str2[20];
  476. print_longlong (str1, flash_read64(addr));
  477. print_longlong (str2, cword.ll);
  478. debug ("is= %s %s\n", str1, str2);
  479. }
  480. #endif
  481. retval = (flash_read64(addr) == cword.ll);
  482. break;
  483. default:
  484. retval = 0;
  485. break;
  486. }
  487. flash_unmap(info, sect, offset, addr);
  488. return retval;
  489. }
  490. /*-----------------------------------------------------------------------
  491. */
  492. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  493. uint offset, uchar cmd)
  494. {
  495. void *addr;
  496. cfiword_t cword;
  497. int retval;
  498. addr = flash_map (info, sect, offset);
  499. flash_make_cmd (info, cmd, &cword);
  500. switch (info->portwidth) {
  501. case FLASH_CFI_8BIT:
  502. retval = ((flash_read8(addr) & cword.c) == cword.c);
  503. break;
  504. case FLASH_CFI_16BIT:
  505. retval = ((flash_read16(addr) & cword.w) == cword.w);
  506. break;
  507. case FLASH_CFI_32BIT:
  508. retval = ((flash_read32(addr) & cword.l) == cword.l);
  509. break;
  510. case FLASH_CFI_64BIT:
  511. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  512. break;
  513. default:
  514. retval = 0;
  515. break;
  516. }
  517. flash_unmap(info, sect, offset, addr);
  518. return retval;
  519. }
  520. /*-----------------------------------------------------------------------
  521. */
  522. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  523. uint offset, uchar cmd)
  524. {
  525. void *addr;
  526. cfiword_t cword;
  527. int retval;
  528. addr = flash_map (info, sect, offset);
  529. flash_make_cmd (info, cmd, &cword);
  530. switch (info->portwidth) {
  531. case FLASH_CFI_8BIT:
  532. retval = flash_read8(addr) != flash_read8(addr);
  533. break;
  534. case FLASH_CFI_16BIT:
  535. retval = flash_read16(addr) != flash_read16(addr);
  536. break;
  537. case FLASH_CFI_32BIT:
  538. retval = flash_read32(addr) != flash_read32(addr);
  539. break;
  540. case FLASH_CFI_64BIT:
  541. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  542. (flash_read32(addr+4) != flash_read32(addr+4)) );
  543. break;
  544. default:
  545. retval = 0;
  546. break;
  547. }
  548. flash_unmap(info, sect, offset, addr);
  549. return retval;
  550. }
  551. /*
  552. * flash_is_busy - check to see if the flash is busy
  553. *
  554. * This routine checks the status of the chip and returns true if the
  555. * chip is busy.
  556. */
  557. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  558. {
  559. int retval;
  560. switch (info->vendor) {
  561. case CFI_CMDSET_INTEL_PROG_REGIONS:
  562. case CFI_CMDSET_INTEL_STANDARD:
  563. case CFI_CMDSET_INTEL_EXTENDED:
  564. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  565. break;
  566. case CFI_CMDSET_AMD_STANDARD:
  567. case CFI_CMDSET_AMD_EXTENDED:
  568. #ifdef CONFIG_FLASH_CFI_LEGACY
  569. case CFI_CMDSET_AMD_LEGACY:
  570. #endif
  571. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  572. break;
  573. default:
  574. retval = 0;
  575. }
  576. debug ("flash_is_busy: %d\n", retval);
  577. return retval;
  578. }
  579. /*-----------------------------------------------------------------------
  580. * wait for XSR.7 to be set. Time out with an error if it does not.
  581. * This routine does not set the flash to read-array mode.
  582. */
  583. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  584. ulong tout, char *prompt)
  585. {
  586. ulong start;
  587. #if CONFIG_SYS_HZ != 1000
  588. tout *= CONFIG_SYS_HZ/1000;
  589. #endif
  590. /* Wait for command completion */
  591. start = get_timer (0);
  592. while (flash_is_busy (info, sector)) {
  593. if (get_timer (start) > tout) {
  594. printf ("Flash %s timeout at address %lx data %lx\n",
  595. prompt, info->start[sector],
  596. flash_read_long (info, sector, 0));
  597. flash_write_cmd (info, sector, 0, info->cmd_reset);
  598. return ERR_TIMOUT;
  599. }
  600. udelay (1); /* also triggers watchdog */
  601. }
  602. return ERR_OK;
  603. }
  604. /*-----------------------------------------------------------------------
  605. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  606. * do a full status check.
  607. *
  608. * This routine sets the flash to read-array mode.
  609. */
  610. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  611. ulong tout, char *prompt)
  612. {
  613. int retcode;
  614. retcode = flash_status_check (info, sector, tout, prompt);
  615. switch (info->vendor) {
  616. case CFI_CMDSET_INTEL_PROG_REGIONS:
  617. case CFI_CMDSET_INTEL_EXTENDED:
  618. case CFI_CMDSET_INTEL_STANDARD:
  619. if ((retcode != ERR_OK)
  620. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  621. retcode = ERR_INVAL;
  622. printf ("Flash %s error at address %lx\n", prompt,
  623. info->start[sector]);
  624. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  625. FLASH_STATUS_PSLBS)) {
  626. puts ("Command Sequence Error.\n");
  627. } else if (flash_isset (info, sector, 0,
  628. FLASH_STATUS_ECLBS)) {
  629. puts ("Block Erase Error.\n");
  630. retcode = ERR_NOT_ERASED;
  631. } else if (flash_isset (info, sector, 0,
  632. FLASH_STATUS_PSLBS)) {
  633. puts ("Locking Error\n");
  634. }
  635. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  636. puts ("Block locked.\n");
  637. retcode = ERR_PROTECTED;
  638. }
  639. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  640. puts ("Vpp Low Error.\n");
  641. }
  642. flash_write_cmd (info, sector, 0, info->cmd_reset);
  643. break;
  644. default:
  645. break;
  646. }
  647. return retcode;
  648. }
  649. /*-----------------------------------------------------------------------
  650. */
  651. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  652. {
  653. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  654. unsigned short w;
  655. unsigned int l;
  656. unsigned long long ll;
  657. #endif
  658. switch (info->portwidth) {
  659. case FLASH_CFI_8BIT:
  660. cword->c = c;
  661. break;
  662. case FLASH_CFI_16BIT:
  663. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  664. w = c;
  665. w <<= 8;
  666. cword->w = (cword->w >> 8) | w;
  667. #else
  668. cword->w = (cword->w << 8) | c;
  669. #endif
  670. break;
  671. case FLASH_CFI_32BIT:
  672. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  673. l = c;
  674. l <<= 24;
  675. cword->l = (cword->l >> 8) | l;
  676. #else
  677. cword->l = (cword->l << 8) | c;
  678. #endif
  679. break;
  680. case FLASH_CFI_64BIT:
  681. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  682. ll = c;
  683. ll <<= 56;
  684. cword->ll = (cword->ll >> 8) | ll;
  685. #else
  686. cword->ll = (cword->ll << 8) | c;
  687. #endif
  688. break;
  689. }
  690. }
  691. /*
  692. * Loop through the sector table starting from the previously found sector.
  693. * Searches forwards or backwards, dependent on the passed address.
  694. */
  695. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  696. {
  697. static flash_sect_t saved_sector = 0; /* previously found sector */
  698. flash_sect_t sector = saved_sector;
  699. while ((info->start[sector] < addr)
  700. && (sector < info->sector_count - 1))
  701. sector++;
  702. while ((info->start[sector] > addr) && (sector > 0))
  703. /*
  704. * also decrements the sector in case of an overshot
  705. * in the first loop
  706. */
  707. sector--;
  708. saved_sector = sector;
  709. return sector;
  710. }
  711. /*-----------------------------------------------------------------------
  712. */
  713. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  714. cfiword_t cword)
  715. {
  716. void *dstaddr = (void *)dest;
  717. int flag;
  718. flash_sect_t sect = 0;
  719. char sect_found = 0;
  720. /* Check if Flash is (sufficiently) erased */
  721. switch (info->portwidth) {
  722. case FLASH_CFI_8BIT:
  723. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  724. break;
  725. case FLASH_CFI_16BIT:
  726. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  727. break;
  728. case FLASH_CFI_32BIT:
  729. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  730. break;
  731. case FLASH_CFI_64BIT:
  732. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  733. break;
  734. default:
  735. flag = 0;
  736. break;
  737. }
  738. if (!flag)
  739. return ERR_NOT_ERASED;
  740. /* Disable interrupts which might cause a timeout here */
  741. flag = disable_interrupts ();
  742. switch (info->vendor) {
  743. case CFI_CMDSET_INTEL_PROG_REGIONS:
  744. case CFI_CMDSET_INTEL_EXTENDED:
  745. case CFI_CMDSET_INTEL_STANDARD:
  746. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  747. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  748. break;
  749. case CFI_CMDSET_AMD_EXTENDED:
  750. case CFI_CMDSET_AMD_STANDARD:
  751. #ifdef CONFIG_FLASH_CFI_LEGACY
  752. case CFI_CMDSET_AMD_LEGACY:
  753. #endif
  754. sect = find_sector(info, dest);
  755. flash_unlock_seq (info, sect);
  756. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  757. sect_found = 1;
  758. break;
  759. }
  760. switch (info->portwidth) {
  761. case FLASH_CFI_8BIT:
  762. flash_write8(cword.c, dstaddr);
  763. break;
  764. case FLASH_CFI_16BIT:
  765. flash_write16(cword.w, dstaddr);
  766. break;
  767. case FLASH_CFI_32BIT:
  768. flash_write32(cword.l, dstaddr);
  769. break;
  770. case FLASH_CFI_64BIT:
  771. flash_write64(cword.ll, dstaddr);
  772. break;
  773. }
  774. /* re-enable interrupts if necessary */
  775. if (flag)
  776. enable_interrupts ();
  777. if (!sect_found)
  778. sect = find_sector (info, dest);
  779. return flash_full_status_check (info, sect, info->write_tout, "write");
  780. }
  781. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  782. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  783. int len)
  784. {
  785. flash_sect_t sector;
  786. int cnt;
  787. int retcode;
  788. void *src = cp;
  789. void *dst = (void *)dest;
  790. void *dst2 = dst;
  791. int flag = 0;
  792. uint offset = 0;
  793. unsigned int shift;
  794. uchar write_cmd;
  795. switch (info->portwidth) {
  796. case FLASH_CFI_8BIT:
  797. shift = 0;
  798. break;
  799. case FLASH_CFI_16BIT:
  800. shift = 1;
  801. break;
  802. case FLASH_CFI_32BIT:
  803. shift = 2;
  804. break;
  805. case FLASH_CFI_64BIT:
  806. shift = 3;
  807. break;
  808. default:
  809. retcode = ERR_INVAL;
  810. goto out_unmap;
  811. }
  812. cnt = len >> shift;
  813. while ((cnt-- > 0) && (flag == 0)) {
  814. switch (info->portwidth) {
  815. case FLASH_CFI_8BIT:
  816. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  817. flash_read8(src));
  818. src += 1, dst2 += 1;
  819. break;
  820. case FLASH_CFI_16BIT:
  821. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  822. flash_read16(src));
  823. src += 2, dst2 += 2;
  824. break;
  825. case FLASH_CFI_32BIT:
  826. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  827. flash_read32(src));
  828. src += 4, dst2 += 4;
  829. break;
  830. case FLASH_CFI_64BIT:
  831. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  832. flash_read64(src));
  833. src += 8, dst2 += 8;
  834. break;
  835. }
  836. }
  837. if (!flag) {
  838. retcode = ERR_NOT_ERASED;
  839. goto out_unmap;
  840. }
  841. src = cp;
  842. sector = find_sector (info, dest);
  843. switch (info->vendor) {
  844. case CFI_CMDSET_INTEL_PROG_REGIONS:
  845. case CFI_CMDSET_INTEL_STANDARD:
  846. case CFI_CMDSET_INTEL_EXTENDED:
  847. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  848. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  849. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  850. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  851. flash_write_cmd (info, sector, 0, write_cmd);
  852. retcode = flash_status_check (info, sector,
  853. info->buffer_write_tout,
  854. "write to buffer");
  855. if (retcode == ERR_OK) {
  856. /* reduce the number of loops by the width of
  857. * the port */
  858. cnt = len >> shift;
  859. flash_write_cmd (info, sector, 0, cnt - 1);
  860. while (cnt-- > 0) {
  861. switch (info->portwidth) {
  862. case FLASH_CFI_8BIT:
  863. flash_write8(flash_read8(src), dst);
  864. src += 1, dst += 1;
  865. break;
  866. case FLASH_CFI_16BIT:
  867. flash_write16(flash_read16(src), dst);
  868. src += 2, dst += 2;
  869. break;
  870. case FLASH_CFI_32BIT:
  871. flash_write32(flash_read32(src), dst);
  872. src += 4, dst += 4;
  873. break;
  874. case FLASH_CFI_64BIT:
  875. flash_write64(flash_read64(src), dst);
  876. src += 8, dst += 8;
  877. break;
  878. default:
  879. retcode = ERR_INVAL;
  880. goto out_unmap;
  881. }
  882. }
  883. flash_write_cmd (info, sector, 0,
  884. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  885. retcode = flash_full_status_check (
  886. info, sector, info->buffer_write_tout,
  887. "buffer write");
  888. }
  889. break;
  890. case CFI_CMDSET_AMD_STANDARD:
  891. case CFI_CMDSET_AMD_EXTENDED:
  892. flash_unlock_seq(info,0);
  893. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  894. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  895. #endif
  896. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  897. cnt = len >> shift;
  898. flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
  899. switch (info->portwidth) {
  900. case FLASH_CFI_8BIT:
  901. while (cnt-- > 0) {
  902. flash_write8(flash_read8(src), dst);
  903. src += 1, dst += 1;
  904. }
  905. break;
  906. case FLASH_CFI_16BIT:
  907. while (cnt-- > 0) {
  908. flash_write16(flash_read16(src), dst);
  909. src += 2, dst += 2;
  910. }
  911. break;
  912. case FLASH_CFI_32BIT:
  913. while (cnt-- > 0) {
  914. flash_write32(flash_read32(src), dst);
  915. src += 4, dst += 4;
  916. }
  917. break;
  918. case FLASH_CFI_64BIT:
  919. while (cnt-- > 0) {
  920. flash_write64(flash_read64(src), dst);
  921. src += 8, dst += 8;
  922. }
  923. break;
  924. default:
  925. retcode = ERR_INVAL;
  926. goto out_unmap;
  927. }
  928. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  929. retcode = flash_full_status_check (info, sector,
  930. info->buffer_write_tout,
  931. "buffer write");
  932. break;
  933. default:
  934. debug ("Unknown Command Set\n");
  935. retcode = ERR_INVAL;
  936. break;
  937. }
  938. out_unmap:
  939. return retcode;
  940. }
  941. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  942. /*-----------------------------------------------------------------------
  943. */
  944. int flash_erase (flash_info_t * info, int s_first, int s_last)
  945. {
  946. int rcode = 0;
  947. int prot;
  948. flash_sect_t sect;
  949. if (info->flash_id != FLASH_MAN_CFI) {
  950. puts ("Can't erase unknown flash type - aborted\n");
  951. return 1;
  952. }
  953. if ((s_first < 0) || (s_first > s_last)) {
  954. puts ("- no sectors to erase\n");
  955. return 1;
  956. }
  957. prot = 0;
  958. for (sect = s_first; sect <= s_last; ++sect) {
  959. if (info->protect[sect]) {
  960. prot++;
  961. }
  962. }
  963. if (prot) {
  964. printf ("- Warning: %d protected sectors will not be erased!\n",
  965. prot);
  966. } else if (flash_verbose) {
  967. putc ('\n');
  968. }
  969. for (sect = s_first; sect <= s_last; sect++) {
  970. if (info->protect[sect] == 0) { /* not protected */
  971. switch (info->vendor) {
  972. case CFI_CMDSET_INTEL_PROG_REGIONS:
  973. case CFI_CMDSET_INTEL_STANDARD:
  974. case CFI_CMDSET_INTEL_EXTENDED:
  975. flash_write_cmd (info, sect, 0,
  976. FLASH_CMD_CLEAR_STATUS);
  977. flash_write_cmd (info, sect, 0,
  978. FLASH_CMD_BLOCK_ERASE);
  979. flash_write_cmd (info, sect, 0,
  980. FLASH_CMD_ERASE_CONFIRM);
  981. break;
  982. case CFI_CMDSET_AMD_STANDARD:
  983. case CFI_CMDSET_AMD_EXTENDED:
  984. flash_unlock_seq (info, sect);
  985. flash_write_cmd (info, sect,
  986. info->addr_unlock1,
  987. AMD_CMD_ERASE_START);
  988. flash_unlock_seq (info, sect);
  989. flash_write_cmd (info, sect, 0,
  990. AMD_CMD_ERASE_SECTOR);
  991. break;
  992. #ifdef CONFIG_FLASH_CFI_LEGACY
  993. case CFI_CMDSET_AMD_LEGACY:
  994. flash_unlock_seq (info, 0);
  995. flash_write_cmd (info, 0, info->addr_unlock1,
  996. AMD_CMD_ERASE_START);
  997. flash_unlock_seq (info, 0);
  998. flash_write_cmd (info, sect, 0,
  999. AMD_CMD_ERASE_SECTOR);
  1000. break;
  1001. #endif
  1002. default:
  1003. debug ("Unkown flash vendor %d\n",
  1004. info->vendor);
  1005. break;
  1006. }
  1007. if (flash_full_status_check
  1008. (info, sect, info->erase_blk_tout, "erase")) {
  1009. rcode = 1;
  1010. } else if (flash_verbose)
  1011. putc ('.');
  1012. }
  1013. }
  1014. if (flash_verbose)
  1015. puts (" done\n");
  1016. return rcode;
  1017. }
  1018. /*-----------------------------------------------------------------------
  1019. */
  1020. void flash_print_info (flash_info_t * info)
  1021. {
  1022. int i;
  1023. if (info->flash_id != FLASH_MAN_CFI) {
  1024. puts ("missing or unknown FLASH type\n");
  1025. return;
  1026. }
  1027. printf ("%s FLASH (%d x %d)",
  1028. info->name,
  1029. (info->portwidth << 3), (info->chipwidth << 3));
  1030. if (info->size < 1024*1024)
  1031. printf (" Size: %ld kB in %d Sectors\n",
  1032. info->size >> 10, info->sector_count);
  1033. else
  1034. printf (" Size: %ld MB in %d Sectors\n",
  1035. info->size >> 20, info->sector_count);
  1036. printf (" ");
  1037. switch (info->vendor) {
  1038. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1039. printf ("Intel Prog Regions");
  1040. break;
  1041. case CFI_CMDSET_INTEL_STANDARD:
  1042. printf ("Intel Standard");
  1043. break;
  1044. case CFI_CMDSET_INTEL_EXTENDED:
  1045. printf ("Intel Extended");
  1046. break;
  1047. case CFI_CMDSET_AMD_STANDARD:
  1048. printf ("AMD Standard");
  1049. break;
  1050. case CFI_CMDSET_AMD_EXTENDED:
  1051. printf ("AMD Extended");
  1052. break;
  1053. #ifdef CONFIG_FLASH_CFI_LEGACY
  1054. case CFI_CMDSET_AMD_LEGACY:
  1055. printf ("AMD Legacy");
  1056. break;
  1057. #endif
  1058. default:
  1059. printf ("Unknown (%d)", info->vendor);
  1060. break;
  1061. }
  1062. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
  1063. info->manufacturer_id, info->device_id);
  1064. if (info->device_id == 0x7E) {
  1065. printf("%04X", info->device_id2);
  1066. }
  1067. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1068. info->erase_blk_tout,
  1069. info->write_tout);
  1070. if (info->buffer_size > 1) {
  1071. printf (" Buffer write timeout: %ld ms, "
  1072. "buffer size: %d bytes\n",
  1073. info->buffer_write_tout,
  1074. info->buffer_size);
  1075. }
  1076. puts ("\n Sector Start Addresses:");
  1077. for (i = 0; i < info->sector_count; ++i) {
  1078. if ((i % 5) == 0)
  1079. printf ("\n");
  1080. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1081. int k;
  1082. int size;
  1083. int erased;
  1084. volatile unsigned long *flash;
  1085. /*
  1086. * Check if whole sector is erased
  1087. */
  1088. size = flash_sector_size(info, i);
  1089. erased = 1;
  1090. flash = (volatile unsigned long *) info->start[i];
  1091. size = size >> 2; /* divide by 4 for longword access */
  1092. for (k = 0; k < size; k++) {
  1093. if (*flash++ != 0xffffffff) {
  1094. erased = 0;
  1095. break;
  1096. }
  1097. }
  1098. /* print empty and read-only info */
  1099. printf (" %08lX %c %s ",
  1100. info->start[i],
  1101. erased ? 'E' : ' ',
  1102. info->protect[i] ? "RO" : " ");
  1103. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1104. printf (" %08lX %s ",
  1105. info->start[i],
  1106. info->protect[i] ? "RO" : " ");
  1107. #endif
  1108. }
  1109. putc ('\n');
  1110. return;
  1111. }
  1112. /*-----------------------------------------------------------------------
  1113. * This is used in a few places in write_buf() to show programming
  1114. * progress. Making it a function is nasty because it needs to do side
  1115. * effect updates to digit and dots. Repeated code is nasty too, so
  1116. * we define it once here.
  1117. */
  1118. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1119. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1120. if (flash_verbose) { \
  1121. dots -= dots_sub; \
  1122. if ((scale > 0) && (dots <= 0)) { \
  1123. if ((digit % 5) == 0) \
  1124. printf ("%d", digit / 5); \
  1125. else \
  1126. putc ('.'); \
  1127. digit--; \
  1128. dots += scale; \
  1129. } \
  1130. }
  1131. #else
  1132. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1133. #endif
  1134. /*-----------------------------------------------------------------------
  1135. * Copy memory to flash, returns:
  1136. * 0 - OK
  1137. * 1 - write timeout
  1138. * 2 - Flash not erased
  1139. */
  1140. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1141. {
  1142. ulong wp;
  1143. uchar *p;
  1144. int aln;
  1145. cfiword_t cword;
  1146. int i, rc;
  1147. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1148. int buffered_size;
  1149. #endif
  1150. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1151. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1152. int scale = 0;
  1153. int dots = 0;
  1154. /*
  1155. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1156. */
  1157. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1158. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1159. CONFIG_FLASH_SHOW_PROGRESS);
  1160. }
  1161. #endif
  1162. /* get lower aligned address */
  1163. wp = (addr & ~(info->portwidth - 1));
  1164. /* handle unaligned start */
  1165. if ((aln = addr - wp) != 0) {
  1166. cword.l = 0;
  1167. p = (uchar *)wp;
  1168. for (i = 0; i < aln; ++i)
  1169. flash_add_byte (info, &cword, flash_read8(p + i));
  1170. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1171. flash_add_byte (info, &cword, *src++);
  1172. cnt--;
  1173. }
  1174. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1175. flash_add_byte (info, &cword, flash_read8(p + i));
  1176. rc = flash_write_cfiword (info, wp, cword);
  1177. if (rc != 0)
  1178. return rc;
  1179. wp += i;
  1180. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1181. }
  1182. /* handle the aligned part */
  1183. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1184. buffered_size = (info->portwidth / info->chipwidth);
  1185. buffered_size *= info->buffer_size;
  1186. while (cnt >= info->portwidth) {
  1187. /* prohibit buffer write when buffer_size is 1 */
  1188. if (info->buffer_size == 1) {
  1189. cword.l = 0;
  1190. for (i = 0; i < info->portwidth; i++)
  1191. flash_add_byte (info, &cword, *src++);
  1192. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1193. return rc;
  1194. wp += info->portwidth;
  1195. cnt -= info->portwidth;
  1196. continue;
  1197. }
  1198. /* write buffer until next buffered_size aligned boundary */
  1199. i = buffered_size - (wp % buffered_size);
  1200. if (i > cnt)
  1201. i = cnt;
  1202. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1203. return rc;
  1204. i -= i & (info->portwidth - 1);
  1205. wp += i;
  1206. src += i;
  1207. cnt -= i;
  1208. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1209. }
  1210. #else
  1211. while (cnt >= info->portwidth) {
  1212. cword.l = 0;
  1213. for (i = 0; i < info->portwidth; i++) {
  1214. flash_add_byte (info, &cword, *src++);
  1215. }
  1216. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1217. return rc;
  1218. wp += info->portwidth;
  1219. cnt -= info->portwidth;
  1220. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1221. }
  1222. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1223. if (cnt == 0) {
  1224. return (0);
  1225. }
  1226. /*
  1227. * handle unaligned tail bytes
  1228. */
  1229. cword.l = 0;
  1230. p = (uchar *)wp;
  1231. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1232. flash_add_byte (info, &cword, *src++);
  1233. --cnt;
  1234. }
  1235. for (; i < info->portwidth; ++i)
  1236. flash_add_byte (info, &cword, flash_read8(p + i));
  1237. return flash_write_cfiword (info, wp, cword);
  1238. }
  1239. /*-----------------------------------------------------------------------
  1240. */
  1241. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1242. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1243. {
  1244. int retcode = 0;
  1245. switch (info->vendor) {
  1246. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1247. case CFI_CMDSET_INTEL_STANDARD:
  1248. case CFI_CMDSET_INTEL_EXTENDED:
  1249. flash_write_cmd (info, sector, 0,
  1250. FLASH_CMD_CLEAR_STATUS);
  1251. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1252. if (prot)
  1253. flash_write_cmd (info, sector, 0,
  1254. FLASH_CMD_PROTECT_SET);
  1255. else
  1256. flash_write_cmd (info, sector, 0,
  1257. FLASH_CMD_PROTECT_CLEAR);
  1258. break;
  1259. case CFI_CMDSET_AMD_EXTENDED:
  1260. case CFI_CMDSET_AMD_STANDARD:
  1261. /* U-Boot only checks the first byte */
  1262. if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
  1263. if (prot) {
  1264. flash_unlock_seq (info, 0);
  1265. flash_write_cmd (info, 0,
  1266. info->addr_unlock1,
  1267. ATM_CMD_SOFTLOCK_START);
  1268. flash_unlock_seq (info, 0);
  1269. flash_write_cmd (info, sector, 0,
  1270. ATM_CMD_LOCK_SECT);
  1271. } else {
  1272. flash_write_cmd (info, 0,
  1273. info->addr_unlock1,
  1274. AMD_CMD_UNLOCK_START);
  1275. if (info->device_id == ATM_ID_BV6416)
  1276. flash_write_cmd (info, sector,
  1277. 0, ATM_CMD_UNLOCK_SECT);
  1278. }
  1279. }
  1280. break;
  1281. #ifdef CONFIG_FLASH_CFI_LEGACY
  1282. case CFI_CMDSET_AMD_LEGACY:
  1283. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1284. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1285. if (prot)
  1286. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1287. else
  1288. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1289. #endif
  1290. };
  1291. if ((retcode =
  1292. flash_full_status_check (info, sector, info->erase_blk_tout,
  1293. prot ? "protect" : "unprotect")) == 0) {
  1294. info->protect[sector] = prot;
  1295. /*
  1296. * On some of Intel's flash chips (marked via legacy_unlock)
  1297. * unprotect unprotects all locking.
  1298. */
  1299. if ((prot == 0) && (info->legacy_unlock)) {
  1300. flash_sect_t i;
  1301. for (i = 0; i < info->sector_count; i++) {
  1302. if (info->protect[i])
  1303. flash_real_protect (info, i, 1);
  1304. }
  1305. }
  1306. }
  1307. return retcode;
  1308. }
  1309. /*-----------------------------------------------------------------------
  1310. * flash_read_user_serial - read the OneTimeProgramming cells
  1311. */
  1312. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1313. int len)
  1314. {
  1315. uchar *src;
  1316. uchar *dst;
  1317. dst = buffer;
  1318. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1319. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1320. memcpy (dst, src + offset, len);
  1321. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1322. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1323. }
  1324. /*
  1325. * flash_read_factory_serial - read the device Id from the protection area
  1326. */
  1327. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1328. int len)
  1329. {
  1330. uchar *src;
  1331. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1332. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1333. memcpy (buffer, src + offset, len);
  1334. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1335. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1336. }
  1337. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1338. /*-----------------------------------------------------------------------
  1339. * Reverse the order of the erase regions in the CFI QRY structure.
  1340. * This is needed for chips that are either a) correctly detected as
  1341. * top-boot, or b) buggy.
  1342. */
  1343. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1344. {
  1345. unsigned int i, j;
  1346. u32 tmp;
  1347. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1348. tmp = qry->erase_region_info[i];
  1349. qry->erase_region_info[i] = qry->erase_region_info[j];
  1350. qry->erase_region_info[j] = tmp;
  1351. }
  1352. }
  1353. /*-----------------------------------------------------------------------
  1354. * read jedec ids from device and set corresponding fields in info struct
  1355. *
  1356. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1357. *
  1358. */
  1359. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1360. {
  1361. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1362. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1363. udelay(1000); /* some flash are slow to respond */
  1364. info->manufacturer_id = flash_read_uchar (info,
  1365. FLASH_OFFSET_MANUFACTURER_ID);
  1366. info->device_id = flash_read_uchar (info,
  1367. FLASH_OFFSET_DEVICE_ID);
  1368. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1369. }
  1370. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1371. {
  1372. info->cmd_reset = FLASH_CMD_RESET;
  1373. cmdset_intel_read_jedec_ids(info);
  1374. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1375. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1376. /* read legacy lock/unlock bit from intel flash */
  1377. if (info->ext_addr) {
  1378. info->legacy_unlock = flash_read_uchar (info,
  1379. info->ext_addr + 5) & 0x08;
  1380. }
  1381. #endif
  1382. return 0;
  1383. }
  1384. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1385. {
  1386. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1387. flash_unlock_seq(info, 0);
  1388. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1389. udelay(1000); /* some flash are slow to respond */
  1390. info->manufacturer_id = flash_read_uchar (info,
  1391. FLASH_OFFSET_MANUFACTURER_ID);
  1392. switch (info->chipwidth){
  1393. case FLASH_CFI_8BIT:
  1394. info->device_id = flash_read_uchar (info,
  1395. FLASH_OFFSET_DEVICE_ID);
  1396. if (info->device_id == 0x7E) {
  1397. /* AMD 3-byte (expanded) device ids */
  1398. info->device_id2 = flash_read_uchar (info,
  1399. FLASH_OFFSET_DEVICE_ID2);
  1400. info->device_id2 <<= 8;
  1401. info->device_id2 |= flash_read_uchar (info,
  1402. FLASH_OFFSET_DEVICE_ID3);
  1403. }
  1404. break;
  1405. case FLASH_CFI_16BIT:
  1406. info->device_id = flash_read_word (info,
  1407. FLASH_OFFSET_DEVICE_ID);
  1408. break;
  1409. default:
  1410. break;
  1411. }
  1412. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1413. }
  1414. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1415. {
  1416. info->cmd_reset = AMD_CMD_RESET;
  1417. cmdset_amd_read_jedec_ids(info);
  1418. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1419. return 0;
  1420. }
  1421. #ifdef CONFIG_FLASH_CFI_LEGACY
  1422. static void flash_read_jedec_ids (flash_info_t * info)
  1423. {
  1424. info->manufacturer_id = 0;
  1425. info->device_id = 0;
  1426. info->device_id2 = 0;
  1427. switch (info->vendor) {
  1428. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1429. case CFI_CMDSET_INTEL_STANDARD:
  1430. case CFI_CMDSET_INTEL_EXTENDED:
  1431. cmdset_intel_read_jedec_ids(info);
  1432. break;
  1433. case CFI_CMDSET_AMD_STANDARD:
  1434. case CFI_CMDSET_AMD_EXTENDED:
  1435. cmdset_amd_read_jedec_ids(info);
  1436. break;
  1437. default:
  1438. break;
  1439. }
  1440. }
  1441. /*-----------------------------------------------------------------------
  1442. * Call board code to request info about non-CFI flash.
  1443. * board_flash_get_legacy needs to fill in at least:
  1444. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1445. */
  1446. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1447. {
  1448. flash_info_t *info = &flash_info[banknum];
  1449. if (board_flash_get_legacy(base, banknum, info)) {
  1450. /* board code may have filled info completely. If not, we
  1451. use JEDEC ID probing. */
  1452. if (!info->vendor) {
  1453. int modes[] = {
  1454. CFI_CMDSET_AMD_STANDARD,
  1455. CFI_CMDSET_INTEL_STANDARD
  1456. };
  1457. int i;
  1458. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1459. info->vendor = modes[i];
  1460. info->start[0] =
  1461. (ulong)map_physmem(base,
  1462. info->portwidth,
  1463. MAP_NOCACHE);
  1464. if (info->portwidth == FLASH_CFI_8BIT
  1465. && info->interface == FLASH_CFI_X8X16) {
  1466. info->addr_unlock1 = 0x2AAA;
  1467. info->addr_unlock2 = 0x5555;
  1468. } else {
  1469. info->addr_unlock1 = 0x5555;
  1470. info->addr_unlock2 = 0x2AAA;
  1471. }
  1472. flash_read_jedec_ids(info);
  1473. debug("JEDEC PROBE: ID %x %x %x\n",
  1474. info->manufacturer_id,
  1475. info->device_id,
  1476. info->device_id2);
  1477. if (jedec_flash_match(info, info->start[0]))
  1478. break;
  1479. else
  1480. unmap_physmem((void *)info->start[0],
  1481. MAP_NOCACHE);
  1482. }
  1483. }
  1484. switch(info->vendor) {
  1485. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1486. case CFI_CMDSET_INTEL_STANDARD:
  1487. case CFI_CMDSET_INTEL_EXTENDED:
  1488. info->cmd_reset = FLASH_CMD_RESET;
  1489. break;
  1490. case CFI_CMDSET_AMD_STANDARD:
  1491. case CFI_CMDSET_AMD_EXTENDED:
  1492. case CFI_CMDSET_AMD_LEGACY:
  1493. info->cmd_reset = AMD_CMD_RESET;
  1494. break;
  1495. }
  1496. info->flash_id = FLASH_MAN_CFI;
  1497. return 1;
  1498. }
  1499. return 0; /* use CFI */
  1500. }
  1501. #else
  1502. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1503. {
  1504. return 0; /* use CFI */
  1505. }
  1506. #endif
  1507. /*-----------------------------------------------------------------------
  1508. * detect if flash is compatible with the Common Flash Interface (CFI)
  1509. * http://www.jedec.org/download/search/jesd68.pdf
  1510. */
  1511. static void flash_read_cfi (flash_info_t *info, void *buf,
  1512. unsigned int start, size_t len)
  1513. {
  1514. u8 *p = buf;
  1515. unsigned int i;
  1516. for (i = 0; i < len; i++)
  1517. p[i] = flash_read_uchar(info, start + i);
  1518. }
  1519. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1520. {
  1521. int cfi_offset;
  1522. /* We do not yet know what kind of commandset to use, so we issue
  1523. the reset command in both Intel and AMD variants, in the hope
  1524. that AMD flash roms ignore the Intel command. */
  1525. flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
  1526. flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
  1527. for (cfi_offset=0;
  1528. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1529. cfi_offset++) {
  1530. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1531. FLASH_CMD_CFI);
  1532. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1533. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1534. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1535. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1536. sizeof(struct cfi_qry));
  1537. info->interface = le16_to_cpu(qry->interface_desc);
  1538. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1539. debug ("device interface is %d\n",
  1540. info->interface);
  1541. debug ("found port %d chip %d ",
  1542. info->portwidth, info->chipwidth);
  1543. debug ("port %d bits chip %d bits\n",
  1544. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1545. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1546. /* calculate command offsets as in the Linux driver */
  1547. info->addr_unlock1 = 0x555;
  1548. info->addr_unlock2 = 0x2aa;
  1549. /*
  1550. * modify the unlock address if we are
  1551. * in compatibility mode
  1552. */
  1553. if ( /* x8/x16 in x8 mode */
  1554. ((info->chipwidth == FLASH_CFI_BY8) &&
  1555. (info->interface == FLASH_CFI_X8X16)) ||
  1556. /* x16/x32 in x16 mode */
  1557. ((info->chipwidth == FLASH_CFI_BY16) &&
  1558. (info->interface == FLASH_CFI_X16X32)))
  1559. {
  1560. info->addr_unlock1 = 0xaaa;
  1561. info->addr_unlock2 = 0x555;
  1562. }
  1563. info->name = "CFI conformant";
  1564. return 1;
  1565. }
  1566. }
  1567. return 0;
  1568. }
  1569. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1570. {
  1571. debug ("flash detect cfi\n");
  1572. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1573. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1574. for (info->chipwidth = FLASH_CFI_BY8;
  1575. info->chipwidth <= info->portwidth;
  1576. info->chipwidth <<= 1)
  1577. if (__flash_detect_cfi(info, qry))
  1578. return 1;
  1579. }
  1580. debug ("not found\n");
  1581. return 0;
  1582. }
  1583. /*
  1584. * Manufacturer-specific quirks. Add workarounds for geometry
  1585. * reversal, etc. here.
  1586. */
  1587. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1588. {
  1589. /* check if flash geometry needs reversal */
  1590. if (qry->num_erase_regions > 1) {
  1591. /* reverse geometry if top boot part */
  1592. if (info->cfi_version < 0x3131) {
  1593. /* CFI < 1.1, try to guess from device id */
  1594. if ((info->device_id & 0x80) != 0)
  1595. cfi_reverse_geometry(qry);
  1596. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1597. /* CFI >= 1.1, deduct from top/bottom flag */
  1598. /* note: ext_addr is valid since cfi_version > 0 */
  1599. cfi_reverse_geometry(qry);
  1600. }
  1601. }
  1602. }
  1603. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1604. {
  1605. int reverse_geometry = 0;
  1606. /* Check the "top boot" bit in the PRI */
  1607. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1608. reverse_geometry = 1;
  1609. /* AT49BV6416(T) list the erase regions in the wrong order.
  1610. * However, the device ID is identical with the non-broken
  1611. * AT49BV642D they differ in the high byte.
  1612. */
  1613. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1614. reverse_geometry = !reverse_geometry;
  1615. if (reverse_geometry)
  1616. cfi_reverse_geometry(qry);
  1617. }
  1618. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1619. {
  1620. /* check if flash geometry needs reversal */
  1621. if (qry->num_erase_regions > 1) {
  1622. /* reverse geometry if top boot part */
  1623. if (info->cfi_version < 0x3131) {
  1624. /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
  1625. if (info->device_id == 0x22CA ||
  1626. info->device_id == 0x2256) {
  1627. cfi_reverse_geometry(qry);
  1628. }
  1629. }
  1630. }
  1631. }
  1632. /*
  1633. * The following code cannot be run from FLASH!
  1634. *
  1635. */
  1636. ulong flash_get_size (phys_addr_t base, int banknum)
  1637. {
  1638. flash_info_t *info = &flash_info[banknum];
  1639. int i, j;
  1640. flash_sect_t sect_cnt;
  1641. phys_addr_t sector;
  1642. unsigned long tmp;
  1643. int size_ratio;
  1644. uchar num_erase_regions;
  1645. int erase_region_size;
  1646. int erase_region_count;
  1647. struct cfi_qry qry;
  1648. memset(&qry, 0, sizeof(qry));
  1649. info->ext_addr = 0;
  1650. info->cfi_version = 0;
  1651. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1652. info->legacy_unlock = 0;
  1653. #endif
  1654. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1655. if (flash_detect_cfi (info, &qry)) {
  1656. info->vendor = le16_to_cpu(qry.p_id);
  1657. info->ext_addr = le16_to_cpu(qry.p_adr);
  1658. num_erase_regions = qry.num_erase_regions;
  1659. if (info->ext_addr) {
  1660. info->cfi_version = (ushort) flash_read_uchar (info,
  1661. info->ext_addr + 3) << 8;
  1662. info->cfi_version |= (ushort) flash_read_uchar (info,
  1663. info->ext_addr + 4);
  1664. }
  1665. #ifdef DEBUG
  1666. flash_printqry (&qry);
  1667. #endif
  1668. switch (info->vendor) {
  1669. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1670. case CFI_CMDSET_INTEL_STANDARD:
  1671. case CFI_CMDSET_INTEL_EXTENDED:
  1672. cmdset_intel_init(info, &qry);
  1673. break;
  1674. case CFI_CMDSET_AMD_STANDARD:
  1675. case CFI_CMDSET_AMD_EXTENDED:
  1676. cmdset_amd_init(info, &qry);
  1677. break;
  1678. default:
  1679. printf("CFI: Unknown command set 0x%x\n",
  1680. info->vendor);
  1681. /*
  1682. * Unfortunately, this means we don't know how
  1683. * to get the chip back to Read mode. Might
  1684. * as well try an Intel-style reset...
  1685. */
  1686. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1687. return 0;
  1688. }
  1689. /* Do manufacturer-specific fixups */
  1690. switch (info->manufacturer_id) {
  1691. case 0x0001:
  1692. flash_fixup_amd(info, &qry);
  1693. break;
  1694. case 0x001f:
  1695. flash_fixup_atmel(info, &qry);
  1696. break;
  1697. case 0x0020:
  1698. flash_fixup_stm(info, &qry);
  1699. break;
  1700. }
  1701. debug ("manufacturer is %d\n", info->vendor);
  1702. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1703. debug ("device id is 0x%x\n", info->device_id);
  1704. debug ("device id2 is 0x%x\n", info->device_id2);
  1705. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1706. size_ratio = info->portwidth / info->chipwidth;
  1707. /* if the chip is x8/x16 reduce the ratio by half */
  1708. if ((info->interface == FLASH_CFI_X8X16)
  1709. && (info->chipwidth == FLASH_CFI_BY8)) {
  1710. size_ratio >>= 1;
  1711. }
  1712. debug ("size_ratio %d port %d bits chip %d bits\n",
  1713. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1714. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1715. debug ("found %d erase regions\n", num_erase_regions);
  1716. sect_cnt = 0;
  1717. sector = base;
  1718. for (i = 0; i < num_erase_regions; i++) {
  1719. if (i > NUM_ERASE_REGIONS) {
  1720. printf ("%d erase regions found, only %d used\n",
  1721. num_erase_regions, NUM_ERASE_REGIONS);
  1722. break;
  1723. }
  1724. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1725. debug("erase region %u: 0x%08lx\n", i, tmp);
  1726. erase_region_count = (tmp & 0xffff) + 1;
  1727. tmp >>= 16;
  1728. erase_region_size =
  1729. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1730. debug ("erase_region_count = %d erase_region_size = %d\n",
  1731. erase_region_count, erase_region_size);
  1732. for (j = 0; j < erase_region_count; j++) {
  1733. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1734. printf("ERROR: too many flash sectors\n");
  1735. break;
  1736. }
  1737. info->start[sect_cnt] =
  1738. (ulong)map_physmem(sector,
  1739. info->portwidth,
  1740. MAP_NOCACHE);
  1741. sector += (erase_region_size * size_ratio);
  1742. /*
  1743. * Only read protection status from
  1744. * supported devices (intel...)
  1745. */
  1746. switch (info->vendor) {
  1747. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1748. case CFI_CMDSET_INTEL_EXTENDED:
  1749. case CFI_CMDSET_INTEL_STANDARD:
  1750. info->protect[sect_cnt] =
  1751. flash_isset (info, sect_cnt,
  1752. FLASH_OFFSET_PROTECT,
  1753. FLASH_STATUS_PROTECT);
  1754. break;
  1755. default:
  1756. /* default: not protected */
  1757. info->protect[sect_cnt] = 0;
  1758. }
  1759. sect_cnt++;
  1760. }
  1761. }
  1762. info->sector_count = sect_cnt;
  1763. info->size = 1 << qry.dev_size;
  1764. /* multiply the size by the number of chips */
  1765. info->size *= size_ratio;
  1766. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  1767. tmp = 1 << qry.block_erase_timeout_typ;
  1768. info->erase_blk_tout = tmp *
  1769. (1 << qry.block_erase_timeout_max);
  1770. tmp = (1 << qry.buf_write_timeout_typ) *
  1771. (1 << qry.buf_write_timeout_max);
  1772. /* round up when converting to ms */
  1773. info->buffer_write_tout = (tmp + 999) / 1000;
  1774. tmp = (1 << qry.word_write_timeout_typ) *
  1775. (1 << qry.word_write_timeout_max);
  1776. /* round up when converting to ms */
  1777. info->write_tout = (tmp + 999) / 1000;
  1778. info->flash_id = FLASH_MAN_CFI;
  1779. if ((info->interface == FLASH_CFI_X8X16) &&
  1780. (info->chipwidth == FLASH_CFI_BY8)) {
  1781. /* XXX - Need to test on x8/x16 in parallel. */
  1782. info->portwidth >>= 1;
  1783. }
  1784. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1785. }
  1786. return (info->size);
  1787. }
  1788. void flash_set_verbose(uint v)
  1789. {
  1790. flash_verbose = v;
  1791. }
  1792. /*-----------------------------------------------------------------------
  1793. */
  1794. unsigned long flash_init (void)
  1795. {
  1796. unsigned long size = 0;
  1797. int i;
  1798. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1799. struct apl_s {
  1800. ulong start;
  1801. ulong size;
  1802. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  1803. #endif
  1804. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1805. /* read environment from EEPROM */
  1806. char s[64];
  1807. getenv_r ("unlock", s, sizeof(s));
  1808. #endif
  1809. #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
  1810. /* Init: no FLASHes known */
  1811. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  1812. flash_info[i].flash_id = FLASH_UNKNOWN;
  1813. if (!flash_detect_legacy (BANK_BASE(i), i))
  1814. flash_get_size (BANK_BASE(i), i);
  1815. size += flash_info[i].size;
  1816. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  1817. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  1818. printf ("## Unknown FLASH on Bank %d "
  1819. "- Size = 0x%08lx = %ld MB\n",
  1820. i+1, flash_info[i].size,
  1821. flash_info[i].size << 20);
  1822. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  1823. }
  1824. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1825. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  1826. /*
  1827. * Only the U-Boot image and it's environment
  1828. * is protected, all other sectors are
  1829. * unprotected (unlocked) if flash hardware
  1830. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  1831. * and the environment variable "unlock" is
  1832. * set to "yes".
  1833. */
  1834. if (flash_info[i].legacy_unlock) {
  1835. int k;
  1836. /*
  1837. * Disable legacy_unlock temporarily,
  1838. * since flash_real_protect would
  1839. * relock all other sectors again
  1840. * otherwise.
  1841. */
  1842. flash_info[i].legacy_unlock = 0;
  1843. /*
  1844. * Legacy unlocking (e.g. Intel J3) ->
  1845. * unlock only one sector. This will
  1846. * unlock all sectors.
  1847. */
  1848. flash_real_protect (&flash_info[i], 0, 0);
  1849. flash_info[i].legacy_unlock = 1;
  1850. /*
  1851. * Manually mark other sectors as
  1852. * unlocked (unprotected)
  1853. */
  1854. for (k = 1; k < flash_info[i].sector_count; k++)
  1855. flash_info[i].protect[k] = 0;
  1856. } else {
  1857. /*
  1858. * No legancy unlocking -> unlock all sectors
  1859. */
  1860. flash_protect (FLAG_PROTECT_CLEAR,
  1861. flash_info[i].start[0],
  1862. flash_info[i].start[0]
  1863. + flash_info[i].size - 1,
  1864. &flash_info[i]);
  1865. }
  1866. }
  1867. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1868. }
  1869. /* Monitor protection ON by default */
  1870. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  1871. flash_protect (FLAG_PROTECT_SET,
  1872. CONFIG_SYS_MONITOR_BASE,
  1873. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  1874. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  1875. #endif
  1876. /* Environment protection ON by default */
  1877. #ifdef CONFIG_ENV_IS_IN_FLASH
  1878. flash_protect (FLAG_PROTECT_SET,
  1879. CONFIG_ENV_ADDR,
  1880. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  1881. flash_get_info(CONFIG_ENV_ADDR));
  1882. #endif
  1883. /* Redundant environment protection ON by default */
  1884. #ifdef CONFIG_ENV_ADDR_REDUND
  1885. flash_protect (FLAG_PROTECT_SET,
  1886. CONFIG_ENV_ADDR_REDUND,
  1887. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  1888. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  1889. #endif
  1890. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1891. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  1892. debug("autoprotecting from %08x to %08x\n",
  1893. apl[i].start, apl[i].start + apl[i].size - 1);
  1894. flash_protect (FLAG_PROTECT_SET,
  1895. apl[i].start,
  1896. apl[i].start + apl[i].size - 1,
  1897. flash_get_info(apl[i].start));
  1898. }
  1899. #endif
  1900. #ifdef CONFIG_FLASH_CFI_MTD
  1901. cfi_mtd_init();
  1902. #endif
  1903. return (size);
  1904. }