flash.c 21 KB

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  1. /*
  2. * (C) Copyright 2000
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <mpc8xx.h>
  25. /* environment.h defines the various CONFIG_ENV_... values in terms
  26. * of whichever ones are given in the configuration file.
  27. */
  28. #include <environment.h>
  29. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
  30. /* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
  31. * has nothing to do with the flash chip being 8-bit or 16-bit.
  32. */
  33. #ifdef CONFIG_FLASH_16BIT
  34. typedef unsigned short FLASH_PORT_WIDTH;
  35. typedef volatile unsigned short FLASH_PORT_WIDTHV;
  36. #define FLASH_ID_MASK 0xFFFF
  37. #else
  38. typedef unsigned long FLASH_PORT_WIDTH;
  39. typedef volatile unsigned long FLASH_PORT_WIDTHV;
  40. #define FLASH_ID_MASK 0xFFFFFFFF
  41. #endif
  42. #define FPW FLASH_PORT_WIDTH
  43. #define FPWV FLASH_PORT_WIDTHV
  44. #define ORMASK(size) ((-size) & OR_AM_MSK)
  45. /*-----------------------------------------------------------------------
  46. * Functions
  47. */
  48. static ulong flash_get_size(FPWV *addr, flash_info_t *info);
  49. static void flash_reset(flash_info_t *info);
  50. static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
  51. static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
  52. static void flash_get_offsets(ulong base, flash_info_t *info);
  53. #ifdef CONFIG_SYS_FLASH_PROTECTION
  54. static void flash_sync_real_protect(flash_info_t *info);
  55. #endif
  56. /*-----------------------------------------------------------------------
  57. * flash_init()
  58. *
  59. * sets up flash_info and returns size of FLASH (bytes)
  60. */
  61. unsigned long flash_init (void)
  62. {
  63. volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
  64. volatile memctl8xx_t *memctl = &immap->im_memctl;
  65. unsigned long size_b;
  66. int i;
  67. /* Init: no FLASHes known */
  68. for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  69. flash_info[i].flash_id = FLASH_UNKNOWN;
  70. }
  71. size_b = flash_get_size((FPW *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
  72. flash_info[0].size = size_b;
  73. if (flash_info[0].flash_id == FLASH_UNKNOWN) {
  74. printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx\n",size_b);
  75. }
  76. /* Remap FLASH according to real size, so only at proper address */
  77. memctl->memc_or0 = (memctl->memc_or0 & ~OR_AM_MSK) | ORMASK(size_b);
  78. /* Do this again (was done already in flast_get_size), just
  79. * in case we move it when remap the FLASH.
  80. */
  81. flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
  82. #ifdef CONFIG_SYS_FLASH_PROTECTION
  83. /* read the hardware protection status (if any) into the
  84. * protection array in flash_info.
  85. */
  86. flash_sync_real_protect(&flash_info[0]);
  87. #endif
  88. #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
  89. /* monitor protection ON by default */
  90. flash_protect(FLAG_PROTECT_SET,
  91. CONFIG_SYS_MONITOR_BASE,
  92. CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
  93. &flash_info[0]);
  94. #endif
  95. #ifdef CONFIG_ENV_ADDR
  96. flash_protect ( FLAG_PROTECT_SET,
  97. CONFIG_ENV_ADDR,
  98. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]);
  99. #endif
  100. #ifdef CONFIG_ENV_ADDR_REDUND
  101. flash_protect ( FLAG_PROTECT_SET,
  102. CONFIG_ENV_ADDR_REDUND,
  103. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  104. &flash_info[0]);
  105. #endif
  106. return (size_b);
  107. }
  108. /*-----------------------------------------------------------------------
  109. */
  110. static void flash_reset(flash_info_t *info)
  111. {
  112. FPWV *base = (FPWV *)(info->start[0]);
  113. /* Put FLASH back in read mode */
  114. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  115. *base = (FPW)0x00FF00FF; /* Intel Read Mode */
  116. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
  117. *base = (FPW)0x00F000F0; /* AMD Read Mode */
  118. }
  119. /*-----------------------------------------------------------------------
  120. */
  121. static void flash_get_offsets (ulong base, flash_info_t *info)
  122. {
  123. int i;
  124. /* set up sector start address table */
  125. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
  126. && (info->flash_id & FLASH_BTYPE)) {
  127. int bootsect_size; /* number of bytes/boot sector */
  128. int sect_size; /* number of bytes/regular sector */
  129. bootsect_size = 0x00002000 * (sizeof(FPW)/2);
  130. sect_size = 0x00010000 * (sizeof(FPW)/2);
  131. /* set sector offsets for bottom boot block type */
  132. for (i = 0; i < 8; ++i) {
  133. info->start[i] = base + (i * bootsect_size);
  134. }
  135. for (i = 8; i < info->sector_count; i++) {
  136. info->start[i] = base + ((i - 7) * sect_size);
  137. }
  138. }
  139. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
  140. && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
  141. int sect_size; /* number of bytes/sector */
  142. sect_size = 0x00010000 * (sizeof(FPW)/2);
  143. /* set up sector start address table (uniform sector type) */
  144. for( i = 0; i < info->sector_count; i++ )
  145. info->start[i] = base + (i * sect_size);
  146. }
  147. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
  148. && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM800T) {
  149. int sect_size; /* number of bytes/sector */
  150. sect_size = 0x00010000 * (sizeof(FPW)/2);
  151. /* set up sector start address table (top boot sector type) */
  152. for (i = 0; i < info->sector_count - 3; i++)
  153. info->start[i] = base + (i * sect_size);
  154. i = info->sector_count - 1;
  155. info->start[i--] = base + (info->size - 0x00004000) * (sizeof(FPW)/2);
  156. info->start[i--] = base + (info->size - 0x00006000) * (sizeof(FPW)/2);
  157. info->start[i--] = base + (info->size - 0x00008000) * (sizeof(FPW)/2);
  158. }
  159. }
  160. /*-----------------------------------------------------------------------
  161. */
  162. void flash_print_info (flash_info_t *info)
  163. {
  164. int i;
  165. uchar *boottype;
  166. uchar *bootletter;
  167. char *fmt;
  168. uchar botbootletter[] = "B";
  169. uchar topbootletter[] = "T";
  170. uchar botboottype[] = "bottom boot sector";
  171. uchar topboottype[] = "top boot sector";
  172. if (info->flash_id == FLASH_UNKNOWN) {
  173. printf ("missing or unknown FLASH type\n");
  174. return;
  175. }
  176. switch (info->flash_id & FLASH_VENDMASK) {
  177. case FLASH_MAN_AMD: printf ("AMD "); break;
  178. case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
  179. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  180. case FLASH_MAN_SST: printf ("SST "); break;
  181. case FLASH_MAN_STM: printf ("STM "); break;
  182. case FLASH_MAN_INTEL: printf ("INTEL "); break;
  183. default: printf ("Unknown Vendor "); break;
  184. }
  185. /* check for top or bottom boot, if it applies */
  186. if (info->flash_id & FLASH_BTYPE) {
  187. boottype = botboottype;
  188. bootletter = botbootletter;
  189. }
  190. else {
  191. boottype = topboottype;
  192. bootletter = topbootletter;
  193. }
  194. switch (info->flash_id & FLASH_TYPEMASK) {
  195. case FLASH_AM800T:
  196. fmt = "29LV800B%s (8 Mbit, %s)\n";
  197. break;
  198. case FLASH_AM640U:
  199. fmt = "29LV641D (64 Mbit, uniform sectors)\n";
  200. break;
  201. case FLASH_28F800C3B:
  202. case FLASH_28F800C3T:
  203. fmt = "28F800C3%s (8 Mbit, %s)\n";
  204. break;
  205. case FLASH_INTEL800B:
  206. case FLASH_INTEL800T:
  207. fmt = "28F800B3%s (8 Mbit, %s)\n";
  208. break;
  209. case FLASH_28F160C3B:
  210. case FLASH_28F160C3T:
  211. fmt = "28F160C3%s (16 Mbit, %s)\n";
  212. break;
  213. case FLASH_INTEL160B:
  214. case FLASH_INTEL160T:
  215. fmt = "28F160B3%s (16 Mbit, %s)\n";
  216. break;
  217. case FLASH_28F320C3B:
  218. case FLASH_28F320C3T:
  219. fmt = "28F320C3%s (32 Mbit, %s)\n";
  220. break;
  221. case FLASH_INTEL320B:
  222. case FLASH_INTEL320T:
  223. fmt = "28F320B3%s (32 Mbit, %s)\n";
  224. break;
  225. case FLASH_28F640C3B:
  226. case FLASH_28F640C3T:
  227. fmt = "28F640C3%s (64 Mbit, %s)\n";
  228. break;
  229. case FLASH_INTEL640B:
  230. case FLASH_INTEL640T:
  231. fmt = "28F640B3%s (64 Mbit, %s)\n";
  232. break;
  233. default:
  234. fmt = "Unknown Chip Type\n";
  235. break;
  236. }
  237. printf (fmt, bootletter, boottype);
  238. printf (" Size: %ld MB in %d Sectors\n",
  239. info->size >> 20,
  240. info->sector_count);
  241. printf (" Sector Start Addresses:");
  242. for (i=0; i<info->sector_count; ++i) {
  243. if ((i % 5) == 0) {
  244. printf ("\n ");
  245. }
  246. printf (" %08lX%s", info->start[i],
  247. info->protect[i] ? " (RO)" : " ");
  248. }
  249. printf ("\n");
  250. }
  251. /*-----------------------------------------------------------------------
  252. */
  253. /*
  254. * The following code cannot be run from FLASH!
  255. */
  256. ulong flash_get_size (FPWV *addr, flash_info_t *info)
  257. {
  258. /* Write auto select command: read Manufacturer ID */
  259. /* Write auto select command sequence and test FLASH answer */
  260. addr[0x0555] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
  261. addr[0x02AA] = (FPW)0x00550055; /* for AMD, Intel ignores this */
  262. addr[0x0555] = (FPW)0x00900090; /* selects Intel or AMD */
  263. /* The manufacturer codes are only 1 byte, so just use 1 byte.
  264. * This works for any bus width and any FLASH device width.
  265. */
  266. switch (addr[0] & 0xff) {
  267. case (uchar)AMD_MANUFACT:
  268. info->flash_id = FLASH_MAN_AMD;
  269. break;
  270. case (uchar)INTEL_MANUFACT:
  271. info->flash_id = FLASH_MAN_INTEL;
  272. break;
  273. default:
  274. info->flash_id = FLASH_UNKNOWN;
  275. info->sector_count = 0;
  276. info->size = 0;
  277. break;
  278. }
  279. /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
  280. if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
  281. case (FPW)AMD_ID_LV800T:
  282. info->flash_id += FLASH_AM800T;
  283. info->sector_count = 19;
  284. info->size = 0x00100000 * (sizeof(FPW)/2);
  285. break; /* => 1 or 2 MiB */
  286. case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
  287. info->flash_id += FLASH_AM640U;
  288. info->sector_count = 128;
  289. info->size = 0x00800000 * (sizeof(FPW)/2);
  290. break; /* => 8 or 16 MB */
  291. case (FPW)INTEL_ID_28F800C3B:
  292. info->flash_id += FLASH_28F800C3B;
  293. info->sector_count = 23;
  294. info->size = 0x00100000 * (sizeof(FPW)/2);
  295. break; /* => 1 or 2 MB */
  296. case (FPW)INTEL_ID_28F800B3B:
  297. info->flash_id += FLASH_INTEL800B;
  298. info->sector_count = 23;
  299. info->size = 0x00100000 * (sizeof(FPW)/2);
  300. break; /* => 1 or 2 MB */
  301. case (FPW)INTEL_ID_28F160C3B:
  302. info->flash_id += FLASH_28F160C3B;
  303. info->sector_count = 39;
  304. info->size = 0x00200000 * (sizeof(FPW)/2);
  305. break; /* => 2 or 4 MB */
  306. case (FPW)INTEL_ID_28F160B3B:
  307. info->flash_id += FLASH_INTEL160B;
  308. info->sector_count = 39;
  309. info->size = 0x00200000 * (sizeof(FPW)/2);
  310. break; /* => 2 or 4 MB */
  311. case (FPW)INTEL_ID_28F320C3B:
  312. info->flash_id += FLASH_28F320C3B;
  313. info->sector_count = 71;
  314. info->size = 0x00400000 * (sizeof(FPW)/2);
  315. break; /* => 4 or 8 MB */
  316. case (FPW)INTEL_ID_28F320B3B:
  317. info->flash_id += FLASH_INTEL320B;
  318. info->sector_count = 71;
  319. info->size = 0x00400000 * (sizeof(FPW)/2);
  320. break; /* => 4 or 8 MB */
  321. case (FPW)INTEL_ID_28F640C3B:
  322. info->flash_id += FLASH_28F640C3B;
  323. info->sector_count = 135;
  324. info->size = 0x00800000 * (sizeof(FPW)/2);
  325. break; /* => 8 or 16 MB */
  326. case (FPW)INTEL_ID_28F640B3B:
  327. info->flash_id += FLASH_INTEL640B;
  328. info->sector_count = 135;
  329. info->size = 0x00800000 * (sizeof(FPW)/2);
  330. break; /* => 8 or 16 MB */
  331. default:
  332. info->flash_id = FLASH_UNKNOWN;
  333. info->sector_count = 0;
  334. info->size = 0;
  335. return (0); /* => no or unknown flash */
  336. }
  337. flash_get_offsets((ulong)addr, info);
  338. /* Put FLASH back in read mode */
  339. flash_reset(info);
  340. return (info->size);
  341. }
  342. #ifdef CONFIG_SYS_FLASH_PROTECTION
  343. /*-----------------------------------------------------------------------
  344. */
  345. static void flash_sync_real_protect(flash_info_t *info)
  346. {
  347. FPWV *addr = (FPWV *)(info->start[0]);
  348. FPWV *sect;
  349. int i;
  350. switch (info->flash_id & FLASH_TYPEMASK) {
  351. case FLASH_28F800C3B:
  352. case FLASH_28F800C3T:
  353. case FLASH_28F160C3B:
  354. case FLASH_28F160C3T:
  355. case FLASH_28F320C3B:
  356. case FLASH_28F320C3T:
  357. case FLASH_28F640C3B:
  358. case FLASH_28F640C3T:
  359. /* check for protected sectors */
  360. *addr = (FPW)0x00900090;
  361. for (i = 0; i < info->sector_count; i++) {
  362. /* read sector protection at sector address, (A7 .. A0) = 0x02.
  363. * D0 = 1 for each device if protected.
  364. * If at least one device is protected the sector is marked
  365. * protected, but mixed protected and unprotected devices
  366. * within a sector should never happen.
  367. */
  368. sect = (FPWV *)(info->start[i]);
  369. info->protect[i] = (sect[2] & (FPW)(0x00010001)) ? 1 : 0;
  370. }
  371. /* Put FLASH back in read mode */
  372. flash_reset(info);
  373. break;
  374. case FLASH_AM640U:
  375. case FLASH_AM800T:
  376. default:
  377. /* no hardware protect that we support */
  378. break;
  379. }
  380. }
  381. #endif
  382. /*-----------------------------------------------------------------------
  383. */
  384. int flash_erase (flash_info_t *info, int s_first, int s_last)
  385. {
  386. FPWV *addr;
  387. int flag, prot, sect;
  388. int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
  389. ulong start, now, last;
  390. int rcode = 0;
  391. if ((s_first < 0) || (s_first > s_last)) {
  392. if (info->flash_id == FLASH_UNKNOWN) {
  393. printf ("- missing\n");
  394. } else {
  395. printf ("- no sectors to erase\n");
  396. }
  397. return 1;
  398. }
  399. switch (info->flash_id & FLASH_TYPEMASK) {
  400. case FLASH_INTEL800B:
  401. case FLASH_INTEL160B:
  402. case FLASH_INTEL320B:
  403. case FLASH_INTEL640B:
  404. case FLASH_28F800C3B:
  405. case FLASH_28F160C3B:
  406. case FLASH_28F320C3B:
  407. case FLASH_28F640C3B:
  408. case FLASH_AM640U:
  409. case FLASH_AM800T:
  410. break;
  411. case FLASH_UNKNOWN:
  412. default:
  413. printf ("Can't erase unknown flash type %08lx - aborted\n",
  414. info->flash_id);
  415. return 1;
  416. }
  417. prot = 0;
  418. for (sect=s_first; sect<=s_last; ++sect) {
  419. if (info->protect[sect]) {
  420. prot++;
  421. }
  422. }
  423. if (prot) {
  424. printf ("- Warning: %d protected sectors will not be erased!\n",
  425. prot);
  426. } else {
  427. printf ("\n");
  428. }
  429. start = get_timer(0);
  430. last = start;
  431. /* Start erase on unprotected sectors */
  432. for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
  433. if (info->protect[sect] != 0) /* protected, skip it */
  434. continue;
  435. /* Disable interrupts which might cause a timeout here */
  436. flag = disable_interrupts();
  437. addr = (FPWV *)(info->start[sect]);
  438. if (intel) {
  439. *addr = (FPW)0x00500050; /* clear status register */
  440. *addr = (FPW)0x00200020; /* erase setup */
  441. *addr = (FPW)0x00D000D0; /* erase confirm */
  442. }
  443. else {
  444. /* must be AMD style if not Intel */
  445. FPWV *base; /* first address in bank */
  446. base = (FPWV *)(info->start[0]);
  447. base[0x0555] = (FPW)0x00AA00AA; /* unlock */
  448. base[0x02AA] = (FPW)0x00550055; /* unlock */
  449. base[0x0555] = (FPW)0x00800080; /* erase mode */
  450. base[0x0555] = (FPW)0x00AA00AA; /* unlock */
  451. base[0x02AA] = (FPW)0x00550055; /* unlock */
  452. *addr = (FPW)0x00300030; /* erase sector */
  453. }
  454. /* re-enable interrupts if necessary */
  455. if (flag)
  456. enable_interrupts();
  457. /* wait at least 50us for AMD, 80us for Intel.
  458. * Let's wait 1 ms.
  459. */
  460. udelay (1000);
  461. while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
  462. if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  463. printf ("Timeout\n");
  464. if (intel) {
  465. /* suspend erase */
  466. *addr = (FPW)0x00B000B0;
  467. }
  468. flash_reset(info); /* reset to read mode */
  469. rcode = 1; /* failed */
  470. break;
  471. }
  472. /* show that we're waiting */
  473. if ((now - last) > 1000) { /* every second */
  474. putc ('.');
  475. last = now;
  476. }
  477. }
  478. flash_reset(info); /* reset to read mode */
  479. }
  480. printf (" done\n");
  481. return rcode;
  482. }
  483. /*-----------------------------------------------------------------------
  484. * Copy memory to flash, returns:
  485. * 0 - OK
  486. * 1 - write timeout
  487. * 2 - Flash not erased
  488. */
  489. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  490. {
  491. FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
  492. int bytes; /* number of bytes to program in current word */
  493. int left; /* number of bytes left to program */
  494. int i, res;
  495. for (left = cnt, res = 0;
  496. left > 0 && res == 0;
  497. addr += sizeof(data), left -= sizeof(data) - bytes) {
  498. bytes = addr & (sizeof(data) - 1);
  499. addr &= ~(sizeof(data) - 1);
  500. /* combine source and destination data so can program
  501. * an entire word of 16 or 32 bits
  502. */
  503. for (i = 0; i < sizeof(data); i++) {
  504. data <<= 8;
  505. if (i < bytes || i - bytes >= left )
  506. data += *((uchar *)addr + i);
  507. else
  508. data += *src++;
  509. }
  510. /* write one word to the flash */
  511. switch (info->flash_id & FLASH_VENDMASK) {
  512. case FLASH_MAN_AMD:
  513. res = write_word_amd(info, (FPWV *)addr, data);
  514. break;
  515. case FLASH_MAN_INTEL:
  516. res = write_word_intel(info, (FPWV *)addr, data);
  517. break;
  518. default:
  519. /* unknown flash type, error! */
  520. printf ("missing or unknown FLASH type\n");
  521. res = 1; /* not really a timeout, but gives error */
  522. break;
  523. }
  524. }
  525. return (res);
  526. }
  527. /*-----------------------------------------------------------------------
  528. * Write a word to Flash for AMD FLASH
  529. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  530. * (not an individual chip) is.
  531. *
  532. * returns:
  533. * 0 - OK
  534. * 1 - write timeout
  535. * 2 - Flash not erased
  536. */
  537. static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
  538. {
  539. ulong start;
  540. int flag;
  541. int res = 0; /* result, assume success */
  542. FPWV *base; /* first address in flash bank */
  543. /* Check if Flash is (sufficiently) erased */
  544. if ((*dest & data) != data) {
  545. return (2);
  546. }
  547. base = (FPWV *)(info->start[0]);
  548. /* Disable interrupts which might cause a timeout here */
  549. flag = disable_interrupts();
  550. base[0x0555] = (FPW)0x00AA00AA; /* unlock */
  551. base[0x02AA] = (FPW)0x00550055; /* unlock */
  552. base[0x0555] = (FPW)0x00A000A0; /* selects program mode */
  553. *dest = data; /* start programming the data */
  554. /* re-enable interrupts if necessary */
  555. if (flag)
  556. enable_interrupts();
  557. start = get_timer (0);
  558. /* data polling for D7 */
  559. while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
  560. if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
  561. *dest = (FPW)0x00F000F0; /* reset bank */
  562. res = 1;
  563. }
  564. }
  565. return (res);
  566. }
  567. /*-----------------------------------------------------------------------
  568. * Write a word to Flash for Intel FLASH
  569. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  570. * (not an individual chip) is.
  571. *
  572. * returns:
  573. * 0 - OK
  574. * 1 - write timeout
  575. * 2 - Flash not erased
  576. */
  577. static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
  578. {
  579. ulong start;
  580. int flag;
  581. int res = 0; /* result, assume success */
  582. /* Check if Flash is (sufficiently) erased */
  583. if ((*dest & data) != data) {
  584. return (2);
  585. }
  586. /* Disable interrupts which might cause a timeout here */
  587. flag = disable_interrupts();
  588. *dest = (FPW)0x00500050; /* clear status register */
  589. *dest = (FPW)0x00FF00FF; /* make sure in read mode */
  590. *dest = (FPW)0x00400040; /* program setup */
  591. *dest = data; /* start programming the data */
  592. /* re-enable interrupts if necessary */
  593. if (flag)
  594. enable_interrupts();
  595. start = get_timer (0);
  596. while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
  597. if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
  598. *dest = (FPW)0x00B000B0; /* Suspend program */
  599. res = 1;
  600. }
  601. }
  602. if (res == 0 && (*dest & (FPW)0x00100010))
  603. res = 1; /* write failed, time out error is close enough */
  604. *dest = (FPW)0x00500050; /* clear status register */
  605. *dest = (FPW)0x00FF00FF; /* make sure in read mode */
  606. return (res);
  607. }
  608. #ifdef CONFIG_SYS_FLASH_PROTECTION
  609. /*-----------------------------------------------------------------------
  610. */
  611. int flash_real_protect (flash_info_t * info, long sector, int prot)
  612. {
  613. int rcode = 0; /* assume success */
  614. FPWV *addr; /* address of sector */
  615. FPW value;
  616. addr = (FPWV *) (info->start[sector]);
  617. switch (info->flash_id & FLASH_TYPEMASK) {
  618. case FLASH_28F800C3B:
  619. case FLASH_28F800C3T:
  620. case FLASH_28F160C3B:
  621. case FLASH_28F160C3T:
  622. case FLASH_28F320C3B:
  623. case FLASH_28F320C3T:
  624. case FLASH_28F640C3B:
  625. case FLASH_28F640C3T:
  626. flash_reset (info); /* make sure in read mode */
  627. *addr = (FPW) 0x00600060L; /* lock command setup */
  628. if (prot)
  629. *addr = (FPW) 0x00010001L; /* lock sector */
  630. else
  631. *addr = (FPW) 0x00D000D0L; /* unlock sector */
  632. flash_reset (info); /* reset to read mode */
  633. /* now see if it really is locked/unlocked as requested */
  634. *addr = (FPW) 0x00900090;
  635. /* read sector protection at sector address, (A7 .. A0) = 0x02.
  636. * D0 = 1 for each device if protected.
  637. * If at least one device is protected the sector is marked
  638. * protected, but return failure. Mixed protected and
  639. * unprotected devices within a sector should never happen.
  640. */
  641. value = addr[2] & (FPW) 0x00010001;
  642. if (value == 0)
  643. info->protect[sector] = 0;
  644. else if (value == (FPW) 0x00010001)
  645. info->protect[sector] = 1;
  646. else {
  647. /* error, mixed protected and unprotected */
  648. rcode = 1;
  649. info->protect[sector] = 1;
  650. }
  651. if (info->protect[sector] != prot)
  652. rcode = 1; /* failed to protect/unprotect as requested */
  653. /* reload all protection bits from hardware for now */
  654. flash_sync_real_protect (info);
  655. break;
  656. case FLASH_AM640U:
  657. case FLASH_AM800T:
  658. default:
  659. /* no hardware protect that we support */
  660. info->protect[sector] = prot;
  661. break;
  662. }
  663. return rcode;
  664. }
  665. #endif