flash.c 21 KB

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  1. /*
  2. * (C) Copyright 2000
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <mpc8xx.h>
  25. /* environment.h defines the various CONFIG_ENV_... values in terms
  26. * of whichever ones are given in the configuration file.
  27. */
  28. #include <environment.h>
  29. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
  30. /* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
  31. * has nothing to do with the flash chip being 8-bit or 16-bit.
  32. */
  33. #ifdef CONFIG_FLASH_16BIT
  34. typedef unsigned short FLASH_PORT_WIDTH;
  35. typedef volatile unsigned short FLASH_PORT_WIDTHV;
  36. #define FLASH_ID_MASK 0xFFFF
  37. #else
  38. typedef unsigned long FLASH_PORT_WIDTH;
  39. typedef volatile unsigned long FLASH_PORT_WIDTHV;
  40. #define FLASH_ID_MASK 0xFFFFFFFF
  41. #endif
  42. #define FPW FLASH_PORT_WIDTH
  43. #define FPWV FLASH_PORT_WIDTHV
  44. #define ORMASK(size) ((-size) & OR_AM_MSK)
  45. /*-----------------------------------------------------------------------
  46. * Functions
  47. */
  48. static ulong flash_get_size (FPWV * addr, flash_info_t * info);
  49. static void flash_reset (flash_info_t * info);
  50. static int write_word_intel (flash_info_t * info, FPWV * dest, FPW data);
  51. static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data);
  52. static void flash_get_offsets (ulong base, flash_info_t * info);
  53. #ifdef CONFIG_SYS_FLASH_PROTECTION
  54. static void flash_sync_real_protect (flash_info_t * info);
  55. #endif
  56. /*-----------------------------------------------------------------------
  57. * flash_init()
  58. *
  59. * sets up flash_info and returns size of FLASH (bytes)
  60. */
  61. unsigned long flash_init (void)
  62. {
  63. unsigned long size_b;
  64. int i;
  65. /* Init: no FLASHes known */
  66. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  67. flash_info[i].flash_id = FLASH_UNKNOWN;
  68. }
  69. size_b = flash_get_size ((FPW *) CONFIG_SYS_FLASH_BASE, &flash_info[0]);
  70. flash_info[0].size = size_b;
  71. if (flash_info[0].flash_id == FLASH_UNKNOWN) {
  72. printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx\n",
  73. size_b);
  74. }
  75. /* Do this again (was done already in flast_get_size), just
  76. * in case we move it when remap the FLASH.
  77. */
  78. flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
  79. #ifdef CONFIG_SYS_FLASH_PROTECTION
  80. /* read the hardware protection status (if any) into the
  81. * protection array in flash_info.
  82. */
  83. flash_sync_real_protect (&flash_info[0]);
  84. #endif
  85. #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
  86. /* monitor protection ON by default */
  87. flash_protect (FLAG_PROTECT_SET,
  88. CONFIG_SYS_MONITOR_BASE,
  89. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  90. &flash_info[0]);
  91. #endif
  92. #ifdef CONFIG_ENV_ADDR
  93. flash_protect (FLAG_PROTECT_SET,
  94. CONFIG_ENV_ADDR,
  95. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]);
  96. #endif
  97. #ifdef CONFIG_ENV_ADDR_REDUND
  98. flash_protect (FLAG_PROTECT_SET,
  99. CONFIG_ENV_ADDR_REDUND,
  100. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  101. &flash_info[0]);
  102. #endif
  103. return (size_b);
  104. }
  105. /*-----------------------------------------------------------------------
  106. */
  107. static void flash_reset (flash_info_t * info)
  108. {
  109. FPWV *base = (FPWV *) (info->start[0]);
  110. /* Put FLASH back in read mode */
  111. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  112. *base = (FPW) 0x00FF00FF; /* Intel Read Mode */
  113. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
  114. *base = (FPW) 0x00F000F0; /* AMD Read Mode */
  115. }
  116. /*-----------------------------------------------------------------------
  117. */
  118. static void flash_get_offsets (ulong base, flash_info_t * info)
  119. {
  120. int i;
  121. /* set up sector start address table */
  122. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
  123. && (info->flash_id & FLASH_BTYPE)) {
  124. int bootsect_size; /* number of bytes/boot sector */
  125. int sect_size; /* number of bytes/regular sector */
  126. bootsect_size = 0x00002000 * (sizeof (FPW) / 2);
  127. sect_size = 0x00010000 * (sizeof (FPW) / 2);
  128. /* set sector offsets for bottom boot block type */
  129. for (i = 0; i < 8; ++i) {
  130. info->start[i] = base + (i * bootsect_size);
  131. }
  132. for (i = 8; i < info->sector_count; i++) {
  133. info->start[i] = base + ((i - 7) * sect_size);
  134. }
  135. } else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
  136. && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
  137. int sect_size; /* number of bytes/sector */
  138. sect_size = 0x00010000 * (sizeof (FPW) / 2);
  139. /* set up sector start address table (uniform sector type) */
  140. for (i = 0; i < info->sector_count; i++)
  141. info->start[i] = base + (i * sect_size);
  142. } else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
  143. && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM800T) {
  144. int sect_size; /* number of bytes/sector */
  145. sect_size = 0x00010000 * (sizeof (FPW) / 2);
  146. /* set up sector start address table (top boot sector type) */
  147. for (i = 0; i < info->sector_count - 3; i++)
  148. info->start[i] = base + (i * sect_size);
  149. i = info->sector_count - 1;
  150. info->start[i--] =
  151. base + (info->size - 0x00004000) * (sizeof (FPW) / 2);
  152. info->start[i--] =
  153. base + (info->size - 0x00006000) * (sizeof (FPW) / 2);
  154. info->start[i--] =
  155. base + (info->size - 0x00008000) * (sizeof (FPW) / 2);
  156. }
  157. }
  158. /*-----------------------------------------------------------------------
  159. */
  160. void flash_print_info (flash_info_t * info)
  161. {
  162. int i;
  163. uchar *boottype;
  164. uchar *bootletter;
  165. char *fmt;
  166. uchar botbootletter[] = "B";
  167. uchar topbootletter[] = "T";
  168. uchar botboottype[] = "bottom boot sector";
  169. uchar topboottype[] = "top boot sector";
  170. if (info->flash_id == FLASH_UNKNOWN) {
  171. printf ("missing or unknown FLASH type\n");
  172. return;
  173. }
  174. switch (info->flash_id & FLASH_VENDMASK) {
  175. case FLASH_MAN_AMD:
  176. printf ("AMD ");
  177. break;
  178. case FLASH_MAN_BM:
  179. printf ("BRIGHT MICRO ");
  180. break;
  181. case FLASH_MAN_FUJ:
  182. printf ("FUJITSU ");
  183. break;
  184. case FLASH_MAN_SST:
  185. printf ("SST ");
  186. break;
  187. case FLASH_MAN_STM:
  188. printf ("STM ");
  189. break;
  190. case FLASH_MAN_INTEL:
  191. printf ("INTEL ");
  192. break;
  193. default:
  194. printf ("Unknown Vendor ");
  195. break;
  196. }
  197. /* check for top or bottom boot, if it applies */
  198. if (info->flash_id & FLASH_BTYPE) {
  199. boottype = botboottype;
  200. bootletter = botbootletter;
  201. } else {
  202. boottype = topboottype;
  203. bootletter = topbootletter;
  204. }
  205. switch (info->flash_id & FLASH_TYPEMASK) {
  206. case FLASH_AM800T:
  207. fmt = "29LV800B%s (8 Mbit, %s)\n";
  208. break;
  209. case FLASH_AM640U:
  210. fmt = "29LV641D (64 Mbit, uniform sectors)\n";
  211. break;
  212. case FLASH_28F800C3B:
  213. case FLASH_28F800C3T:
  214. fmt = "28F800C3%s (8 Mbit, %s)\n";
  215. break;
  216. case FLASH_INTEL800B:
  217. case FLASH_INTEL800T:
  218. fmt = "28F800B3%s (8 Mbit, %s)\n";
  219. break;
  220. case FLASH_28F160C3B:
  221. case FLASH_28F160C3T:
  222. fmt = "28F160C3%s (16 Mbit, %s)\n";
  223. break;
  224. case FLASH_INTEL160B:
  225. case FLASH_INTEL160T:
  226. fmt = "28F160B3%s (16 Mbit, %s)\n";
  227. break;
  228. case FLASH_28F320C3B:
  229. case FLASH_28F320C3T:
  230. fmt = "28F320C3%s (32 Mbit, %s)\n";
  231. break;
  232. case FLASH_INTEL320B:
  233. case FLASH_INTEL320T:
  234. fmt = "28F320B3%s (32 Mbit, %s)\n";
  235. break;
  236. case FLASH_28F640C3B:
  237. case FLASH_28F640C3T:
  238. fmt = "28F640C3%s (64 Mbit, %s)\n";
  239. break;
  240. case FLASH_INTEL640B:
  241. case FLASH_INTEL640T:
  242. fmt = "28F640B3%s (64 Mbit, %s)\n";
  243. break;
  244. default:
  245. fmt = "Unknown Chip Type\n";
  246. break;
  247. }
  248. printf (fmt, bootletter, boottype);
  249. printf (" Size: %ld MB in %d Sectors\n",
  250. info->size >> 20, info->sector_count);
  251. printf (" Sector Start Addresses:");
  252. for (i = 0; i < info->sector_count; ++i) {
  253. if ((i % 5) == 0) {
  254. printf ("\n ");
  255. }
  256. printf (" %08lX%s", info->start[i],
  257. info->protect[i] ? " (RO)" : " ");
  258. }
  259. printf ("\n");
  260. }
  261. /*-----------------------------------------------------------------------
  262. */
  263. /*
  264. * The following code cannot be run from FLASH!
  265. */
  266. ulong flash_get_size (FPWV * addr, flash_info_t * info)
  267. {
  268. /* Write auto select command: read Manufacturer ID */
  269. /* Write auto select command sequence and test FLASH answer */
  270. addr[0x0555] = (FPW) 0x00AA00AA; /* for AMD, Intel ignores this */
  271. addr[0x02AA] = (FPW) 0x00550055; /* for AMD, Intel ignores this */
  272. addr[0x0555] = (FPW) 0x00900090; /* selects Intel or AMD */
  273. /* The manufacturer codes are only 1 byte, so just use 1 byte.
  274. * This works for any bus width and any FLASH device width.
  275. */
  276. switch (addr[0] & 0xff) {
  277. case (uchar) AMD_MANUFACT:
  278. info->flash_id = FLASH_MAN_AMD;
  279. break;
  280. case (uchar) INTEL_MANUFACT:
  281. info->flash_id = FLASH_MAN_INTEL;
  282. break;
  283. default:
  284. info->flash_id = FLASH_UNKNOWN;
  285. info->sector_count = 0;
  286. info->size = 0;
  287. break;
  288. }
  289. /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
  290. if (info->flash_id != FLASH_UNKNOWN)
  291. switch (addr[1]) {
  292. case (FPW) AMD_ID_LV800T:
  293. info->flash_id += FLASH_AM800T;
  294. info->sector_count = 19;
  295. info->size = 0x00100000 * (sizeof (FPW) / 2);
  296. break; /* => 1 or 2 MiB */
  297. case (FPW) AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
  298. info->flash_id += FLASH_AM640U;
  299. info->sector_count = 128;
  300. info->size = 0x00800000 * (sizeof (FPW) / 2);
  301. break; /* => 8 or 16 MB */
  302. case (FPW) INTEL_ID_28F800C3B:
  303. info->flash_id += FLASH_28F800C3B;
  304. info->sector_count = 23;
  305. info->size = 0x00100000 * (sizeof (FPW) / 2);
  306. break; /* => 1 or 2 MB */
  307. case (FPW) INTEL_ID_28F800B3B:
  308. info->flash_id += FLASH_INTEL800B;
  309. info->sector_count = 23;
  310. info->size = 0x00100000 * (sizeof (FPW) / 2);
  311. break; /* => 1 or 2 MB */
  312. case (FPW) INTEL_ID_28F160C3B:
  313. info->flash_id += FLASH_28F160C3B;
  314. info->sector_count = 39;
  315. info->size = 0x00200000 * (sizeof (FPW) / 2);
  316. break; /* => 2 or 4 MB */
  317. case (FPW) INTEL_ID_28F160B3B:
  318. info->flash_id += FLASH_INTEL160B;
  319. info->sector_count = 39;
  320. info->size = 0x00200000 * (sizeof (FPW) / 2);
  321. break; /* => 2 or 4 MB */
  322. case (FPW) INTEL_ID_28F320C3B:
  323. info->flash_id += FLASH_28F320C3B;
  324. info->sector_count = 71;
  325. info->size = 0x00400000 * (sizeof (FPW) / 2);
  326. break; /* => 4 or 8 MB */
  327. case (FPW) INTEL_ID_28F320B3B:
  328. info->flash_id += FLASH_INTEL320B;
  329. info->sector_count = 71;
  330. info->size = 0x00400000 * (sizeof (FPW) / 2);
  331. break; /* => 4 or 8 MB */
  332. case (FPW) INTEL_ID_28F640C3B:
  333. info->flash_id += FLASH_28F640C3B;
  334. info->sector_count = 135;
  335. info->size = 0x00800000 * (sizeof (FPW) / 2);
  336. break; /* => 8 or 16 MB */
  337. case (FPW) INTEL_ID_28F640B3B:
  338. info->flash_id += FLASH_INTEL640B;
  339. info->sector_count = 135;
  340. info->size = 0x00800000 * (sizeof (FPW) / 2);
  341. break; /* => 8 or 16 MB */
  342. default:
  343. info->flash_id = FLASH_UNKNOWN;
  344. info->sector_count = 0;
  345. info->size = 0;
  346. return (0); /* => no or unknown flash */
  347. }
  348. flash_get_offsets ((ulong) addr, info);
  349. /* Put FLASH back in read mode */
  350. flash_reset (info);
  351. return (info->size);
  352. }
  353. #ifdef CONFIG_SYS_FLASH_PROTECTION
  354. /*-----------------------------------------------------------------------
  355. */
  356. static void flash_sync_real_protect (flash_info_t * info)
  357. {
  358. FPWV *addr = (FPWV *) (info->start[0]);
  359. FPWV *sect;
  360. int i;
  361. switch (info->flash_id & FLASH_TYPEMASK) {
  362. case FLASH_28F800C3B:
  363. case FLASH_28F800C3T:
  364. case FLASH_28F160C3B:
  365. case FLASH_28F160C3T:
  366. case FLASH_28F320C3B:
  367. case FLASH_28F320C3T:
  368. case FLASH_28F640C3B:
  369. case FLASH_28F640C3T:
  370. /* check for protected sectors */
  371. *addr = (FPW) 0x00900090;
  372. for (i = 0; i < info->sector_count; i++) {
  373. /* read sector protection at sector address, (A7 .. A0) = 0x02.
  374. * D0 = 1 for each device if protected.
  375. * If at least one device is protected the sector is marked
  376. * protected, but mixed protected and unprotected devices
  377. * within a sector should never happen.
  378. */
  379. sect = (FPWV *) (info->start[i]);
  380. info->protect[i] =
  381. (sect[2] & (FPW) (0x00010001)) ? 1 : 0;
  382. }
  383. /* Put FLASH back in read mode */
  384. flash_reset (info);
  385. break;
  386. case FLASH_AM640U:
  387. case FLASH_AM800T:
  388. default:
  389. /* no hardware protect that we support */
  390. break;
  391. }
  392. }
  393. #endif
  394. /*-----------------------------------------------------------------------
  395. */
  396. int flash_erase (flash_info_t * info, int s_first, int s_last)
  397. {
  398. FPWV *addr;
  399. int flag, prot, sect;
  400. int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
  401. ulong now, last;
  402. int rcode = 0;
  403. if ((s_first < 0) || (s_first > s_last)) {
  404. if (info->flash_id == FLASH_UNKNOWN) {
  405. printf ("- missing\n");
  406. } else {
  407. printf ("- no sectors to erase\n");
  408. }
  409. return 1;
  410. }
  411. switch (info->flash_id & FLASH_TYPEMASK) {
  412. case FLASH_INTEL800B:
  413. case FLASH_INTEL160B:
  414. case FLASH_INTEL320B:
  415. case FLASH_INTEL640B:
  416. case FLASH_28F800C3B:
  417. case FLASH_28F160C3B:
  418. case FLASH_28F320C3B:
  419. case FLASH_28F640C3B:
  420. case FLASH_AM640U:
  421. case FLASH_AM800T:
  422. break;
  423. case FLASH_UNKNOWN:
  424. default:
  425. printf ("Can't erase unknown flash type %08lx - aborted\n",
  426. info->flash_id);
  427. return 1;
  428. }
  429. prot = 0;
  430. for (sect = s_first; sect <= s_last; ++sect) {
  431. if (info->protect[sect]) {
  432. prot++;
  433. }
  434. }
  435. if (prot) {
  436. printf ("- Warning: %d protected sectors will not be erased!\n", prot);
  437. } else {
  438. printf ("\n");
  439. }
  440. reset_timer_masked ();
  441. /* Start erase on unprotected sectors */
  442. for (sect = s_first; sect <= s_last && rcode == 0; sect++) {
  443. if (info->protect[sect] != 0) /* protected, skip it */
  444. continue;
  445. /* Disable interrupts which might cause a timeout here */
  446. flag = disable_interrupts ();
  447. reset_timer_masked ();
  448. last = 0;
  449. addr = (FPWV *) (info->start[sect]);
  450. if (intel) {
  451. *addr = (FPW) 0x00500050; /* clear status register */
  452. *addr = (FPW) 0x00200020; /* erase setup */
  453. *addr = (FPW) 0x00D000D0; /* erase confirm */
  454. } else {
  455. /* must be AMD style if not Intel */
  456. FPWV *base; /* first address in bank */
  457. base = (FPWV *) (info->start[0]);
  458. base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
  459. base[0x02AA] = (FPW) 0x00550055; /* unlock */
  460. base[0x0555] = (FPW) 0x00800080; /* erase mode */
  461. base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
  462. base[0x02AA] = (FPW) 0x00550055; /* unlock */
  463. *addr = (FPW) 0x00300030; /* erase sector */
  464. }
  465. /* re-enable interrupts if necessary */
  466. if (flag)
  467. enable_interrupts ();
  468. /* wait at least 50us for AMD, 80us for Intel.
  469. * Let's wait 1 ms.
  470. */
  471. udelay (1000);
  472. while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) {
  473. if ((now =
  474. get_timer_masked ()) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  475. printf ("Timeout\n");
  476. if (intel) {
  477. /* suspend erase */
  478. *addr = (FPW) 0x00B000B0;
  479. }
  480. flash_reset (info); /* reset to read mode */
  481. rcode = 1; /* failed */
  482. break;
  483. }
  484. /* show that we're waiting */
  485. if ((now - last) > 1 * CONFIG_SYS_HZ) { /* every second */
  486. putc ('.');
  487. last = now;
  488. }
  489. }
  490. flash_reset (info); /* reset to read mode */
  491. }
  492. printf (" done\n");
  493. return rcode;
  494. }
  495. /*-----------------------------------------------------------------------
  496. * Copy memory to flash, returns:
  497. * 0 - OK
  498. * 1 - write timeout
  499. * 2 - Flash not erased
  500. */
  501. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  502. {
  503. FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
  504. int bytes; /* number of bytes to program in current word */
  505. int left; /* number of bytes left to program */
  506. int i, res;
  507. for (left = cnt, res = 0;
  508. left > 0 && res == 0;
  509. addr += sizeof (data), left -= sizeof (data) - bytes) {
  510. bytes = addr & (sizeof (data) - 1);
  511. addr &= ~(sizeof (data) - 1);
  512. /* combine source and destination data so can program
  513. * an entire word of 16 or 32 bits
  514. */
  515. #ifdef CONFIG_SYS_LITTLE_ENDIAN
  516. for (i = 0; i < sizeof (data); i++) {
  517. data >>= 8;
  518. if (i < bytes || i - bytes >= left)
  519. data += (*((uchar *) addr + i)) << 24;
  520. else
  521. data += (*src++) << 24;
  522. }
  523. #else
  524. for (i = 0; i < sizeof (data); i++) {
  525. data <<= 8;
  526. if (i < bytes || i - bytes >= left)
  527. data += *((uchar *) addr + i);
  528. else
  529. data += *src++;
  530. }
  531. #endif
  532. /* write one word to the flash */
  533. switch (info->flash_id & FLASH_VENDMASK) {
  534. case FLASH_MAN_AMD:
  535. res = write_word_amd (info, (FPWV *) addr, data);
  536. break;
  537. case FLASH_MAN_INTEL:
  538. res = write_word_intel (info, (FPWV *) addr, data);
  539. break;
  540. default:
  541. /* unknown flash type, error! */
  542. printf ("missing or unknown FLASH type\n");
  543. res = 1; /* not really a timeout, but gives error */
  544. break;
  545. }
  546. }
  547. return (res);
  548. }
  549. /*-----------------------------------------------------------------------
  550. * Write a word to Flash for AMD FLASH
  551. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  552. * (not an individual chip) is.
  553. *
  554. * returns:
  555. * 0 - OK
  556. * 1 - write timeout
  557. * 2 - Flash not erased
  558. */
  559. static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data)
  560. {
  561. int flag;
  562. int res = 0; /* result, assume success */
  563. FPWV *base; /* first address in flash bank */
  564. /* Check if Flash is (sufficiently) erased */
  565. if ((*dest & data) != data) {
  566. return (2);
  567. }
  568. base = (FPWV *) (info->start[0]);
  569. /* Disable interrupts which might cause a timeout here */
  570. flag = disable_interrupts ();
  571. base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
  572. base[0x02AA] = (FPW) 0x00550055; /* unlock */
  573. base[0x0555] = (FPW) 0x00A000A0; /* selects program mode */
  574. *dest = data; /* start programming the data */
  575. /* re-enable interrupts if necessary */
  576. if (flag)
  577. enable_interrupts ();
  578. reset_timer_masked ();
  579. /* data polling for D7 */
  580. while (res == 0
  581. && (*dest & (FPW) 0x00800080) != (data & (FPW) 0x00800080)) {
  582. if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
  583. *dest = (FPW) 0x00F000F0; /* reset bank */
  584. res = 1;
  585. }
  586. }
  587. return (res);
  588. }
  589. /*-----------------------------------------------------------------------
  590. * Write a word to Flash for Intel FLASH
  591. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  592. * (not an individual chip) is.
  593. *
  594. * returns:
  595. * 0 - OK
  596. * 1 - write timeout
  597. * 2 - Flash not erased
  598. */
  599. static int write_word_intel (flash_info_t * info, FPWV * dest, FPW data)
  600. {
  601. int flag;
  602. int res = 0; /* result, assume success */
  603. /* Check if Flash is (sufficiently) erased */
  604. if ((*dest & data) != data) {
  605. return (2);
  606. }
  607. /* Disable interrupts which might cause a timeout here */
  608. flag = disable_interrupts ();
  609. *dest = (FPW) 0x00500050; /* clear status register */
  610. *dest = (FPW) 0x00FF00FF; /* make sure in read mode */
  611. *dest = (FPW) 0x00400040; /* program setup */
  612. *dest = data; /* start programming the data */
  613. /* re-enable interrupts if necessary */
  614. if (flag)
  615. enable_interrupts ();
  616. reset_timer_masked ();
  617. while (res == 0 && (*dest & (FPW) 0x00800080) != (FPW) 0x00800080) {
  618. if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
  619. *dest = (FPW) 0x00B000B0; /* Suspend program */
  620. res = 1;
  621. }
  622. }
  623. if (res == 0 && (*dest & (FPW) 0x00100010))
  624. res = 1; /* write failed, time out error is close enough */
  625. *dest = (FPW) 0x00500050; /* clear status register */
  626. *dest = (FPW) 0x00FF00FF; /* make sure in read mode */
  627. return (res);
  628. }
  629. #ifdef CONFIG_SYS_FLASH_PROTECTION
  630. /*-----------------------------------------------------------------------
  631. */
  632. int flash_real_protect (flash_info_t * info, long sector, int prot)
  633. {
  634. int rcode = 0; /* assume success */
  635. FPWV *addr; /* address of sector */
  636. FPW value;
  637. addr = (FPWV *) (info->start[sector]);
  638. switch (info->flash_id & FLASH_TYPEMASK) {
  639. case FLASH_28F800C3B:
  640. case FLASH_28F800C3T:
  641. case FLASH_28F160C3B:
  642. case FLASH_28F160C3T:
  643. case FLASH_28F320C3B:
  644. case FLASH_28F320C3T:
  645. case FLASH_28F640C3B:
  646. case FLASH_28F640C3T:
  647. flash_reset (info); /* make sure in read mode */
  648. *addr = (FPW) 0x00600060L; /* lock command setup */
  649. if (prot)
  650. *addr = (FPW) 0x00010001L; /* lock sector */
  651. else
  652. *addr = (FPW) 0x00D000D0L; /* unlock sector */
  653. flash_reset (info); /* reset to read mode */
  654. /* now see if it really is locked/unlocked as requested */
  655. *addr = (FPW) 0x00900090;
  656. /* read sector protection at sector address, (A7 .. A0) = 0x02.
  657. * D0 = 1 for each device if protected.
  658. * If at least one device is protected the sector is marked
  659. * protected, but return failure. Mixed protected and
  660. * unprotected devices within a sector should never happen.
  661. */
  662. value = addr[2] & (FPW) 0x00010001;
  663. if (value == 0)
  664. info->protect[sector] = 0;
  665. else if (value == (FPW) 0x00010001)
  666. info->protect[sector] = 1;
  667. else {
  668. /* error, mixed protected and unprotected */
  669. rcode = 1;
  670. info->protect[sector] = 1;
  671. }
  672. if (info->protect[sector] != prot)
  673. rcode = 1; /* failed to protect/unprotect as requested */
  674. /* reload all protection bits from hardware for now */
  675. flash_sync_real_protect (info);
  676. break;
  677. case FLASH_AM640U:
  678. case FLASH_AM800T:
  679. default:
  680. /* no hardware protect that we support */
  681. info->protect[sector] = prot;
  682. break;
  683. }
  684. return rcode;
  685. }
  686. #endif