tuxx1.h 4.3 KB

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  1. /*
  2. * Copyright (C) 2006 Freescale Semiconductor, Inc.
  3. * Dave Liu <daveliu@freescale.com>
  4. *
  5. * Copyright (C) 2007 Logic Product Development, Inc.
  6. * Peter Barada <peterb@logicpd.com>
  7. *
  8. * Copyright (C) 2007 MontaVista Software, Inc.
  9. * Anton Vorontsov <avorontsov@ru.mvista.com>
  10. *
  11. * (C) Copyright 2008
  12. * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  13. *
  14. * (C) Copyright 2010-2012
  15. * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
  16. * Holger Brunck, Keymile GmbH, holger.bruncl@keymile.com
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License as
  20. * published by the Free Software Foundation; either version 2 of
  21. * the License, or (at your option) any later version.
  22. */
  23. #ifndef __CONFIG_H
  24. #define __CONFIG_H
  25. /*
  26. * High Level Configuration Options
  27. */
  28. #ifdef CONFIG_KMSUPX5
  29. #define CONFIG_KM_BOARD_NAME "kmsupx5"
  30. #define CONFIG_HOSTNAME kmsupx5
  31. #elif defined CONFIG_TUGE1
  32. #define CONFIG_KM_BOARD_NAME "tuge1"
  33. #define CONFIG_HOSTNAME tuge1
  34. #else
  35. #define CONFIG_TUXXX /* TUXX1 board (tuxa1/tuda1) specific */
  36. #define CONFIG_KM_BOARD_NAME "tuxx1"
  37. #define CONFIG_HOSTNAME tuxx1
  38. #endif
  39. #define CONFIG_SYS_TEXT_BASE 0xF0000000
  40. /* include common defines/options for all 8321 Keymile boards */
  41. #include "km/km8321-common.h"
  42. #define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
  43. #define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
  44. #ifndef CONFIG_KM_DISABLE_APP2
  45. #define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */
  46. #define CONFIG_SYS_APP2_SIZE 256 /* Megabytes */
  47. #endif
  48. /*
  49. * Init Local Bus Memory Controller:
  50. *
  51. * Bank Bus Machine PortSz Size Device on TUDA1 TUXA1 TUGE1 KMSUPX4
  52. * ---- --- ------- ------ ----- ---------------------------------------
  53. * 2 Local GPCM 8 bit 256MB PAXG LPXF PAXI LPXF
  54. * 3 Local GPCM 8 bit 256MB PINC3 PINC2 unused unused
  55. *
  56. */
  57. /*
  58. * Configuration for C2 on the local bus
  59. */
  60. /* Window base at flash base */
  61. #define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
  62. /* Window size: 256 MB */
  63. #define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
  64. #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
  65. BR_PS_8 | \
  66. BR_MS_GPCM | \
  67. BR_V)
  68. #define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
  69. OR_GPCM_CSNT | \
  70. OR_GPCM_ACS_DIV4 | \
  71. OR_GPCM_SCY_2 | \
  72. OR_GPCM_TRLX_SET | \
  73. OR_GPCM_EHTR_CLEAR | \
  74. OR_GPCM_EAD)
  75. #ifndef CONFIG_KM_DISABLE_APP2
  76. /*
  77. * Configuration for C3 on the local bus
  78. */
  79. /* Access window base at PINC3 base */
  80. #define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
  81. /* Window size: 256 MB */
  82. #define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
  83. #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \
  84. BR_PS_8 | \
  85. BR_MS_GPCM | \
  86. BR_V)
  87. #define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
  88. OR_GPCM_CSNT | \
  89. OR_GPCM_ACS_DIV2 | \
  90. OR_GPCM_SCY_2 | \
  91. OR_GPCM_TRLX_SET | \
  92. OR_GPCM_EHTR_CLEAR)
  93. #define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
  94. 0x0000c000 | \
  95. MxMR_WLFx_2X)
  96. #endif
  97. /*
  98. * MMU Setup
  99. */
  100. /* APP1: icache cacheable, but dcache-inhibit and guarded */
  101. #define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | \
  102. BATL_PP_RW | \
  103. BATL_MEMCOHERENCE)
  104. /* 512M should also include APP2... */
  105. #define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | \
  106. BATU_BL_256M | \
  107. BATU_VS | \
  108. BATU_VP)
  109. #define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | \
  110. BATL_PP_RW | \
  111. BATL_CACHEINHIBIT | \
  112. BATL_GUARDEDSTORAGE)
  113. #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
  114. #ifdef CONFIG_KM_DISABLE_APP2
  115. #define CONFIG_SYS_IBAT6L (0)
  116. #define CONFIG_SYS_IBAT6U (0)
  117. #define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
  118. #else
  119. /* APP2: icache cacheable, but dcache-inhibit and guarded */
  120. #define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | \
  121. BATL_PP_RW | \
  122. BATL_MEMCOHERENCE)
  123. #define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | \
  124. BATU_BL_256M | \
  125. BATU_VS | \
  126. BATU_VP)
  127. #define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | \
  128. BATL_PP_RW | \
  129. BATL_CACHEINHIBIT | \
  130. BATL_GUARDEDSTORAGE)
  131. #endif
  132. #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
  133. #define CONFIG_SYS_IBAT7L (0)
  134. #define CONFIG_SYS_IBAT7U (0)
  135. #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
  136. #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
  137. #endif /* __CONFIG_H */