ne2000.c 26 KB

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  1. /*
  2. Ported to U-Boot by Christian Pellegrin <chri@ascensit.com>
  3. Based on sources from the Linux kernel (pcnet_cs.c, 8390.h) and
  4. eCOS(if_dp83902a.c, if_dp83902a.h). Both of these 2 wonderful world
  5. are GPL, so this is, of course, GPL.
  6. ==========================================================================
  7. dev/if_dp83902a.c
  8. Ethernet device driver for NS DP83902a ethernet controller
  9. ==========================================================================
  10. ####ECOSGPLCOPYRIGHTBEGIN####
  11. -------------------------------------------
  12. This file is part of eCos, the Embedded Configurable Operating System.
  13. Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  14. eCos is free software; you can redistribute it and/or modify it under
  15. the terms of the GNU General Public License as published by the Free
  16. Software Foundation; either version 2 or (at your option) any later version.
  17. eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  18. WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  20. for more details.
  21. You should have received a copy of the GNU General Public License along
  22. with eCos; if not, write to the Free Software Foundation, Inc.,
  23. 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  24. As a special exception, if other files instantiate templates or use macros
  25. or inline functions from this file, or you compile this file and link it
  26. with other works to produce a work based on this file, this file does not
  27. by itself cause the resulting work to be covered by the GNU General Public
  28. License. However the source code for this file must still be made available
  29. in accordance with section (3) of the GNU General Public License.
  30. This exception does not invalidate any other reasons why a work based on
  31. this file might be covered by the GNU General Public License.
  32. Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  33. at http://sources.redhat.com/ecos/ecos-license/
  34. -------------------------------------------
  35. ####ECOSGPLCOPYRIGHTEND####
  36. ####BSDCOPYRIGHTBEGIN####
  37. -------------------------------------------
  38. Portions of this software may have been derived from OpenBSD or other sources,
  39. and are covered by the appropriate copyright disclaimers included herein.
  40. -------------------------------------------
  41. ####BSDCOPYRIGHTEND####
  42. ==========================================================================
  43. #####DESCRIPTIONBEGIN####
  44. Author(s): gthomas
  45. Contributors: gthomas, jskov, rsandifo
  46. Date: 2001-06-13
  47. Purpose:
  48. Description:
  49. FIXME: Will fail if pinged with large packets (1520 bytes)
  50. Add promisc config
  51. Add SNMP
  52. ####DESCRIPTIONEND####
  53. ==========================================================================
  54. */
  55. #include <common.h>
  56. #include <command.h>
  57. #include <net.h>
  58. #include <malloc.h>
  59. #ifdef CONFIG_DRIVER_NE2000
  60. /* wor around udelay resetting OCR */
  61. static void my_udelay(long us) {
  62. long tmo;
  63. tmo = get_timer (0) + us * CFG_HZ / 1000000; /* will this be much greater than 0 ? */
  64. while (get_timer (0) < tmo);
  65. }
  66. #define mdelay(n) my_udelay((n)*1000)
  67. /* forward definition of function used for the uboot interface */
  68. void uboot_push_packet_len(int len);
  69. void uboot_push_tx_done(int key, int val);
  70. /* timeout for tx/rx in s */
  71. #define TOUT 5
  72. #define ETHER_ADDR_LEN 6
  73. /*
  74. ------------------------------------------------------------------------
  75. Debugging details
  76. Set to perms of:
  77. 0 disables all debug output
  78. 1 for process debug output
  79. 2 for added data IO output: get_reg, put_reg
  80. 4 for packet allocation/free output
  81. 8 for only startup status, so we can tell we're installed OK
  82. */
  83. /*#define DEBUG 0xf*/
  84. #define DEBUG 0
  85. #if DEBUG & 1
  86. #define DEBUG_FUNCTION() do { printf("%s\n", __FUNCTION__); } while (0)
  87. #define DEBUG_LINE() do { printf("%d\n", __LINE__); } while (0)
  88. #else
  89. #define DEBUG_FUNCTION() do {} while(0)
  90. #define DEBUG_LINE() do {} while(0)
  91. #endif
  92. #include "ne2000.h"
  93. #if DEBUG & 1
  94. #define PRINTK(args...) printf(args)
  95. #else
  96. #define PRINTK(args...)
  97. #endif
  98. static dp83902a_priv_data_t nic; /* just one instance of the card supported */
  99. static bool
  100. dp83902a_init(void)
  101. {
  102. dp83902a_priv_data_t *dp = &nic;
  103. cyg_uint8* base;
  104. int i;
  105. DEBUG_FUNCTION();
  106. base = dp->base;
  107. if (!base) return false; /* No device found */
  108. DEBUG_LINE();
  109. /* Prepare ESA */
  110. DP_OUT(base, DP_CR, DP_CR_NODMA | DP_CR_PAGE1); /* Select page 1 */
  111. /* Use the address from the serial EEPROM */
  112. for (i = 0; i < 6; i++)
  113. DP_IN(base, DP_P1_PAR0+i, dp->esa[i]);
  114. DP_OUT(base, DP_CR, DP_CR_NODMA | DP_CR_PAGE0); /* Select page 0 */
  115. printf("NE2000 - %s ESA: %02x:%02x:%02x:%02x:%02x:%02x\n",
  116. "eeprom",
  117. dp->esa[0],
  118. dp->esa[1],
  119. dp->esa[2],
  120. dp->esa[3],
  121. dp->esa[4],
  122. dp->esa[5] );
  123. return true;
  124. }
  125. static void
  126. dp83902a_stop(void)
  127. {
  128. dp83902a_priv_data_t *dp = &nic;
  129. cyg_uint8 *base = dp->base;
  130. DEBUG_FUNCTION();
  131. DP_OUT(base, DP_CR, DP_CR_PAGE0 | DP_CR_NODMA | DP_CR_STOP); /* Brutal */
  132. DP_OUT(base, DP_ISR, 0xFF); /* Clear any pending interrupts */
  133. DP_OUT(base, DP_IMR, 0x00); /* Disable all interrupts */
  134. dp->running = false;
  135. }
  136. /*
  137. This function is called to "start up" the interface. It may be called
  138. multiple times, even when the hardware is already running. It will be
  139. called whenever something "hardware oriented" changes and should leave
  140. the hardware ready to send/receive packets.
  141. */
  142. static void
  143. dp83902a_start(unsigned char * enaddr)
  144. {
  145. dp83902a_priv_data_t *dp = &nic;
  146. cyg_uint8 *base = dp->base;
  147. int i;
  148. DEBUG_FUNCTION();
  149. DP_OUT(base, DP_CR, DP_CR_PAGE0 | DP_CR_NODMA | DP_CR_STOP); /* Brutal */
  150. DP_OUT(base, DP_DCR, DP_DCR_INIT);
  151. DP_OUT(base, DP_RBCH, 0); /* Remote byte count */
  152. DP_OUT(base, DP_RBCL, 0);
  153. DP_OUT(base, DP_RCR, DP_RCR_MON); /* Accept no packets */
  154. DP_OUT(base, DP_TCR, DP_TCR_LOCAL); /* Transmitter [virtually] off */
  155. DP_OUT(base, DP_TPSR, dp->tx_buf1); /* Transmitter start page */
  156. dp->tx1 = dp->tx2 = 0;
  157. dp->tx_next = dp->tx_buf1;
  158. dp->tx_started = false;
  159. DP_OUT(base, DP_PSTART, dp->rx_buf_start); /* Receive ring start page */
  160. DP_OUT(base, DP_BNDRY, dp->rx_buf_end-1); /* Receive ring boundary */
  161. DP_OUT(base, DP_PSTOP, dp->rx_buf_end); /* Receive ring end page */
  162. dp->rx_next = dp->rx_buf_start-1;
  163. DP_OUT(base, DP_ISR, 0xFF); /* Clear any pending interrupts */
  164. DP_OUT(base, DP_IMR, DP_IMR_All); /* Enable all interrupts */
  165. DP_OUT(base, DP_CR, DP_CR_NODMA | DP_CR_PAGE1 | DP_CR_STOP); /* Select page 1 */
  166. DP_OUT(base, DP_P1_CURP, dp->rx_buf_start); /* Current page - next free page for Rx */
  167. for (i = 0; i < ETHER_ADDR_LEN; i++) {
  168. DP_OUT(base, DP_P1_PAR0+i, enaddr[i]);
  169. }
  170. /* Enable and start device */
  171. DP_OUT(base, DP_CR, DP_CR_PAGE0 | DP_CR_NODMA | DP_CR_START);
  172. DP_OUT(base, DP_TCR, DP_TCR_NORMAL); /* Normal transmit operations */
  173. DP_OUT(base, DP_RCR, DP_RCR_AB); /* Accept broadcast, no errors, no multicast */
  174. dp->running = true;
  175. }
  176. /*
  177. This routine is called to start the transmitter. It is split out from the
  178. data handling routine so it may be called either when data becomes first
  179. available or when an Tx interrupt occurs
  180. */
  181. static void
  182. dp83902a_start_xmit(int start_page, int len)
  183. {
  184. dp83902a_priv_data_t *dp = (dp83902a_priv_data_t *) &nic;
  185. cyg_uint8 *base = dp->base;
  186. DEBUG_FUNCTION();
  187. #if DEBUG & 1
  188. printf("Tx pkt %d len %d\n", start_page, len);
  189. if (dp->tx_started)
  190. printf("TX already started?!?\n");
  191. #endif
  192. DP_OUT(base, DP_ISR, (DP_ISR_TxP | DP_ISR_TxE));
  193. DP_OUT(base, DP_CR, DP_CR_PAGE0 | DP_CR_NODMA | DP_CR_START);
  194. DP_OUT(base, DP_TBCL, len & 0xFF);
  195. DP_OUT(base, DP_TBCH, len >> 8);
  196. DP_OUT(base, DP_TPSR, start_page);
  197. DP_OUT(base, DP_CR, DP_CR_NODMA | DP_CR_TXPKT | DP_CR_START);
  198. dp->tx_started = true;
  199. }
  200. /*
  201. This routine is called to send data to the hardware. It is known a-priori
  202. that there is free buffer space (dp->tx_next).
  203. */
  204. static void
  205. dp83902a_send(unsigned char *data, int total_len, unsigned long key)
  206. {
  207. struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
  208. cyg_uint8 *base = dp->base;
  209. int len, start_page, pkt_len, i, isr;
  210. #if DEBUG & 4
  211. int dx;
  212. #endif
  213. DEBUG_FUNCTION();
  214. len = pkt_len = total_len;
  215. if (pkt_len < IEEE_8023_MIN_FRAME) pkt_len = IEEE_8023_MIN_FRAME;
  216. start_page = dp->tx_next;
  217. if (dp->tx_next == dp->tx_buf1) {
  218. dp->tx1 = start_page;
  219. dp->tx1_len = pkt_len;
  220. dp->tx1_key = key;
  221. dp->tx_next = dp->tx_buf2;
  222. } else {
  223. dp->tx2 = start_page;
  224. dp->tx2_len = pkt_len;
  225. dp->tx2_key = key;
  226. dp->tx_next = dp->tx_buf1;
  227. }
  228. #if DEBUG & 5
  229. printf("TX prep page %d len %d\n", start_page, pkt_len);
  230. #endif
  231. DP_OUT(base, DP_ISR, DP_ISR_RDC); /* Clear end of DMA */
  232. {
  233. /* Dummy read. The manual sez something slightly different, */
  234. /* but the code is extended a bit to do what Hitachi's monitor */
  235. /* does (i.e., also read data). */
  236. cyg_uint16 tmp;
  237. int len = 1;
  238. DP_OUT(base, DP_RSAL, 0x100-len);
  239. DP_OUT(base, DP_RSAH, (start_page-1) & 0xff);
  240. DP_OUT(base, DP_RBCL, len);
  241. DP_OUT(base, DP_RBCH, 0);
  242. DP_OUT(base, DP_CR, DP_CR_PAGE0 | DP_CR_RDMA | DP_CR_START);
  243. DP_IN_DATA(dp->data, tmp);
  244. }
  245. #ifdef CYGHWR_NS_DP83902A_PLF_BROKEN_TX_DMA
  246. /* Stall for a bit before continuing to work around random data */
  247. /* corruption problems on some platforms. */
  248. CYGACC_CALL_IF_DELAY_US(1);
  249. #endif
  250. /* Send data to device buffer(s) */
  251. DP_OUT(base, DP_RSAL, 0);
  252. DP_OUT(base, DP_RSAH, start_page);
  253. DP_OUT(base, DP_RBCL, pkt_len & 0xFF);
  254. DP_OUT(base, DP_RBCH, pkt_len >> 8);
  255. DP_OUT(base, DP_CR, DP_CR_WDMA | DP_CR_START);
  256. /* Put data into buffer */
  257. #if DEBUG & 4
  258. printf(" sg buf %08lx len %08x\n ", (unsigned long) data, len);
  259. dx = 0;
  260. #endif
  261. while (len > 0) {
  262. #if DEBUG & 4
  263. printf(" %02x", *data);
  264. if (0 == (++dx % 16)) printf("\n ");
  265. #endif
  266. DP_OUT_DATA(dp->data, *data++);
  267. len--;
  268. }
  269. #if DEBUG & 4
  270. printf("\n");
  271. #endif
  272. if (total_len < pkt_len) {
  273. #if DEBUG & 4
  274. printf(" + %d bytes of padding\n", pkt_len - total_len);
  275. #endif
  276. /* Padding to 802.3 length was required */
  277. for (i = total_len; i < pkt_len;) {
  278. i++;
  279. DP_OUT_DATA(dp->data, 0);
  280. }
  281. }
  282. #ifdef CYGHWR_NS_DP83902A_PLF_BROKEN_TX_DMA
  283. /* After last data write, delay for a bit before accessing the */
  284. /* device again, or we may get random data corruption in the last */
  285. /* datum (on some platforms). */
  286. CYGACC_CALL_IF_DELAY_US(1);
  287. #endif
  288. /* Wait for DMA to complete */
  289. do {
  290. DP_IN(base, DP_ISR, isr);
  291. } while ((isr & DP_ISR_RDC) == 0);
  292. /* Then disable DMA */
  293. DP_OUT(base, DP_CR, DP_CR_PAGE0 | DP_CR_NODMA | DP_CR_START);
  294. /* Start transmit if not already going */
  295. if (!dp->tx_started) {
  296. if (start_page == dp->tx1) {
  297. dp->tx_int = 1; /* Expecting interrupt from BUF1 */
  298. } else {
  299. dp->tx_int = 2; /* Expecting interrupt from BUF2 */
  300. }
  301. dp83902a_start_xmit(start_page, pkt_len);
  302. }
  303. }
  304. /*
  305. This function is called when a packet has been received. It's job is
  306. to prepare to unload the packet from the hardware. Once the length of
  307. the packet is known, the upper layer of the driver can be told. When
  308. the upper layer is ready to unload the packet, the internal function
  309. 'dp83902a_recv' will be called to actually fetch it from the hardware.
  310. */
  311. static void
  312. dp83902a_RxEvent(void)
  313. {
  314. struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
  315. cyg_uint8 *base = dp->base;
  316. unsigned char rsr;
  317. unsigned char rcv_hdr[4];
  318. int i, len, pkt, cur;
  319. DEBUG_FUNCTION();
  320. DP_IN(base, DP_RSR, rsr);
  321. while (true) {
  322. /* Read incoming packet header */
  323. DP_OUT(base, DP_CR, DP_CR_PAGE1 | DP_CR_NODMA | DP_CR_START);
  324. DP_IN(base, DP_P1_CURP, cur);
  325. DP_OUT(base, DP_P1_CR, DP_CR_PAGE0 | DP_CR_NODMA | DP_CR_START);
  326. DP_IN(base, DP_BNDRY, pkt);
  327. pkt += 1;
  328. if (pkt == dp->rx_buf_end)
  329. pkt = dp->rx_buf_start;
  330. if (pkt == cur) {
  331. break;
  332. }
  333. DP_OUT(base, DP_RBCL, sizeof(rcv_hdr));
  334. DP_OUT(base, DP_RBCH, 0);
  335. DP_OUT(base, DP_RSAL, 0);
  336. DP_OUT(base, DP_RSAH, pkt);
  337. if (dp->rx_next == pkt) {
  338. if (cur == dp->rx_buf_start)
  339. DP_OUT(base, DP_BNDRY, dp->rx_buf_end-1);
  340. else
  341. DP_OUT(base, DP_BNDRY, cur-1); /* Update pointer */
  342. return;
  343. }
  344. dp->rx_next = pkt;
  345. DP_OUT(base, DP_ISR, DP_ISR_RDC); /* Clear end of DMA */
  346. DP_OUT(base, DP_CR, DP_CR_RDMA | DP_CR_START);
  347. #ifdef CYGHWR_NS_DP83902A_PLF_BROKEN_RX_DMA
  348. CYGACC_CALL_IF_DELAY_US(10);
  349. #endif
  350. for (i = 0; i < sizeof(rcv_hdr);) {
  351. DP_IN_DATA(dp->data, rcv_hdr[i++]);
  352. }
  353. #if DEBUG & 5
  354. printf("rx hdr %02x %02x %02x %02x\n",
  355. rcv_hdr[0], rcv_hdr[1], rcv_hdr[2], rcv_hdr[3]);
  356. #endif
  357. len = ((rcv_hdr[3] << 8) | rcv_hdr[2]) - sizeof(rcv_hdr);
  358. uboot_push_packet_len(len);
  359. if (rcv_hdr[1] == dp->rx_buf_start)
  360. DP_OUT(base, DP_BNDRY, dp->rx_buf_end-1);
  361. else
  362. DP_OUT(base, DP_BNDRY, rcv_hdr[1]-1); /* Update pointer */
  363. }
  364. }
  365. /*
  366. This function is called as a result of the "eth_drv_recv()" call above.
  367. It's job is to actually fetch data for a packet from the hardware once
  368. memory buffers have been allocated for the packet. Note that the buffers
  369. may come in pieces, using a scatter-gather list. This allows for more
  370. efficient processing in the upper layers of the stack.
  371. */
  372. static void
  373. dp83902a_recv(unsigned char *data, int len)
  374. {
  375. struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
  376. cyg_uint8 *base = dp->base;
  377. int i, mlen;
  378. cyg_uint8 saved_char = 0;
  379. bool saved;
  380. #if DEBUG & 4
  381. int dx;
  382. #endif
  383. DEBUG_FUNCTION();
  384. #if DEBUG & 5
  385. printf("Rx packet %d length %d\n", dp->rx_next, len);
  386. #endif
  387. /* Read incoming packet data */
  388. DP_OUT(base, DP_CR, DP_CR_PAGE0 | DP_CR_NODMA | DP_CR_START);
  389. DP_OUT(base, DP_RBCL, len & 0xFF);
  390. DP_OUT(base, DP_RBCH, len >> 8);
  391. DP_OUT(base, DP_RSAL, 4); /* Past header */
  392. DP_OUT(base, DP_RSAH, dp->rx_next);
  393. DP_OUT(base, DP_ISR, DP_ISR_RDC); /* Clear end of DMA */
  394. DP_OUT(base, DP_CR, DP_CR_RDMA | DP_CR_START);
  395. #ifdef CYGHWR_NS_DP83902A_PLF_BROKEN_RX_DMA
  396. CYGACC_CALL_IF_DELAY_US(10);
  397. #endif
  398. saved = false;
  399. for (i = 0; i < 1; i++) {
  400. if (data) {
  401. mlen = len;
  402. #if DEBUG & 4
  403. printf(" sg buf %08lx len %08x \n", (unsigned long) data, mlen);
  404. dx = 0;
  405. #endif
  406. while (0 < mlen) {
  407. /* Saved byte from previous loop? */
  408. if (saved) {
  409. *data++ = saved_char;
  410. mlen--;
  411. saved = false;
  412. continue;
  413. }
  414. {
  415. cyg_uint8 tmp;
  416. DP_IN_DATA(dp->data, tmp);
  417. #if DEBUG & 4
  418. printf(" %02x", tmp);
  419. if (0 == (++dx % 16)) printf("\n ");
  420. #endif
  421. *data++ = tmp;;
  422. mlen--;
  423. }
  424. }
  425. #if DEBUG & 4
  426. printf("\n");
  427. #endif
  428. }
  429. }
  430. }
  431. static void
  432. dp83902a_TxEvent(void)
  433. {
  434. struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
  435. cyg_uint8 *base = dp->base;
  436. unsigned char tsr;
  437. unsigned long key;
  438. DEBUG_FUNCTION();
  439. DP_IN(base, DP_TSR, tsr);
  440. if (dp->tx_int == 1) {
  441. key = dp->tx1_key;
  442. dp->tx1 = 0;
  443. } else {
  444. key = dp->tx2_key;
  445. dp->tx2 = 0;
  446. }
  447. /* Start next packet if one is ready */
  448. dp->tx_started = false;
  449. if (dp->tx1) {
  450. dp83902a_start_xmit(dp->tx1, dp->tx1_len);
  451. dp->tx_int = 1;
  452. } else if (dp->tx2) {
  453. dp83902a_start_xmit(dp->tx2, dp->tx2_len);
  454. dp->tx_int = 2;
  455. } else {
  456. dp->tx_int = 0;
  457. }
  458. /* Tell higher level we sent this packet */
  459. uboot_push_tx_done(key, 0);
  460. }
  461. /* Read the tally counters to clear them. Called in response to a CNT */
  462. /* interrupt. */
  463. static void
  464. dp83902a_ClearCounters(void)
  465. {
  466. struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
  467. cyg_uint8 *base = dp->base;
  468. cyg_uint8 cnt1, cnt2, cnt3;
  469. DP_IN(base, DP_FER, cnt1);
  470. DP_IN(base, DP_CER, cnt2);
  471. DP_IN(base, DP_MISSED, cnt3);
  472. DP_OUT(base, DP_ISR, DP_ISR_CNT);
  473. }
  474. /* Deal with an overflow condition. This code follows the procedure set */
  475. /* out in section 7.0 of the datasheet. */
  476. static void
  477. dp83902a_Overflow(void)
  478. {
  479. struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *)&nic;
  480. cyg_uint8 *base = dp->base;
  481. cyg_uint8 isr;
  482. /* Issue a stop command and wait 1.6ms for it to complete. */
  483. DP_OUT(base, DP_CR, DP_CR_STOP | DP_CR_NODMA);
  484. CYGACC_CALL_IF_DELAY_US(1600);
  485. /* Clear the remote byte counter registers. */
  486. DP_OUT(base, DP_RBCL, 0);
  487. DP_OUT(base, DP_RBCH, 0);
  488. /* Enter loopback mode while we clear the buffer. */
  489. DP_OUT(base, DP_TCR, DP_TCR_LOCAL);
  490. DP_OUT(base, DP_CR, DP_CR_START | DP_CR_NODMA);
  491. /* Read in as many packets as we can and acknowledge any and receive */
  492. /* interrupts. Since the buffer has overflowed, a receive event of */
  493. /* some kind will have occured. */
  494. dp83902a_RxEvent();
  495. DP_OUT(base, DP_ISR, DP_ISR_RxP|DP_ISR_RxE);
  496. /* Clear the overflow condition and leave loopback mode. */
  497. DP_OUT(base, DP_ISR, DP_ISR_OFLW);
  498. DP_OUT(base, DP_TCR, DP_TCR_NORMAL);
  499. /* If a transmit command was issued, but no transmit event has occured, */
  500. /* restart it here. */
  501. DP_IN(base, DP_ISR, isr);
  502. if (dp->tx_started && !(isr & (DP_ISR_TxP|DP_ISR_TxE))) {
  503. DP_OUT(base, DP_CR, DP_CR_NODMA | DP_CR_TXPKT | DP_CR_START);
  504. }
  505. }
  506. static void
  507. dp83902a_poll(void)
  508. {
  509. struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
  510. cyg_uint8 *base = dp->base;
  511. unsigned char isr;
  512. DP_OUT(base, DP_CR, DP_CR_NODMA | DP_CR_PAGE0 | DP_CR_START);
  513. DP_IN(base, DP_ISR, isr);
  514. while (0 != isr) {
  515. /* The CNT interrupt triggers when the MSB of one of the error */
  516. /* counters is set. We don't much care about these counters, but */
  517. /* we should read their values to reset them. */
  518. if (isr & DP_ISR_CNT) {
  519. dp83902a_ClearCounters();
  520. }
  521. /* Check for overflow. It's a special case, since there's a */
  522. /* particular procedure that must be followed to get back into */
  523. /* a running state.a */
  524. if (isr & DP_ISR_OFLW) {
  525. dp83902a_Overflow();
  526. } else {
  527. /* Other kinds of interrupts can be acknowledged simply by */
  528. /* clearing the relevant bits of the ISR. Do that now, then */
  529. /* handle the interrupts we care about. */
  530. DP_OUT(base, DP_ISR, isr); /* Clear set bits */
  531. if (!dp->running) break; /* Is this necessary? */
  532. /* Check for tx_started on TX event since these may happen */
  533. /* spuriously it seems. */
  534. if (isr & (DP_ISR_TxP|DP_ISR_TxE) && dp->tx_started) {
  535. dp83902a_TxEvent();
  536. }
  537. if (isr & (DP_ISR_RxP|DP_ISR_RxE)) {
  538. dp83902a_RxEvent();
  539. }
  540. }
  541. DP_IN(base, DP_ISR, isr);
  542. }
  543. }
  544. /* find prom (taken from pc_net_cs.c from Linux) */
  545. #include "8390.h"
  546. typedef struct hw_info_t {
  547. u_int offset;
  548. u_char a0, a1, a2;
  549. u_int flags;
  550. } hw_info_t;
  551. #define DELAY_OUTPUT 0x01
  552. #define HAS_MISC_REG 0x02
  553. #define USE_BIG_BUF 0x04
  554. #define HAS_IBM_MISC 0x08
  555. #define IS_DL10019 0x10
  556. #define IS_DL10022 0x20
  557. #define HAS_MII 0x40
  558. #define USE_SHMEM 0x80 /* autodetected */
  559. #define AM79C9XX_HOME_PHY 0x00006B90 /* HomePNA PHY */
  560. #define AM79C9XX_ETH_PHY 0x00006B70 /* 10baseT PHY */
  561. #define MII_PHYID_REV_MASK 0xfffffff0
  562. #define MII_PHYID_REG1 0x02
  563. #define MII_PHYID_REG2 0x03
  564. static hw_info_t hw_info[] = {
  565. { /* Accton EN2212 */ 0x0ff0, 0x00, 0x00, 0xe8, DELAY_OUTPUT },
  566. { /* Allied Telesis LA-PCM */ 0x0ff0, 0x00, 0x00, 0xf4, 0 },
  567. { /* APEX MultiCard */ 0x03f4, 0x00, 0x20, 0xe5, 0 },
  568. { /* ASANTE FriendlyNet */ 0x4910, 0x00, 0x00, 0x94,
  569. DELAY_OUTPUT | HAS_IBM_MISC },
  570. { /* Danpex EN-6200P2 */ 0x0110, 0x00, 0x40, 0xc7, 0 },
  571. { /* DataTrek NetCard */ 0x0ff0, 0x00, 0x20, 0xe8, 0 },
  572. { /* Dayna CommuniCard E */ 0x0110, 0x00, 0x80, 0x19, 0 },
  573. { /* D-Link DE-650 */ 0x0040, 0x00, 0x80, 0xc8, 0 },
  574. { /* EP-210 Ethernet */ 0x0110, 0x00, 0x40, 0x33, 0 },
  575. { /* EP4000 Ethernet */ 0x01c0, 0x00, 0x00, 0xb4, 0 },
  576. { /* Epson EEN10B */ 0x0ff0, 0x00, 0x00, 0x48,
  577. HAS_MISC_REG | HAS_IBM_MISC },
  578. { /* ELECOM Laneed LD-CDWA */ 0xb8, 0x08, 0x00, 0x42, 0 },
  579. { /* Hypertec Ethernet */ 0x01c0, 0x00, 0x40, 0x4c, 0 },
  580. { /* IBM CCAE */ 0x0ff0, 0x08, 0x00, 0x5a,
  581. HAS_MISC_REG | HAS_IBM_MISC },
  582. { /* IBM CCAE */ 0x0ff0, 0x00, 0x04, 0xac,
  583. HAS_MISC_REG | HAS_IBM_MISC },
  584. { /* IBM CCAE */ 0x0ff0, 0x00, 0x06, 0x29,
  585. HAS_MISC_REG | HAS_IBM_MISC },
  586. { /* IBM FME */ 0x0374, 0x08, 0x00, 0x5a,
  587. HAS_MISC_REG | HAS_IBM_MISC },
  588. { /* IBM FME */ 0x0374, 0x00, 0x04, 0xac,
  589. HAS_MISC_REG | HAS_IBM_MISC },
  590. { /* Kansai KLA-PCM/T */ 0x0ff0, 0x00, 0x60, 0x87,
  591. HAS_MISC_REG | HAS_IBM_MISC },
  592. { /* NSC DP83903 */ 0x0374, 0x08, 0x00, 0x17,
  593. HAS_MISC_REG | HAS_IBM_MISC },
  594. { /* NSC DP83903 */ 0x0374, 0x00, 0xc0, 0xa8,
  595. HAS_MISC_REG | HAS_IBM_MISC },
  596. { /* NSC DP83903 */ 0x0374, 0x00, 0xa0, 0xb0,
  597. HAS_MISC_REG | HAS_IBM_MISC },
  598. { /* NSC DP83903 */ 0x0198, 0x00, 0x20, 0xe0,
  599. HAS_MISC_REG | HAS_IBM_MISC },
  600. { /* I-O DATA PCLA/T */ 0x0ff0, 0x00, 0xa0, 0xb0, 0 },
  601. { /* Katron PE-520 */ 0x0110, 0x00, 0x40, 0xf6, 0 },
  602. { /* Kingston KNE-PCM/x */ 0x0ff0, 0x00, 0xc0, 0xf0,
  603. HAS_MISC_REG | HAS_IBM_MISC },
  604. { /* Kingston KNE-PCM/x */ 0x0ff0, 0xe2, 0x0c, 0x0f,
  605. HAS_MISC_REG | HAS_IBM_MISC },
  606. { /* Kingston KNE-PC2 */ 0x0180, 0x00, 0xc0, 0xf0, 0 },
  607. { /* Maxtech PCN2000 */ 0x5000, 0x00, 0x00, 0xe8, 0 },
  608. { /* NDC Instant-Link */ 0x003a, 0x00, 0x80, 0xc6, 0 },
  609. { /* NE2000 Compatible */ 0x0ff0, 0x00, 0xa0, 0x0c, 0 },
  610. { /* Network General Sniffer */ 0x0ff0, 0x00, 0x00, 0x65,
  611. HAS_MISC_REG | HAS_IBM_MISC },
  612. { /* Panasonic VEL211 */ 0x0ff0, 0x00, 0x80, 0x45,
  613. HAS_MISC_REG | HAS_IBM_MISC },
  614. { /* PreMax PE-200 */ 0x07f0, 0x00, 0x20, 0xe0, 0 },
  615. { /* RPTI EP400 */ 0x0110, 0x00, 0x40, 0x95, 0 },
  616. { /* SCM Ethernet */ 0x0ff0, 0x00, 0x20, 0xcb, 0 },
  617. { /* Socket EA */ 0x4000, 0x00, 0xc0, 0x1b,
  618. DELAY_OUTPUT | HAS_MISC_REG | USE_BIG_BUF },
  619. { /* Socket LP-E CF+ */ 0x01c0, 0x00, 0xc0, 0x1b, 0 },
  620. { /* SuperSocket RE450T */ 0x0110, 0x00, 0xe0, 0x98, 0 },
  621. { /* Volktek NPL-402CT */ 0x0060, 0x00, 0x40, 0x05, 0 },
  622. { /* NEC PC-9801N-J12 */ 0x0ff0, 0x00, 0x00, 0x4c, 0 },
  623. { /* PCMCIA Technology OEM */ 0x01c8, 0x00, 0xa0, 0x0c, 0 }
  624. };
  625. #define NR_INFO (sizeof(hw_info)/sizeof(hw_info_t))
  626. static hw_info_t default_info = { 0, 0, 0, 0, 0 };
  627. unsigned char dev_addr[6];
  628. #define PCNET_CMD 0x00
  629. #define PCNET_DATAPORT 0x10 /* NatSemi-defined port window offset. */
  630. #define PCNET_RESET 0x1f /* Issue a read to reset, a write to clear. */
  631. #define PCNET_MISC 0x18 /* For IBM CCAE and Socket EA cards */
  632. unsigned long nic_base;
  633. static void pcnet_reset_8390(void)
  634. {
  635. int i, r;
  636. PRINTK("nic base is %lx\n", nic_base);
  637. #if 1
  638. n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
  639. PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
  640. n2k_outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, E8390_CMD);
  641. PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
  642. n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
  643. PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
  644. #endif
  645. n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
  646. n2k_outb(n2k_inb(nic_base + PCNET_RESET), PCNET_RESET);
  647. for (i = 0; i < 100; i++) {
  648. if ((r = (n2k_inb(EN0_ISR) & ENISR_RESET)) != 0)
  649. break;
  650. PRINTK("got %x in reset\n", r);
  651. my_udelay(100);
  652. }
  653. n2k_outb(ENISR_RESET, EN0_ISR); /* Ack intr. */
  654. if (i == 100)
  655. printf("pcnet_reset_8390() did not complete.\n");
  656. } /* pcnet_reset_8390 */
  657. static hw_info_t * get_prom(void ) {
  658. unsigned char prom[32];
  659. int i, j;
  660. struct {
  661. u_char value, offset;
  662. } program_seq[] = {
  663. {E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD}, /* Select page 0*/
  664. {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */
  665. {0x00, EN0_RCNTLO}, /* Clear the count regs. */
  666. {0x00, EN0_RCNTHI},
  667. {0x00, EN0_IMR}, /* Mask completion irq. */
  668. {0xFF, EN0_ISR},
  669. {E8390_RXOFF, EN0_RXCR}, /* 0x20 Set to monitor */
  670. {E8390_TXOFF, EN0_TXCR}, /* 0x02 and loopback mode. */
  671. {32, EN0_RCNTLO},
  672. {0x00, EN0_RCNTHI},
  673. {0x00, EN0_RSARLO}, /* DMA starting at 0x0000. */
  674. {0x00, EN0_RSARHI},
  675. {E8390_RREAD+E8390_START, E8390_CMD},
  676. };
  677. PRINTK("trying to get MAC via prom reading\n");
  678. pcnet_reset_8390();
  679. mdelay(10);
  680. for (i = 0; i < sizeof(program_seq)/sizeof(program_seq[0]); i++)
  681. n2k_outb(program_seq[i].value, program_seq[i].offset);
  682. PRINTK("PROM:");
  683. for (i = 0; i < 32; i++) {
  684. prom[i] = n2k_inb(PCNET_DATAPORT);
  685. PRINTK(" %02x", prom[i]);
  686. }
  687. PRINTK("\n");
  688. for (i = 0; i < NR_INFO; i++) {
  689. if ((prom[0] == hw_info[i].a0) &&
  690. (prom[2] == hw_info[i].a1) &&
  691. (prom[4] == hw_info[i].a2)) {
  692. PRINTK("matched board %d\n", i);
  693. break;
  694. }
  695. }
  696. if ((i < NR_INFO) || ((prom[28] == 0x57) && (prom[30] == 0x57))) {
  697. for (j = 0; j < 6; j++)
  698. dev_addr[j] = prom[j<<1];
  699. PRINTK("on exit i is %d/%ld\n", i, NR_INFO);
  700. PRINTK("MAC address is %02x:%02x:%02x:%02x:%02x:%02x\n",
  701. dev_addr[0],dev_addr[1],dev_addr[2],dev_addr[3],dev_addr[4],dev_addr[5]);
  702. return (i < NR_INFO) ? hw_info+i : &default_info;
  703. }
  704. return NULL;
  705. }
  706. /* U-boot specific routines */
  707. #define NB 5
  708. static unsigned char *pbuf = NULL;
  709. static int plen[NB];
  710. static int nrx = 0;
  711. static int pkey = -1;
  712. void uboot_push_packet_len(int len) {
  713. PRINTK("pushed len = %d, nrx = %d\n", len, nrx);
  714. if (len>=2000) {
  715. printf("NE2000: packet too big\n");
  716. return;
  717. }
  718. if (nrx >= NB) {
  719. printf("losing packets in rx\n");
  720. return;
  721. }
  722. plen[nrx] = len;
  723. dp83902a_recv(&pbuf[nrx*2000], len);
  724. nrx++;
  725. }
  726. void uboot_push_tx_done(int key, int val) {
  727. PRINTK("pushed key = %d\n", key);
  728. pkey = key;
  729. }
  730. int eth_init(bd_t *bd) {
  731. static hw_info_t * r;
  732. char ethaddr[20];
  733. PRINTK("### eth_init\n");
  734. if (!pbuf) {
  735. pbuf = malloc(NB*2000);
  736. if (!pbuf) {
  737. printf("Cannot allocate rx buffers\n");
  738. return -1;
  739. }
  740. }
  741. #ifdef CONFIG_DRIVER_NE2000_CCR
  742. {
  743. volatile unsigned char *p = (volatile unsigned char *) CONFIG_DRIVER_NE2000_CCR;
  744. PRINTK("CCR before is %x\n", *p);
  745. *p = CONFIG_DRIVER_NE2000_VAL;
  746. PRINTK("CCR after is %x\n", *p);
  747. }
  748. #endif
  749. nic_base = CONFIG_DRIVER_NE2000_BASE;
  750. nic.base = (cyg_uint8 *) CONFIG_DRIVER_NE2000_BASE;
  751. r = get_prom();
  752. if (!r)
  753. return -1;
  754. sprintf (ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
  755. dev_addr[0], dev_addr[1],
  756. dev_addr[2], dev_addr[3],
  757. dev_addr[4], dev_addr[5]) ;
  758. PRINTK("Set environment from HW MAC addr = \"%s\"\n", ethaddr);
  759. setenv ("ethaddr", ethaddr);
  760. #define DP_DATA 0x10
  761. nic.data = nic.base + DP_DATA;
  762. nic.tx_buf1 = 0x40;
  763. nic.tx_buf2 = 0x48;
  764. nic.rx_buf_start = 0x50;
  765. nic.rx_buf_end = 0x80;
  766. if (dp83902a_init() == false)
  767. return -1;
  768. dp83902a_start(dev_addr);
  769. return 0;
  770. }
  771. void eth_halt() {
  772. PRINTK("### eth_halt\n");
  773. dp83902a_stop();
  774. }
  775. int eth_rx() {
  776. int j, tmo;
  777. PRINTK("### eth_rx\n");
  778. tmo = get_timer (0) + TOUT * CFG_HZ;
  779. while(1) {
  780. dp83902a_poll();
  781. if (nrx > 0) {
  782. for(j=0; j<nrx; j++) {
  783. NetReceive(&pbuf[j*2000], plen[j]);
  784. }
  785. nrx = 0;
  786. return 1;
  787. }
  788. if (get_timer (0) >= tmo) {
  789. printf("timeout during rx\n");
  790. return 0;
  791. }
  792. }
  793. return 0;
  794. }
  795. int eth_send(volatile void *packet, int length) {
  796. int tmo;
  797. PRINTK("### eth_send\n");
  798. pkey = -1;
  799. dp83902a_send((unsigned char *) packet, length, 666);
  800. tmo = get_timer (0) + TOUT * CFG_HZ;
  801. while(1) {
  802. dp83902a_poll();
  803. if (pkey != -1) {
  804. PRINTK("Packet sucesfully sent\n");
  805. return 0;
  806. }
  807. if (get_timer (0) >= tmo) {
  808. printf("transmission error (timoeut)\n");
  809. return 0;
  810. }
  811. }
  812. return 0;
  813. }
  814. #endif