i2c.c 5.0 KB

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  1. /*
  2. * (C) Copyright 2003,Motorola Inc.
  3. * Xianghua Xiao <x.xiao@motorola.com>
  4. * Adapted for Motorola 85xx chip.
  5. *
  6. * (C) Copyright 2003
  7. * Gleb Natapov <gnatapov@mrv.com>
  8. * Some bits are taken from linux driver writen by adrian@humboldt.co.uk
  9. *
  10. * Hardware I2C driver for MPC107 PCI bridge.
  11. *
  12. * See file CREDITS for list of people who contributed to this
  13. * project.
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License as
  17. * published by the Free Software Foundation; either version 2 of
  18. * the License, or (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28. * MA 02111-1307 USA
  29. */
  30. #include <common.h>
  31. #include <command.h>
  32. #include <asm/io.h>
  33. #ifdef CONFIG_HARD_I2C
  34. #include <i2c.h>
  35. #define TIMEOUT (CFG_HZ/4)
  36. #define I2C_Addr ((u8 *)(CFG_CCSRBAR + 0x3000))
  37. #define I2CADR &I2C_Addr[0]
  38. #define I2CFDR &I2C_Addr[4]
  39. #define I2CCCR &I2C_Addr[8]
  40. #define I2CCSR &I2C_Addr[12]
  41. #define I2CCDR &I2C_Addr[16]
  42. #define I2CDFSRR &I2C_Addr[20]
  43. #define I2C_READ 1
  44. #define I2C_WRITE 0
  45. void
  46. i2c_init(int speed, int slaveadd)
  47. {
  48. /* stop I2C controller */
  49. writeb(0x0, I2CCCR);
  50. /* set clock */
  51. writeb(0x3f, I2CFDR);
  52. /* set default filter */
  53. writeb(0x10,I2CDFSRR);
  54. /* write slave address */
  55. writeb(slaveadd, I2CADR);
  56. /* clear status register */
  57. writeb(0x0, I2CCSR);
  58. /* start I2C controller */
  59. writeb(MPC85xx_I2CCR_MEN, I2CCCR);
  60. }
  61. static __inline__ int
  62. i2c_wait4bus (void)
  63. {
  64. ulong timeval = get_timer (0);
  65. while (readb(I2CCSR) & MPC85xx_I2CSR_MBB) {
  66. if (get_timer (timeval) > TIMEOUT) {
  67. return -1;
  68. }
  69. }
  70. return 0;
  71. }
  72. static __inline__ int
  73. i2c_wait (int write)
  74. {
  75. u32 csr;
  76. ulong timeval = get_timer (0);
  77. do {
  78. csr = readb(I2CCSR);
  79. if (!(csr & MPC85xx_I2CSR_MIF))
  80. continue;
  81. writeb(0x0, I2CCSR);
  82. if (csr & MPC85xx_I2CSR_MAL) {
  83. debug("i2c_wait: MAL\n");
  84. return -1;
  85. }
  86. if (!(csr & MPC85xx_I2CSR_MCF)) {
  87. debug("i2c_wait: unfinished\n");
  88. return -1;
  89. }
  90. if (write == I2C_WRITE && (csr & MPC85xx_I2CSR_RXAK)) {
  91. debug("i2c_wait: No RXACK\n");
  92. return -1;
  93. }
  94. return 0;
  95. } while (get_timer (timeval) < TIMEOUT);
  96. debug("i2c_wait: timed out\n");
  97. return -1;
  98. }
  99. static __inline__ int
  100. i2c_write_addr (u8 dev, u8 dir, int rsta)
  101. {
  102. writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA | MPC85xx_I2CCR_MTX |
  103. (rsta?MPC85xx_I2CCR_RSTA:0),
  104. I2CCCR);
  105. writeb((dev << 1) | dir, I2CCDR);
  106. if (i2c_wait (I2C_WRITE) < 0)
  107. return 0;
  108. return 1;
  109. }
  110. static __inline__ int
  111. __i2c_write (u8 *data, int length)
  112. {
  113. int i;
  114. writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA | MPC85xx_I2CCR_MTX,
  115. I2CCCR);
  116. for (i=0; i < length; i++) {
  117. writeb(data[i], I2CCDR);
  118. if (i2c_wait (I2C_WRITE) < 0)
  119. break;
  120. }
  121. return i;
  122. }
  123. static __inline__ int
  124. __i2c_read (u8 *data, int length)
  125. {
  126. int i;
  127. writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA |
  128. ((length == 1) ? MPC85xx_I2CCR_TXAK : 0),
  129. I2CCCR);
  130. /* dummy read */
  131. readb(I2CCDR);
  132. for (i=0; i < length; i++) {
  133. if (i2c_wait (I2C_READ) < 0)
  134. break;
  135. /* Generate ack on last next to last byte */
  136. if (i == length - 2)
  137. writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA |
  138. MPC85xx_I2CCR_TXAK,
  139. I2CCCR);
  140. /* Generate stop on last byte */
  141. if (i == length - 1)
  142. writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_TXAK, I2CCCR);
  143. data[i] = readb(I2CCDR);
  144. }
  145. return i;
  146. }
  147. int
  148. i2c_read (u8 dev, uint addr, int alen, u8 *data, int length)
  149. {
  150. int i = 0;
  151. u8 *a = (u8*)&addr;
  152. if (i2c_wait4bus () < 0)
  153. goto exit;
  154. if (i2c_write_addr (dev, I2C_WRITE, 0) == 0)
  155. goto exit;
  156. if (__i2c_write (&a[4 - alen], alen) != alen)
  157. goto exit;
  158. if (i2c_write_addr (dev, I2C_READ, 1) == 0)
  159. goto exit;
  160. i = __i2c_read (data, length);
  161. exit:
  162. writeb(MPC85xx_I2CCR_MEN, I2CCCR);
  163. return !(i == length);
  164. }
  165. int
  166. i2c_write (u8 dev, uint addr, int alen, u8 *data, int length)
  167. {
  168. int i = 0;
  169. u8 *a = (u8*)&addr;
  170. if (i2c_wait4bus () < 0)
  171. goto exit;
  172. if (i2c_write_addr (dev, I2C_WRITE, 0) == 0)
  173. goto exit;
  174. if (__i2c_write (&a[4 - alen], alen) != alen)
  175. goto exit;
  176. i = __i2c_write (data, length);
  177. exit:
  178. writeb(MPC85xx_I2CCR_MEN, I2CCCR);
  179. return !(i == length);
  180. }
  181. int i2c_probe (uchar chip)
  182. {
  183. int tmp;
  184. /*
  185. * Try to read the first location of the chip. The underlying
  186. * driver doesn't appear to support sending just the chip address
  187. * and looking for an <ACK> back.
  188. */
  189. udelay(10000);
  190. return i2c_read (chip, 0, 1, (char *)&tmp, 1);
  191. }
  192. uchar i2c_reg_read (uchar i2c_addr, uchar reg)
  193. {
  194. char buf[1];
  195. i2c_read (i2c_addr, reg, 1, buf, 1);
  196. return (buf[0]);
  197. }
  198. void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val)
  199. {
  200. i2c_write (i2c_addr, reg, 1, &val, 1);
  201. }
  202. #endif /* CONFIG_HARD_I2C */